basic cpu state structure needed for execution of any cpu architecture. More...

#include <CPU.h>

Collaboration diagram for ETISS_CPU:

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Public Attributes
etiss_uint64	instructionPointer
	pointer to next instruction. More...

etiss_uint64	nextPc

etiss_uint64	cpuTime_ps
	simulation time of cpu More...

etiss_uint64	resourceUsages [ETISS_MAX_RESOURCES]
	how many cycles each resource is used More...

const char *	resources [ETISS_MAX_RESOURCES]
	names of resources More...

etiss_uint64	cycles [ETISS_MAX_RESOURCES]
	how many cycles in each resource (including waiting) More...

etiss_uint64	cpuCycleTime_ps
	frequency of the cpu. use to allign e.g. memory delays More...

void *	_etiss_private_handle_
	private helper handle for plugins More...

etiss_uint32	mode
	instruction set mode of the processor More...

etiss_uint32	exception

etiss_uint32	return_pending

Detailed Description

basic cpu state structure needed for execution of any cpu architecture.

             to use this structure for an architecture it should be customized like this:
                     #pragma pack(push, 1) // important!
                     struct YOUR_CPU {
                             ETISS_CPU cpu;

                             etiss_uint32 your_registers[16];

                             [...]

                     };
                     #pragma pack(pop) // undo changes
             now any pointer to YOUR_CPU can be directly casted to EITSS_CPU and back [YOUR_CPU ycpu; ETISS_CPU *
cpu = (ETISS_CPU *)  YOUR_CPU * ycpuPtr = (YOUR_CPU *) cpu;] it is guaranteed that the cpu pointer passed
to generated code or functions of a CPUArch implementation was allocated by that CPUArch and can therefore be
casted without additional checks.

Definition at line 88 of file CPU.h.

Member Data Documentation

◆ _etiss_private_handle_

void * ETISS_CPU::_etiss_private_handle_

private helper handle for plugins

Definition at line 107 of file CPU.h.

Referenced by ETISS_SIGNAL_MMU(), etiss::CPUCore::execute(), etiss::CPUArchRegListenerInterface::signalChangedRegisterValue(), etiss::plugin::SelectiveSysWrapper::unwrap(), and etiss::plugin::SelectiveSysWrapper::wrap().

◆ cpuCycleTime_ps

etiss_uint64 ETISS_CPU::cpuCycleTime_ps

frequency of the cpu. use to allign e.g. memory delays

Definition at line 105 of file CPU.h.

Referenced by etiss_get_cycles(), etiss_get_instret(), etiss::CPUCore::execute(), RV32IMACFDArch::resetCPU(), and RV64IMACFDArch::resetCPU().

◆ cpuTime_ps

◆ cycles

etiss_uint64 ETISS_CPU::cycles

how many cycles in each resource (including waiting)

Definition at line 103 of file CPU.h.

Referenced by etiss::CPUCore::execute(), and handleResources().

◆ exception

etiss_uint32 ETISS_CPU::exception

Definition at line 111 of file CPU.h.

Referenced by etiss_icache_flush(), RV32IMACFD_raise(), RV64IMACFD_raise(), and semihostingCall().

◆ instructionPointer

etiss_uint64 ETISS_CPU::instructionPointer

pointer to next instruction.

NOTE: not neccessarily the instruction address (e.g instruction minimal size: 4; instruction pointer: 2 -> instruction address: 2*4)

Definition at line 92 of file CPU.h.

Referenced by access_error(), etiss::CPUCore::CPUCore(), TracePrinter::execute(), etiss::CPUCore::execute(), RV32IMACFDGDBCore::getInstructionPointer(), RV64IMACFDGDBCore::getInstructionPointer(), etiss::plugin::gdb::GDBCore::getInstructionPointer(), RV32IMACFDArch::handleException(), RV64IMACFDArch::handleException(), etiss::plugin::gdb::Server::postMemAccessCallback(), etiss::plugin::gdb::Server::preInstructionCallback(), RV32IMACFDArch::resetCPU(), RV64IMACFDArch::resetCPU(), RV32IMACFD_raise(), RV64IMACFD_raise(), trace(), and etiss::plugin::VariableValueLogger::writeValue().

◆ mode

etiss_uint32 ETISS_CPU::mode

instruction set mode of the processor

Definition at line 109 of file CPU.h.

Referenced by etiss::Translation::disasm(), etiss::Translation::getBlock(), RV32IMACFDArch::resetCPU(), RV64IMACFDArch::resetCPU(), and etiss::Translation::translateBlock().

◆ nextPc

etiss_uint64 ETISS_CPU::nextPc

Definition at line 95 of file CPU.h.

Referenced by RV32IMACFDArch::handleException(), RV64IMACFDArch::handleException(), RV32IMACFDArch::resetCPU(), RV64IMACFDArch::resetCPU(), RV32IMACFD_raise(), and RV64IMACFD_raise().

◆ resources

const char * ETISS_CPU::resources

names of resources

Definition at line 101 of file CPU.h.

Referenced by etiss::CPUCore::execute().

◆ resourceUsages

etiss_uint64 ETISS_CPU::resourceUsages

how many cycles each resource is used

Definition at line 99 of file CPU.h.