ETISS 0.11.2
ExtendableTranslatingInstructionSetSimulator(version0.11.2)
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GDBCore.cpp
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1// SPDX-License-Identifier: BSD-3-Clause
2//
3// This file is part of ETISS. It is licensed under the BSD 3-Clause License; you may not use this file except in
4// compliance with the License. You should have received a copy of the license along with this project. If not, see the
5// LICENSE file.
16#include "etiss/jit/CPU.h"
17
18using namespace etiss::plugin::gdb;
19
21std::string GDBCore::mapRegister(unsigned index)
22{
23 return "";
24}
25unsigned GDBCore::mapRegister(std::string name)
26{
27 return INVALIDMAPPING;
28}
30{
31 return 0;
32}
34{
35 return false;
36}
38{
39 return cpu->instructionPointer;
40}
static const unsigned INVALIDMAPPING
Definition GDBCore.h:69
virtual etiss::uint64 getInstructionPointer(ETISS_CPU *cpu)
allows to calculate the index of the instruction to be executed for breakpoint checks.
Definition GDBCore.cpp:37
virtual unsigned mappedRegisterCount()
returns the number of registers in the gdb defined register list
Definition GDBCore.cpp:29
virtual std::string mapRegister(unsigned index)
the returned string identifies the register at the given index as defined by gdb.
Definition GDBCore.cpp:21
virtual bool isLittleEndian()
returns true if the values are expected to be little endian
Definition GDBCore.cpp:33
basic cpu state structure needed for execution of any cpu architecture.
Definition CPU.h:51
etiss_uint64 instructionPointer
pointer to next instruction.
Definition CPU.h:54