58 using namespace etiss;
89 ismetainstruction =
false;
166 (
uint32_t)etiss::instr::Instruction::BUILTINGROUP::CPUTIMEUPDATE) == 0)
169 [](etiss::instr::BitArray &, etiss::CodeSet &cs, etiss::instr::InstructionContext &) {
170 CodePart &cp = cs.prepend(CodePart::INITIALREQUIRED);
171 cp.getAffectedRegisters().add(
"cpuTime_ps", 64);
172 cp.code() =
"cpu->cpuTime_ps += (1 * cpu->cpuCycleTime_ps);";
175 (
uint32_t)etiss::instr::Instruction::BUILTINGROUP::CPUTIMEUPDATE);
205 cpu->
exception = etiss::RETURNCODE::RELOADBLOCKS;
void ETISS_signalChangedRegisterValue(ETISS_CPU *cpu, const char *registerName)
static void CPUArch_finalizeInstrSet(etiss::instr::InstructionSet *set)
void etiss_icache_flush(ETISS_CPU *cpu, ETISS_System *const system, void *const *const plugin_pointers)
contains neccesary interfaces for instruction translation.
defines main cpu core interface
static __inline__ uint32_t
virtual ~CPUArchCPUManipulation()
virtual etiss::Plugin * newTimer(ETISS_CPU *cpu)
create a simple default timer implementaion instance for this architecture.
virtual void deleteTimer(etiss::Plugin *timer)
delete timer instance
virtual ~CPUArchRegListenerInterface()
static void signalChangedRegisterValue(ETISS_CPU *cpu, const char *registerName)
call this function to inform RegisterDevicePlugins about changed special register values.
virtual etiss::InterruptEnable * createInterruptEnable(ETISS_CPU *cpu)
virtual std::string getIncludePath()
returns a path that will be used to look up header files
CPUArch(std::string archname)
virtual unsigned getMaximumInstructionsPerMetaInstruction()
maximum number of instructions in a meta instruction
virtual std::string getBlockGlobalCode()
get c++ code snippet that is placed at the top of a translated block
virtual etiss::plugin::gdb::GDBCore & getGDBCore()
returns arch dependent gdb functions.
virtual unsigned getInstructionSizeInBytes()=0
size of one instruction/ smalest data unit for instructions of variable length
virtual std::string _getPluginName() const
do not override. maps to getName().
virtual void deleteInterruptVector(etiss::InterruptVector *vec, ETISS_CPU *cpu)
delete an allocated interrupt vector object
virtual etiss::InterruptVector * createInterruptVector(ETISS_CPU *cpu)
allocate a new interrupt vector object for the given cpu
virtual void deleteInterruptEnable(etiss::InterruptEnable *en, ETISS_CPU *cpu)
std::string getArchName() const
returns the name of this architecture.
etiss::plugin::gdb::GDBCore gdbcore_
virtual bool unlikelyInstruction(etiss::uint8 *instr, unsigned length, bool &ismetainstruction)
return true if the given data is unlikely to be an instruction.
virtual unsigned getMaximumInstructionSizeInBytes()=0
used for variable instruction size and delay slots
virtual void compensateEndianess(ETISS_CPU *cpu, etiss::instr::BitArray &ba) const
this function should compensate for any endianess on a BitArray so that bit 0 is always the LSB.
virtual unsigned getSuperInstructionCount()
fixed number of sub instructions per instruction (e.g.
virtual etiss::int32 handleException(etiss::int32 code, ETISS_CPU *cpu)
translate/process exceptions that occur at runtime
std::string getName() const
returns the name of this architecture.
T get(const std::string &key, T default_, bool *default_used=0)
template function to read the value of a configuration key.
interface to set interrupt bits
base plugin class that provides access to different plugin functions if present
void setCorrespondingCPUCoreName(std::string name)
void set_value(size_type width, unsigned long value)
change the value the object is holding
unsigned intCount() const
Buffer for reading data from memory while instructions are being fetched.
void recoverFromEndianness(unsigned alignment, endian_t endianness)
changes byte positions as needed to resove endiannes incompabilities after using the internal buffer ...
holds etiss::instr::Instruction instances and handles automatic instruction tree creation.
void foreach(std::function< void(Instruction &)> func)
holds information and translation callbacks for an instruction.
uint32_t & presentBuiltinGroups()
holds etiss::instr::VariableInstructionSet instances for different modes.
void foreach(std::function< void(VariableInstructionSet &)> call)
holds etiss::instr::InstructionSet instances with different bit widths.
void foreach(std::function< void(InstructionSet &)> func)
provides to architecture dependent registers as defined by gdb
Page Table Entry (PTE) defines the composition of Page Frame Number (PFN) and relavant flags.
Configuration & cfg(const std::string &cfgName)
Get reference of the global ETISS configuration object.
float __ovld __cnfn length(float p)
Return the length of vector p, i.e., sqrt(p.x2 + p.y 2 + ...)
basic cpu state structure needed for execution of any cpu architecture.
memory access and time synchronization functions.