ETISS 0.8.0
Extendable Translating Instruction Set Simulator (version 0.8.0)
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SwitchSystem.cpp
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1/*
2
3 @copyright
4
5 <pre>
6
7 Copyright 2018 Infineon Technologies AG
8
9 This file is part of ETISS tool, see <https://github.com/tum-ei-eda/etiss>.
10
11 The initial version of this software has been created with the funding support by the German Federal
12 Ministry of Education and Research (BMBF) in the project EffektiV under grant 01IS13022.
13
14 Redistribution and use in source and binary forms, with or without modification, are permitted
15 provided that the following conditions are met:
16
17 1. Redistributions of source code must retain the above copyright notice, this list of conditions and
18 the following disclaimer.
19
20 2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions
21 and the following disclaimer in the documentation and/or other materials provided with the distribution.
22
23 3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse
24 or promote products derived from this software without specific prior written permission.
25
26 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
27 WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
28 PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
29 DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
30 PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31 HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
32 NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 POSSIBILITY OF SUCH DAMAGE.
34
35 </pre>
36
37 @author Chair of Electronic Design Automation, TUM
38
39 @version 0.1
40
41*/
42
44
45using namespace etiss::plugin::fault;
46
47int32_t SwitchSystem::iread(uint64_t &time_ps, uint64_t addr, uint8_t *buf, uint32_t len)
48{
49 if (false)
50 {
51 }
52 else
53 {
55 int32_t exep = plugin_system_->iread(plugin_system_, plugin_cpu_, addr, len); // get iread time
56 time_ps += plugin_cpu_->cpuTime_ps - time;
57 if (exep != etiss::RETURNCODE::NOERROR)
58 return exep;
59 time = plugin_cpu_->cpuTime_ps;
60 exep = plugin_system_->dbg_read(plugin_system_, addr, buf, len); // read data
61 time_ps += plugin_cpu_->cpuTime_ps - time;
62 return exep;
63 }
64}
65int32_t SwitchSystem::iwrite(uint64_t &time_ps, uint64_t addr, uint8_t *buf, uint32_t len)
66{
67 if (false)
68 {
69 }
70 else
71 {
73 int32_t exep = plugin_system_->iwrite(plugin_system_, plugin_cpu_, addr, buf, len); // write data
74 time_ps += plugin_cpu_->cpuTime_ps - time;
75 return exep;
76 }
77}
78int32_t SwitchSystem::dread(uint64_t &time_ps, uint64_t addr, uint8_t *buf, uint32_t len)
79{
80 if (false)
81 {
82 }
83 else
84 {
86 int32_t exep = plugin_system_->dread(plugin_system_, plugin_cpu_, addr, buf, len); // write data
87 time_ps += plugin_cpu_->cpuTime_ps - time;
88 return exep;
89 }
90}
91int32_t SwitchSystem::dwrite(uint64_t &time_ps, uint64_t addr, uint8_t *buf, uint32_t len)
92{
93 if (false)
94 {
95 }
96 else
97 {
99 int32_t exep = plugin_system_->dwrite(plugin_system_, plugin_cpu_, addr, buf, len); // write data
100 time_ps += plugin_cpu_->cpuTime_ps - time;
101 return exep;
102 }
103}
static __inline__ uint64_t
Definition arm_cde.h:31
static __inline__ int32_t
Definition arm_mve.h:51
ETISS_CPU * plugin_cpu_
holds a pointer to the cpu structure. will be set before init call and after cleanup call
Definition Plugin.h:195
ETISS_System * plugin_system_
holds a pointer to the system structure.
Definition Plugin.h:196
int32_t dwrite(uint64_t &time_ps, uint64_t addr, uint8_t *buf, uint32_t len)
int32_t iwrite(uint64_t &time_ps, uint64_t addr, uint8_t *buf, uint32_t len)
int32_t dread(uint64_t &time_ps, uint64_t addr, uint8_t *buf, uint32_t len)
int32_t iread(uint64_t &time_ps, uint64_t addr, uint8_t *buf, uint32_t len)
etiss_uint64 cpuTime_ps
simulation time of cpu
Definition CPU.h:97
etiss_int32(* dwrite)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
write data
Definition System.h:97
etiss_int32(* iread)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint32 length)
used to simulate an instruction fetch.
Definition System.h:84
etiss_int32(* dbg_read)(void *handle, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
direct debug read
Definition System.h:104
etiss_int32(* dread)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
read data
Definition System.h:93
etiss_int32(* iwrite)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
write instruction data over instruction bus
Definition System.h:88