ETISS 0.11.2
ExtendableTranslatingInstructionSetSimulator(version0.11.2)
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CPU.h
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1// SPDX-License-Identifier: BSD-3-Clause
2//
3// This file is part of ETISS. It is licensed under the BSD 3-Clause License; you may not use this file except in
4// compliance with the License. You should have received a copy of the license along with this project. If not, see the
5// LICENSE file.
16#ifndef ETISS_INCLUDE_JIT_CPU_H_
17#define ETISS_INCLUDE_JIT_CPU_H_
18
19#include "etiss/jit/types.h"
20
21#define ETISS_MAX_RESOURCES ((int)100)
22
23#ifdef __cplusplus
24extern "C"
25{
26#endif
27
28#pragma pack(push, 1) // NEVER ALLOW ALIGNMENT OF STRUCTURE MEMBERS
50 struct ETISS_CPU
51 {
52
56
58
60
62
63 const char *resources[ETISS_MAX_RESOURCES];
64
66
68
70
72
73 etiss_uint32 exception; // currently active exception of the processor
74 etiss_uint32 return_pending; // flags whether a return from the JIT code is needed
75 };
76#pragma pack(pop)
77
78 typedef struct ETISS_CPU ETISS_CPU;
79
81 const char *registerName); // implemented in CPUArch.cpp
82
83#ifdef __cplusplus
84}
85#endif
86
87#endif
void ETISS_signalChangedRegisterValue(ETISS_CPU *cpu, const char *registerName)
Definition CPUArch.cpp:168
#define ETISS_MAX_RESOURCES
Definition CPU.h:21
uint64_t etiss_uint64
Definition types.h:58
uint32_t etiss_uint32
Definition types.h:55
basic cpu state structure needed for execution of any cpu architecture.
Definition CPU.h:51
etiss_uint64 instructionPointer
pointer to next instruction.
Definition CPU.h:54
etiss_uint32 exception
Definition CPU.h:73
etiss_uint64 cpuCycleTime_ps
frequency of the cpu. use to allign e.g. memory delays
Definition CPU.h:67
etiss_uint64 cpuTime_ps
simulation time of cpu
Definition CPU.h:59
void * _etiss_private_handle_
private helper handle for plugins
Definition CPU.h:69
etiss_uint64 nextPc
Definition CPU.h:57
etiss_uint32 mode
instruction set mode of the processor
Definition CPU.h:71
etiss_uint32 return_pending
Definition CPU.h:74