54 #ifndef ETISS_INCLUDE_CPUARCH_H_
55 #define ETISS_INCLUDE_CPUARCH_H_
68 #include "etiss/jit/CPU.h"
69 #include "etiss/jit/ReturnCode.h"
70 #include "etiss/jit/System.h"
classes to hold code and additional information used for optimization of instruction translations
contains container classes to store instruction definitions + translation functions and build a trans...
defines a general interface to set interrupt bits
Modeling hardware memory management for virtual memory -> physical memory translation and protection.
plugins for extensions to code translation and instruction execution
interface for cpu structure access.
virtual ~CPUArchCPUManipulation()
virtual std::shared_ptr< etiss::VirtualStruct > getVirtualStruct(ETISS_CPU *cpu)=0
this function must return a valid pointer to a virtual struct
provides common basic plugins
virtual etiss::Plugin * newTimer(ETISS_CPU *cpu)
create a simple default timer implementaion instance for this architecture.
virtual void deleteTimer(etiss::Plugin *timer)
delete timer instance
virtual ~CPUArchDefaultPlugins()
allows to inform plugins about changes to a register that is present in the cpu structure.
virtual const std::set< std::string > & getListenerSupportedRegisters()=0
virtual ~CPUArchRegListenerInterface()
static void signalChangedRegisterValue(ETISS_CPU *cpu, const char *registerName)
call this function to inform RegisterDevicePlugins about changed special register values.
the interface to translate instructions of and processor architecture
virtual void deleteCPU(ETISS_CPU *)=0
delete cpu structure
virtual void resetCPU(ETISS_CPU *cpu, etiss::uint64 *startpointer)=0
reset cpu (structure)
virtual etiss::InterruptEnable * createInterruptEnable(ETISS_CPU *cpu)
virtual etiss::mm::MMU * newMMU(ETISS_CPU *cpu)
It is an interface to instanciate a Memory Management Unit.
virtual std::string getIncludePath()
returns a path that will be used to look up header files
virtual const std::set< std::string > & getHeaders() const =0
set of code header files e.g.
CPUArch(std::string archname)
virtual unsigned getMaximumInstructionsPerMetaInstruction()
maximum number of instructions in a meta instruction
virtual std::string getBlockGlobalCode()
get c++ code snippet that is placed at the top of a translated block
virtual etiss::plugin::gdb::GDBCore & getGDBCore()
returns arch dependent gdb functions.
virtual unsigned getInstructionSizeInBytes()=0
size of one instruction/ smalest data unit for instructions of variable length
virtual std::string _getPluginName() const
do not override. maps to getName().
virtual void deleteInterruptVector(etiss::InterruptVector *vec, ETISS_CPU *cpu)
delete an allocated interrupt vector object
virtual etiss::InterruptVector * createInterruptVector(ETISS_CPU *cpu)
allocate a new interrupt vector object for the given cpu
virtual void deleteInterruptEnable(etiss::InterruptEnable *en, ETISS_CPU *cpu)
std::string getArchName() const
returns the name of this architecture.
etiss::plugin::gdb::GDBCore gdbcore_
virtual bool unlikelyInstruction(etiss::uint8 *instr, unsigned length, bool &ismetainstruction)
return true if the given data is unlikely to be an instruction.
virtual unsigned getMaximumInstructionSizeInBytes()=0
used for variable instruction size and delay slots
virtual void compensateEndianess(ETISS_CPU *cpu, etiss::instr::BitArray &ba) const
this function should compensate for any endianess on a BitArray so that bit 0 is always the LSB.
virtual unsigned getSuperInstructionCount()
fixed number of sub instructions per instruction (e.g.
virtual ETISS_CPU * newCPU()=0
allocate new cpu structure
virtual void finalizeInstrSet(etiss::instr::ModedInstructionSet &) const
the default behavior of this function of a cpu arch is to add "cpu->cpuTime_ps += cpu->cpuCycleTime_p...
virtual etiss::int32 handleException(etiss::int32 code, ETISS_CPU *cpu)
translate/process exceptions that occur at runtime
std::string getName() const
returns the name of this architecture.
interface to set interrupt bits
interface class for libraries.
base plugin class that provides access to different plugin functions if present
allows to add code to the translation of instructions
holds etiss::instr::VariableInstructionSet instances for different modes.
provides to architecture dependent registers as defined by gdb
Page Table Entry (PTE) defines the composition of Page Frame Number (PFN) and relavant flags.
float __ovld __cnfn length(float p)
Return the length of vector p, i.e., sqrt(p.x2 + p.y 2 + ...)
basic cpu state structure needed for execution of any cpu architecture.