ETISS 0.8.0
Extendable Translating Instruction Set Simulator (version 0.8.0)
Classes | Namespaces
CPUArch.h File Reference

contains neccesary interfaces for instruction translation. More...

#include <map>
#include <set>
#include <string>
#include "etiss/CodePart.h"
#include "etiss/Instruction.h"
#include "etiss/IntegratedLibrary/gdb/GDBCore.h"
#include "etiss/InterruptVector.h"
#include "etiss/InterruptEnable.h"
#include "etiss/Plugin.h"
#include "etiss/VirtualStruct.h"
#include "etiss/jit/CPU.h"
#include "etiss/jit/ReturnCode.h"
#include "etiss/jit/System.h"
#include "etiss/mm/MMU.h"
Include dependency graph for CPUArch.h:
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Classes

class  etiss::CPUArchRegListenerInterface
 allows to inform plugins about changes to a register that is present in the cpu structure. More...
 
class  etiss::CPUArchCPUManipulation
 interface for cpu structure access. More...
 
class  etiss::CPUArchDefaultPlugins
 provides common basic plugins More...
 
class  etiss::CPUArch
 the interface to translate instructions of and processor architecture More...
 

Namespaces

 etiss
 Page Table Entry (PTE) defines the composition of Page Frame Number (PFN) and relavant flags.
 

Detailed Description

contains neccesary interfaces for instruction translation.


Copyright 2018 Infineon Technologies AG

This file is part of ETISS tool, see https://github.com/tum-ei-eda/etiss.

The initial version of this software has been created with the funding support by the German Federal
Ministry of Education and Research (BMBF) in the project EffektiV under grant 01IS13022.

Redistribution and use in source and binary forms, with or without modification, are permitted
provided that the following conditions are met:

1. Redistributions of source code must retain the above copyright notice, this list of conditions and
the following disclaimer.

2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions
and the following disclaimer in the documentation and/or other materials provided with the distribution.

3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse
or promote products derived from this software without specific prior written permission.

THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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POSSIBILITY OF SUCH DAMAGE.

Author
Marc Greim marc..nosp@m.grei.nosp@m.m@myt.nosp@m.um.d.nosp@m.e, Chair of Electronic Design Automation, TUM
Date
July 23, 2014
Version
0.1

to enable ETISS to translate instructions of a certain ISA the etiss::CPUArch class needs to be extended/implemented. etiss::CPUArch inherits all other classes defined in this header file. Those classes are intended to provide structuring of member functions by purpose.

Definition in file CPUArch.h.