ETISS 0.8.0
Extendable Translating Instruction Set Simulator (version 0.8.0)
Public Member Functions | Private Attributes | List of all members
RV32IMACFDArch Class Reference

#include <RV32IMACFDArch.h>

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Public Member Functions

 RV32IMACFDArch (unsigned int)
 
virtual const std::set< std::string > & getListenerSupportedRegisters ()
 
virtual ETISS_CPUnewCPU ()
 allocate new cpu structure More...
 
virtual void resetCPU (ETISS_CPU *cpu, etiss::uint64 *startpointer)
 reset cpu (structure) More...
 
virtual void deleteCPU (ETISS_CPU *)
 delete cpu structure More...
 
virtual std::shared_ptr< etiss::VirtualStructgetVirtualStruct (ETISS_CPU *cpu)
 get the VirtualStruct of the core to mitigate register access More...
 
virtual unsigned getMaximumInstructionSizeInBytes ()
 
virtual unsigned getInstructionSizeInBytes ()
 
virtual const std::set< std::string > & getHeaders () const
 required headers (RV32IMACFD.h) More...
 
virtual etiss::int32 handleException (etiss::int32 code, ETISS_CPU *cpu)
 This function will be called automatically in order to handling architecure dependent exceptions such as interrupt, system call, illegal instructions. More...
 
virtual void initInstrSet (etiss::instr::ModedInstructionSet &) const
 This function is called during CPUArch initialization. More...
 
virtual void initCodeBlock (etiss::CodeBlock &cb) const
 called before instructions are translated for the code block More...
 
virtual void compensateEndianess (ETISS_CPU *cpu, etiss::instr::BitArray &ba) const
 Target architecture may have inconsistent endianess. More...
 
virtual etiss::InterruptVectorcreateInterruptVector (ETISS_CPU *cpu)
 If interrupt handling is expected, vector table could be provided to support interrupt triggering. More...
 
virtual void deleteInterruptVector (etiss::InterruptVector *vec, ETISS_CPU *cpu)
 delete an allocated interrupt vector object More...
 
virtual etiss::InterruptEnablecreateInterruptEnable (ETISS_CPU *cpu)
 
virtual void deleteInterruptEnable (etiss::InterruptEnable *en, ETISS_CPU *cpu)
 
virtual etiss::plugin::gdb::GDBCoregetGDBCore ()
 get the GDBcore for RV32IMACFD architecture More...
 
- Public Member Functions inherited from etiss::CPUArch
 CPUArch (std::string archname)
 
virtual ~CPUArch ()
 
std::string getArchName () const
 returns the name of this architecture. More...
 
std::string getName () const
 returns the name of this architecture. More...
 
virtual unsigned getMaximumInstructionsPerMetaInstruction ()
 maximum number of instructions in a meta instruction More...
 
virtual unsigned getSuperInstructionCount ()
 fixed number of sub instructions per instruction (e.g. More...
 
virtual std::string getBlockGlobalCode ()
 get c++ code snippet that is placed at the top of a translated block More...
 
virtual bool unlikelyInstruction (etiss::uint8 *instr, unsigned length, bool &ismetainstruction)
 return true if the given data is unlikely to be an instruction. More...
 
virtual std::string getIncludePath ()
 returns a path that will be used to look up header files More...
 
virtual void finalizeInstrSet (etiss::instr::ModedInstructionSet &) const
 the default behavior of this function of a cpu arch is to add "cpu->cpuTime_ps += cpu->cpuCycleTime_ps;" if the cpu time update group is not in use More...
 
virtual etiss::mm::MMUnewMMU (ETISS_CPU *cpu)
 It is an interface to instanciate a Memory Management Unit. More...
 
- Public Member Functions inherited from etiss::CPUArchRegListenerInterface
virtual ~CPUArchRegListenerInterface ()
 
- Public Member Functions inherited from etiss::CPUArchCPUManipulation
virtual ~CPUArchCPUManipulation ()
 
- Public Member Functions inherited from etiss::CPUArchDefaultPlugins
virtual ~CPUArchDefaultPlugins ()
 
virtual etiss::PluginnewTimer (ETISS_CPU *cpu)
 create a simple default timer implementaion instance for this architecture. More...
 
virtual void deleteTimer (etiss::Plugin *timer)
 delete timer instance More...
 
- Public Member Functions inherited from etiss::TranslationPlugin
 TranslationPlugin ()
 
virtual ~TranslationPlugin ()
 
virtual void finalizeCodeBlock (etiss::CodeBlock &) const
 called after all instructions have been translated for the code block More...
 
virtual void * getPluginHandle ()
 called to get the handle that is available in translated code via getPoinerCode(). [default: this] More...
 
- Public Member Functions inherited from etiss::Plugin
virtual ~Plugin ()
 
unsigned getType ()
 
InterruptListenerPlugingetInterruptListenerPlugin ()
 
CoroutinePlugingetCoroutinePlugin ()
 
SystemWrapperPlugingetSystemWrapperPlugin ()
 
RegisterDevicePlugingetRegisterDevicePlugin ()
 
TranslationPlugingetTranslationPlugin ()
 
std::string getPluginName () const
 
const std::string & getLastAssignedCoreName ()
 
std::string toString () const
 
- Public Member Functions inherited from etiss::ToString
 ToString ()
 
virtual ~ToString ()
 

Private Attributes

std::set< std::string > listenerSupportedRegisters_
 
std::set< std::string > headers_
 
RV32IMACFDGDBCore gdbcore_
 
unsigned int coreno_
 

Additional Inherited Members

- Static Public Member Functions inherited from etiss::CPUArchRegListenerInterface
static void signalChangedRegisterValue (ETISS_CPU *cpu, const char *registerName)
 call this function to inform RegisterDevicePlugins about changed special register values. More...
 
- Static Public Attributes inherited from etiss::Plugin
static const unsigned INTERRUPTLISTENER = 1 << 0
 access to translated code More...
 
static const unsigned COROUTINE = 1 << 1
 callback after execution of each translated block More...
 
static const unsigned SYSTEMWRAPPER = 1 << 2
 can wrap/change ETISS_System structure at execution start More...
 
static const unsigned REGISTERDEVICE
 gets noticed of changes to special registers (e.g. mmu register etc. [depends on architecture]) More...
 
static const unsigned TRANSLATION
 access to translated code during translation phase or when instruction tree is built More...
 
- Protected Member Functions inherited from etiss::CPUArch
virtual std::string _getPluginName () const
 do not override. maps to getName(). More...
 
- Protected Member Functions inherited from etiss::TranslationPlugin
std::string getPointerCode () const
 returns a C code expression that allows to get or assign a pointer to the variable assigned to this translation plugin. More...
 
- Protected Member Functions inherited from etiss::Plugin
 Plugin (unsigned type=0)
 
virtual void init (ETISS_CPU *cpu, ETISS_System *system, CPUArch *arch)
 this function is called before the plugin is used in the cpu execution loop (etiss::CPUCore::execute). More...
 
virtual void cleanup ()
 this function is called after cpu execution loop (etiss::CPUCore::execute) finished. More...
 
void setCorrespondingCPUCoreName (std::string name)
 
virtual void addedToCPUCore (etiss::CPUCore *core)
 called as soon a plugin has been added to its CPUCore. More...
 
virtual void removedFromCPUCore (etiss::CPUCore *core)
 called as soon a plugin has been removed from its CPUCore. More...
 
- Protected Attributes inherited from etiss::Plugin
ETISS_CPUplugin_cpu_
 holds a pointer to the cpu structure. will be set before init call and after cleanup call More...
 
ETISS_Systemplugin_system_
 holds a pointer to the system structure. More...
 
CPUArchplugin_arch_
 holds a pointer to the CPUArch instance. will be set before init call and after cleanup call More...
 
CPUCoreplugin_core_
 holds a pointer to the associated CPUCore instance. More...
 

Detailed Description

Definition at line 28 of file RV32IMACFDArch.h.

Constructor & Destructor Documentation

◆ RV32IMACFDArch()

RV32IMACFDArch::RV32IMACFDArch ( unsigned int  coreno)

Definition at line 44 of file RV32IMACFDArch.cpp.

References headers_.

Member Function Documentation

◆ compensateEndianess()

void RV32IMACFDArch::compensateEndianess ( ETISS_CPU cpu,
etiss::instr::BitArray ba 
) const
virtual

Target architecture may have inconsistent endianess.

This function is called whenever a data is read from memory.

Data read from memory is buffered, and this function is called to alter sequence of buffered data so that the inconsistent endianess is compensated.

See also
RV32IMACFDArchSpecificImp.h

Target architecture may have inconsistent endianess. Data read from memory is buffered, and this function is called to alter sequence of buffered data so that the inconsistent endianess is compensated. Example for ARMv6M: void * ptr = ba.internalBuffer(); if (ba.byteCount() == 2) { ((uint32_t*)ptr) = ((uint16_t)(*((uint8_t*)ptr))) | ((uint16_t)(*(((uint8_t*)ptr)+1)) << 8); } else if (ba.byteCount() == 4) { ((uint32_t*)ptr) = ((((uint32_t)(*((uint8_t*)ptr))) | ((uint32_t)(*(((uint8_t*)ptr)+1)) << 8)) << 16) | ((uint32_t)(*(((uint8_t*)ptr)+2)) ) | ((uint32_t)(*(((uint8_t*)ptr)+3)) << 8); } else { etiss::log(etiss::FATALERROR,"Endianess cannot be handled",ba.byteCount()); }

Attention
Default endianess: little-endian

Reimplemented from etiss::CPUArch.

Definition at line 309 of file RV32IMACFDArchSpecificImp.cpp.

◆ createInterruptEnable()

etiss::InterruptEnable * RV32IMACFDArch::createInterruptEnable ( ETISS_CPU cpu)
virtual

Reimplemented from etiss::CPUArch.

Definition at line 359 of file RV32IMACFDArchSpecificImp.cpp.

◆ createInterruptVector()

etiss::InterruptVector * RV32IMACFDArch::createInterruptVector ( ETISS_CPU cpu)
virtual

If interrupt handling is expected, vector table could be provided to support interrupt triggering.

See also
RV32IMACFDArchSpecificImp.h

Interrupt vector table is used to inform the core whenever an edge/level triggered interrupt incoming. The content of interrupt vector could be a special register or standalone interrupt lines.

Reimplemented from etiss::CPUArch.

Definition at line 340 of file RV32IMACFDArchSpecificImp.cpp.

◆ deleteCPU()

void RV32IMACFDArch::deleteCPU ( ETISS_CPU )
virtual

delete cpu structure

Implements etiss::CPUArch.

Definition at line 183 of file RV32IMACFDArch.cpp.

◆ deleteInterruptEnable()

void RV32IMACFDArch::deleteInterruptEnable ( etiss::InterruptEnable en,
ETISS_CPU cpu 
)
virtual

Reimplemented from etiss::CPUArch.

Definition at line 363 of file RV32IMACFDArchSpecificImp.cpp.

◆ deleteInterruptVector()

void RV32IMACFDArch::deleteInterruptVector ( etiss::InterruptVector vec,
ETISS_CPU cpu 
)
virtual

delete an allocated interrupt vector object

Reimplemented from etiss::CPUArch.

Definition at line 354 of file RV32IMACFDArchSpecificImp.cpp.

◆ getGDBCore()

etiss::plugin::gdb::GDBCore & RV32IMACFDArch::getGDBCore ( )
virtual

get the GDBcore for RV32IMACFD architecture

See also
RV32IMACFDGDBCore.h for implementation of GDBcore

Reimplemented from etiss::CPUArch.

Definition at line 221 of file RV32IMACFDArch.cpp.

References gdbcore_.

◆ getHeaders()

const std::set< std::string > & RV32IMACFDArch::getHeaders ( ) const
virtual

required headers (RV32IMACFD.h)

Implements etiss::CPUArch.

Definition at line 207 of file RV32IMACFDArch.cpp.

References headers_.

◆ getInstructionSizeInBytes()

unsigned RV32IMACFDArch::getInstructionSizeInBytes ( )
virtual
Returns
2

Implements etiss::CPUArch.

Definition at line 199 of file RV32IMACFDArch.cpp.

◆ getListenerSupportedRegisters()

const std::set< std::string > & RV32IMACFDArch::getListenerSupportedRegisters ( )
virtual
See also
CPUArchRegListenerInterface::signalChangedRegisterValue

Implements etiss::CPUArchRegListenerInterface.

Definition at line 49 of file RV32IMACFDArch.cpp.

References listenerSupportedRegisters_.

◆ getMaximumInstructionSizeInBytes()

unsigned RV32IMACFDArch::getMaximumInstructionSizeInBytes ( )
virtual
Returns
8 (jump instruction + instruction of delay slot)

Implements etiss::CPUArch.

Definition at line 191 of file RV32IMACFDArch.cpp.

◆ getVirtualStruct()

std::shared_ptr< etiss::VirtualStruct > RV32IMACFDArch::getVirtualStruct ( ETISS_CPU cpu)
virtual

get the VirtualStruct of the core to mitigate register access

See also
RV32IMACFDArchSpecificImp.h

Implements etiss::CPUArchCPUManipulation.

Definition at line 316 of file RV32IMACFDArchSpecificImp.cpp.

References etiss::VirtualStruct::allocate(), and uint32_t.

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◆ handleException()

etiss::int32 RV32IMACFDArch::handleException ( etiss::int32  cause,
ETISS_CPU cpu 
)
virtual

This function will be called automatically in order to handling architecure dependent exceptions such as interrupt, system call, illegal instructions.

Generated on Thu, 24 Feb 2022 17:15:20 +0100.

See also
RV32IMACFDArchSpecificImp.h

This file contains the architecture specific implementation for the RV32IMACFD core architecture.

WARNING: This file contains user-added code, be mindful when overwriting this with generated code!

This function will be called automatically in order to handling exceptions such as interrupt, system call, illegal instructions

Exception handling mechanism is implementation dependent for each cpu variant. Please add it to the following block if exception handling is demanded. Pesudo example: switch(cause){ case etiss::RETURNCODE::INTERRUPT: break;

Reimplemented from etiss::CPUArch.

Definition at line 31 of file RV32IMACFDArchSpecificImp.cpp.

References ETISS_CPU::instructionPointer, ETISS_CPU::nextPc, and RV32IMACFD_translate_exc_code().

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◆ initCodeBlock()

void RV32IMACFDArch::initCodeBlock ( etiss::CodeBlock ) const
virtual

called before instructions are translated for the code block

Reimplemented from etiss::TranslationPlugin.

Definition at line 212 of file RV32IMACFDArch.cpp.

References etiss::CodeBlock::fileglobalCode(), and etiss::CodeBlock::functionglobalCode().

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◆ initInstrSet()

void RV32IMACFDArch::initInstrSet ( etiss::instr::ModedInstructionSet mis) const
virtual

This function is called during CPUArch initialization.

See also
RV32IMACFDArchSpecificImp.h

Function pointer length_updater_ has to be replaced if multiple length instruction execution is supported. This function enables dynamic instruction length update in order to guarantee correct binary translation Pesudo example: vis->length_updater_ = [](VariableInstructionSet & ,InstructionContext & ic, BitArray & ba) { switch(ba.byteCount()){ case 4: if ( INSTRUCTION_LENTH_NOT_EQUAL(4)){ updateInstrLength(ic, ba); ic.is_not_default_width_ = true; } break; } };

Reimplemented from etiss::TranslationPlugin.

Definition at line 60 of file RV32IMACFDArchSpecificImp.cpp.

References etiss::RegisterSet::add(), etiss::instr::Instruction::addCallback(), etiss::instr::InstructionCollection::addTo(), etiss::CodeSet::append(), etiss::instr::BitArray::byteCount(), etiss::cfg(), etiss::CodePart::code(), etiss::instr::ModedInstructionSet::compile(), etiss::instr::InstructionContext::current_address_, etiss::FATALERROR, etiss::Configuration::get(), etiss::instr::ModedInstructionSet::get(), etiss::instr::VariableInstructionSet::get(), etiss::CodePart::getAffectedRegisters(), etiss::instr::InstructionSet::getInvalid(), if(), etiss::instr::InstructionContext::instr_width_, etiss::instr::InstructionContext::instr_width_fully_evaluated_, etiss::instr::InstructionContext::is_not_default_width_, etiss::instr::VariableInstructionSet::length_updater_, etiss::log(), etiss::instr::ModedInstructionSet::print(), etiss::instr::BitArrayRange::read(), RV32IMACFDISA, and etiss::Configuration::set().

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◆ newCPU()

ETISS_CPU * RV32IMACFDArch::newCPU ( )
virtual

allocate new cpu structure

Implements etiss::CPUArch.

Definition at line 54 of file RV32IMACFDArch.cpp.

References resetCPU().

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◆ resetCPU()

void RV32IMACFDArch::resetCPU ( ETISS_CPU cpu,
etiss::uint64 startpointer 
)
virtual

Member Data Documentation

◆ coreno_

unsigned int RV32IMACFDArch::coreno_
private

Definition at line 107 of file RV32IMACFDArch.h.

◆ gdbcore_

RV32IMACFDGDBCore RV32IMACFDArch::gdbcore_
private

Definition at line 106 of file RV32IMACFDArch.h.

Referenced by getGDBCore().

◆ headers_

std::set<std::string> RV32IMACFDArch::headers_
private

Definition at line 105 of file RV32IMACFDArch.h.

Referenced by getHeaders(), and RV32IMACFDArch().

◆ listenerSupportedRegisters_

std::set<std::string> RV32IMACFDArch::listenerSupportedRegisters_
private

Definition at line 104 of file RV32IMACFDArch.h.

Referenced by getListenerSupportedRegisters().


The documentation for this class was generated from the following files: