RV32IMACFDArch.h

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#ifndef ETISS_RV32IMACFDArch_RV32IMACFDArch_H_
#define ETISS_RV32IMACFDArch_RV32IMACFDArch_H_
 
#include "etiss/CPUArch.h"
#include "etiss/Instruction.h"
#include "etiss/InterruptVector.h"
#include "etiss/InterruptEnable.h"
#include "RV32IMACFD.h"
#include "RV32IMACFDGDBCore.h"
 
#include <map>
 
extern const char * const reg_name[];
 
extern etiss::instr::InstructionGroup ISA16_RV32IMACFD;
extern etiss::instr::InstructionClass ISA16_RV32IMACFDClass;
extern etiss::instr::InstructionGroup ISA32_RV32IMACFD;
extern etiss::instr::InstructionClass ISA32_RV32IMACFDClass;
 
extern etiss::instr::InstructionCollection RV32IMACFDISA;
 
class RV32IMACFDArch : public etiss::CPUArch {
 
public:
        RV32IMACFDArch(unsigned int);
 
        virtual const std::set<std::string> & getListenerSupportedRegisters();
 
 
        virtual ETISS_CPU * newCPU();
        virtual void resetCPU(ETISS_CPU * cpu,etiss::uint64 * startpointer);
        virtual void deleteCPU(ETISS_CPU *);
 
        virtual std::shared_ptr<etiss::VirtualStruct> getVirtualStruct(ETISS_CPU * cpu);
 
        virtual unsigned getMaximumInstructionSizeInBytes();
 
        virtual unsigned getInstructionSizeInBytes();
 
        virtual const std::set<std::string> & getHeaders() const;
 
        virtual etiss::int32 handleException(etiss::int32 code, ETISS_CPU * cpu);
 
        virtual void initInstrSet(etiss::instr::ModedInstructionSet & ) const;
        virtual void initCodeBlock(etiss::CodeBlock & cb) const;
 
        virtual void compensateEndianess(ETISS_CPU * cpu, etiss::instr::BitArray & ba) const ;
 
        virtual etiss::InterruptVector * createInterruptVector(ETISS_CPU * cpu);
        virtual void deleteInterruptVector(etiss::InterruptVector * vec, ETISS_CPU * cpu);
        virtual etiss::InterruptEnable* createInterruptEnable(ETISS_CPU *cpu);
        virtual void deleteInterruptEnable(etiss::InterruptEnable* en, ETISS_CPU* cpu);
 
        virtual etiss::plugin::gdb::GDBCore & getGDBCore();
 
private:
        std::set<std::string> listenerSupportedRegisters_;
        std::set<std::string> headers_;
        RV32IMACFDGDBCore gdbcore_;
        unsigned int coreno_;
};
class RV32IMACFDArch : public etiss::CPUArch {…};
#endif