51 #ifndef ETISS_INCLUDE_CPUCORE_H_
52 #define ETISS_INCLUDE_CPUCORE_H_
64 #include "etiss/jit/ReturnCode.h"
78 #define ETISS_CPUCORE_DBG_APPROXIMATE_INSTRUCTION_COUNTER 0
127 CPUCore(std::shared_ptr<etiss::CPUArch> arch);
132 std::list<etiss::InterruptListenerPlugin *>
plugins_;
137 virtual void setBit(
unsigned bit,
bool state);
138 virtual bool getBit(
unsigned bit)
const;
139 virtual unsigned width()
const;
141 virtual void clear();
181 virtual inline std::shared_ptr<etiss::mm::MMU>
getMMU() {
return mmu_; }
211 inline void set(std::shared_ptr<etiss::JIT> jit) {
jit_ = jit; }
222 std::lock_guard<std::mutex> lock(
mu_);
240 void addPlugin(std::shared_ptr<etiss::Plugin> plugin);
247 void removePlugin(std::shared_ptr<etiss::Plugin> plugin);
254 std::lock_guard<std::mutex> lock(
mu_);
289 std::shared_ptr<ETISS_System> sys =
etiss::wrap(&system);
291 return RETURNCODE::GENERALERROR;
317 std::shared_ptr<etiss::JIT> jit =
jit_;
320 return jit->getName();
341 inline std::shared_ptr<Plugin>
getPlugin(std::string name)
346 if (iter->_getPluginName() == name)
372 static std::shared_ptr<CPUCore>
create(
373 std::string archname,
374 std::string instancename =
"",
375 std::map<std::string, std::string> archoptions = std::map<std::string, std::string>());
382 static std::list<std::string>
list();
385 std::shared_ptr<etiss::CPUArch>
arch_;
389 std::shared_ptr<etiss::VirtualStruct>
vcpu_;
394 std::shared_ptr<etiss::JIT>
404 std::shared_ptr<etiss::mm::MMU>
mmu_;
412 static std::list<std::weak_ptr<CPUCore>>
contains neccesary interfaces for instruction translation.
Wrapper class to wrap aroud data MMU.
interrupt checking and signaling
JIT compiler interface definition.
class for simple library access.
Modeling hardware memory management for virtual memory -> physical memory translation and protection.
general configuration and logging
Internal fault inside MMU and.
plugins for extensions to code translation and instruction execution
static __inline__ uint64_t
allows to inform plugins about changes to a register that is present in the cpu structure.
virtual void setBit(unsigned bit, bool state)
set the bit of an interrupt line to state (true = raised)
virtual unsigned width() const
number of interrupt bits
virtual bool getBit(unsigned bit) const
get the bit of an interrupt line
virtual bool isActive() const
std::list< etiss::InterruptListenerPlugin * > plugins_
InterruptVectorWrapper(CPUCore &parent)
virtual void clear()
sets every bit to false
CPUCore is responsible for the simulation of a CPU core in ETISS.
const int & getID()
Get the ID of the CPUCore instance.
CPUCore(std::shared_ptr< etiss::CPUArch > arch)
Private constructor of CPUCore.
std::shared_ptr< etiss::mm::MMU > mmu_
void removePlugins()
Remove all plug-ins from the core simulator.
std::mutex mu_
JIT instance to use. may be 0 (etiss::getDefaultJIT() will be used in that case)
const int id_
name of the cpu core
std::list< std::shared_ptr< Plugin > > const * getPlugins()
returns the list of all plugins.
void setBlockChainCount(unsigned bcc)
Set the number of blocks jumps in between the coroutines are not executed.
etiss::InterruptVector * intvector_
etiss::int32 execute(etiss::System &system)
Start the simulation of the CPU core for the system model.
std::list< std::shared_ptr< Plugin > > plugins
mutex to lock the configuration of this cpu core.
etiss::InterruptEnable * getInterruptEnable()
virtual std::shared_ptr< etiss::mm::MMU > getMMU()
Get the Memory Management Unit(MMU) of this CPUCore instance.
unsigned exception_skip_count_
etiss::int32 execute(ETISS_System &system)
Start the simulation of the CPU core for the system model.
static std::mutex instances_mu_
this field is always present to maintain API compatibility but it is only used if ETISS_CPUCORE_DBG_A...
bool mmu_enabled_
TODO: possibility to limit the cache size.
std::shared_ptr< etiss::JIT > jit_
if true the a timer plugin allocated by arch_ will be added in CPUCore::execute
static std::list< std::string > list()
returns a list of currently present CPU cores
std::shared_ptr< etiss::CPUArch > arch_
std::string getJITName()
Get the name of the JIT plug-in used by the CPUCore instance.
std::shared_ptr< etiss::CPUArch > getArch()
Get the CPU architecture.
InterruptVectorWrapper * intwrapper_
cpu interrupt vector derived from cpu_ and allocated by arch_
static std::shared_ptr< CPUCore > create(std::string archname, std::string instancename="", std::map< std::string, std::string > archoptions=std::map< std::string, std::string >())
Create a CPUCore instance.
std::shared_ptr< etiss::JIT > getJIT()
Get a reference to the JIT plugin.
unsigned bcc_
list of all plugins
const std::string & toString() const
Get a string representation of the object.
std::string name_
cpu architecture of this cpu core. may never be 0 or changed
ETISS_CPU * cpu_
ID of the cpu core.
void addPlugin(std::shared_ptr< etiss::Plugin > plugin)
Adds a plug-in to the core simulator.
void set(std::shared_ptr< etiss::JIT > jit)
Set the JIT plug-in used for execution.
ETISS_CPU * getState()
Get the CPU state structure containing instruction pointer, frequency, etc.
std::shared_ptr< etiss::VirtualStruct > vcpu_
cpu state structure allocated by arch_
static std::list< std::weak_ptr< CPUCore > > instances_
mutext for access to a list of cpu core instances
void removePlugin(std::shared_ptr< etiss::Plugin > plugin)
Remove a plug-in from the core simulator.
std::shared_ptr< Plugin > getPlugin(std::string name)
returns the plugin with the given name.
virtual std::shared_ptr< VirtualStruct > getStruct()
Get the virtual structure of this CPUCore instance.
const std::string & getName()
Get the name of the CPUCore instance.
etiss::InterruptEnable * intenable_
wrapped interrupt vector to allow interrupt listening
void setTimer(bool on)
Enable or disable the timer of the CPU.
etiss::InterruptVector * getInterruptVector()
Get the interrupt vector of simulated CPU.
void reset(etiss::uint64 *startindex)
Reset the CPU state.
interface to set interrupt bits
System Interface for the basic system IO operations and time synchronization.
Marker interface for toString() support.
conatins a convinience class that can be wrapped as a ETISS_System structure
Page Table Entry (PTE) defines the composition of Page Frame Number (PFN) and relavant flags.
std::shared_ptr< ETISS_System > wrap(etiss::System *sys)
wraps a etiss::System in a ETISS_System structure.
basic cpu state structure needed for execution of any cpu architecture.
memory access and time synchronization functions.