111 ret->
handle = (
void *)sys;
113 return std::shared_ptr<ETISS_System>(ret);
142 if (!
write(
false, cpu, addr, buf, len))
143 return etiss::RETURNCODE::IBUS_WRITE_ERROR;
149 if (!
read(
false, cpu, addr, buf, len))
150 return etiss::RETURNCODE::DBUS_READ_ERROR;
156 if (!
write(
false, cpu, addr, buf, len))
157 return etiss::RETURNCODE::IBUS_WRITE_ERROR;
163 if (!
read(
true, 0, addr, buf, len))
164 return etiss::RETURNCODE::DBUS_READ_ERROR;
170 if (!
write(
true, 0, addr, buf, len))
171 return etiss::RETURNCODE::DBUS_WRITE_ERROR;
static void system_call_syncTime(void *handle, ETISS_CPU *cpu)
static etiss_int32 system_call_dbg_read(void *handle, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
static etiss_int32 system_call_iread(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint32 length)
static etiss_int32 system_call_dwrite(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
static etiss_int32 system_call_dread(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
int ETISS_System_isvalid(ETISS_System *sys)
static etiss_int32 system_call_dbg_write(void *handle, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
static etiss_int32 system_call_iwrite(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
struct ETISS_System ETISS_System
virtual etiss::int32 dread(ETISS_CPU *cpu, etiss::uint64 addr, etiss::uint8 *buf, etiss::uint32 len)
Data read operation.
virtual etiss::int32 dwrite(ETISS_CPU *cpu, etiss::uint64 addr, etiss::uint8 *buf, etiss::uint32 len)
Data write operation.
virtual etiss::int32 iread(ETISS_CPU *cpu, etiss::uint64 addr, etiss::uint32 len)
Instruction read operation.
virtual bool write(bool debug, ETISS_CPU *cpu, etiss::uint64 addr, etiss::uint8 *buf, etiss::uint32 len)=0
virtual etiss::int32 dbg_read(etiss::uint64 addr, etiss::uint8 *buf, etiss::uint32 len)
Debug read operation.
virtual etiss::int32 dbg_write(etiss::uint64 addr, etiss::uint8 *buf, etiss::uint32 len)
Debug write operation.
virtual bool read(bool debug, ETISS_CPU *cpu, etiss::uint64 addr, etiss::uint8 *buf, etiss::uint32 len)=0
virtual etiss::int32 iwrite(ETISS_CPU *cpu, etiss::uint64 addr, etiss::uint8 *buf, etiss::uint32 len)
Instruction write operation.
virtual void syncTime(ETISS_CPU *cpu)
Synchronize simulation time.
System Interface for the basic system IO operations and time synchronization.
conatins a convinience class that can be wrapped as a ETISS_System structure
Page Table Entry (PTE) defines the composition of Page Frame Number (PFN) and relavant flags.
etiss::int32 dbg_print(etiss::uint32 reg)
std::shared_ptr< ETISS_System > wrap(etiss::System *sys)
wraps a etiss::System in a ETISS_System structure.
float __ovld __cnfn length(float p)
Return the length of vector p, i.e., sqrt(p.x2 + p.y 2 + ...)
basic cpu state structure needed for execution of any cpu architecture.
memory access and time synchronization functions.
etiss_int32(* dwrite)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
write data
etiss_int32(* iread)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint32 length)
used to simulate an instruction fetch.
void * handle
custom handle that will be passed to the functions of this structure
etiss_int32(* dbg_write)(void *handle, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
direct debug write
etiss_int32(* dbg_read)(void *handle, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
direct debug read
etiss_int32(* dread)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
read data
void(* syncTime)(void *handle, ETISS_CPU *cpu)
called after a block to synchronize the time
etiss_int32(* iwrite)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
write instruction data over instruction bus