ETISS 0.8.0
Extendable Translating Instruction Set Simulator (version 0.8.0)
DMMUWrapper.cpp
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1 
52 #include "etiss/mm/DMMUWrapper.h"
53 
54 namespace etiss
55 {
56 namespace mm
57 {
58 
59 static etiss_int32 iread(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint32 length)
60 {
61 
62  int32_t exception;
63  DMMUWrapperSystem *msys = ((DMMUWrapperSystem *)handle);
64  std::shared_ptr<MMU> mmu = ((DMMUWrapper *)msys->this_)->mmu_;
65 
66  // vma to pma translation
67  uint64_t pma = 0;
68  if (unlikely(exception = mmu->Translate(addr, &pma, MM_ACCESS::R_ACCESS)))
69  return exception;
70  std::stringstream msg;
71  msg << "Virtual memory: 0x" << std::hex << addr << " is translated into physical address 0x:" << std::hex << pma
72  << std::endl;
73  etiss::log(etiss::VERBOSE, msg.str());
74  ETISS_System *sys = msys->orig;
75  return sys->iread(sys->handle, cpu, pma, length);
76 }
77 
78 static etiss_int32 iwrite(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
79 {
80 
81  int32_t exception;
82  DMMUWrapperSystem *msys = ((DMMUWrapperSystem *)handle);
83  std::shared_ptr<MMU> mmu = ((DMMUWrapper *)msys->this_)->mmu_;
84 
85  // vma to pma translation
86  uint64_t pma = 0;
87  if (unlikely(exception = mmu->Translate(addr, &pma, MM_ACCESS::W_ACCESS)))
88  return exception;
89  std::stringstream msg;
90  msg << "Virtual memory: 0x" << std::hex << addr << " is translated into physical address 0x:" << std::hex << pma
91  << std::endl;
92  etiss::log(etiss::VERBOSE, msg.str());
93  ETISS_System *sys = msys->orig;
94  return sys->iwrite(sys->handle, cpu, pma, buffer, length);
95 }
96 
97 static etiss_int32 dread(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
98 {
99 
100  int32_t exception;
101  DMMUWrapperSystem *msys = ((DMMUWrapperSystem *)handle);
102  std::shared_ptr<MMU> mmu = ((DMMUWrapper *)msys->this_)->mmu_;
103 
104  // vma to pma translation
105  uint64_t pma = 0;
106  if (unlikely(exception = mmu->Translate(addr, &pma, MM_ACCESS::R_ACCESS)))
107  return exception;
108  std::stringstream msg;
109 
110  ETISS_System *sys = msys->orig;
111  return sys->dread(sys->handle, cpu, pma, buffer, length);
112 }
113 
114 static etiss_int32 dwrite(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
115 {
116 
117  int32_t exception;
118  DMMUWrapperSystem *msys = ((DMMUWrapperSystem *)handle);
119  std::shared_ptr<MMU> mmu = ((DMMUWrapper *)msys->this_)->mmu_;
120 
121  // vma to pma translation
122  uint64_t pma = 0;
123  if (unlikely(exception = mmu->Translate(addr, &pma, MM_ACCESS::W_ACCESS)))
124  return exception;
125  std::stringstream msg;
126 
127  ETISS_System *sys = msys->orig;
128  return sys->dwrite(sys->handle, cpu, pma, buffer, length);
129 }
130 
131 static etiss_int32 dbg_read(void *handle, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
132 {
133 
134  int32_t exception;
135  DMMUWrapperSystem *msys = ((DMMUWrapperSystem *)handle);
136  std::shared_ptr<MMU> mmu = ((DMMUWrapper *)msys->this_)->mmu_;
137 
138  // vma to pma translation
139  uint64_t pma = 0;
140  if (unlikely(exception = mmu->Translate(addr, &pma, MM_ACCESS::X_ACCESS)))
141  return etiss::RETURNCODE::PAGEFAULT;
142 
143  ETISS_System *sys = msys->orig;
144  return sys->dbg_read(sys->handle, pma, buffer, length);
145 }
146 
147 static etiss_int32 dbg_write(void *handle, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
148 {
149 
150  int32_t exception;
151  DMMUWrapperSystem *msys = ((DMMUWrapperSystem *)handle);
152  std::shared_ptr<MMU> mmu = ((DMMUWrapper *)msys->this_)->mmu_;
153 
154  // vma to pma translation
155  uint64_t pma = 0;
156  if (unlikely(exception = mmu->Translate(addr, &pma, MM_ACCESS::W_ACCESS)))
157  return exception;
158  std::stringstream msg;
159  msg << "Virtual memory: 0x" << std::hex << addr << " is translated into physical address 0x:" << std::hex << pma
160  << std::endl;
161  etiss::log(etiss::VERBOSE, msg.str());
162  ETISS_System *sys = msys->orig;
163  return sys->dbg_write(sys->handle, pma, buffer, length);
164 }
165 
166 static void syncTime(void *handle, ETISS_CPU *cpu)
167 {
168  DMMUWrapperSystem *msys = ((DMMUWrapperSystem *)handle);
169  ETISS_System *sys = msys->orig;
170  sys->syncTime(sys->handle, cpu);
171 }
172 
173 DMMUWrapper::DMMUWrapper(std::shared_ptr<MMU> mmu) : mmu_(mmu) {}
174 
178 ETISS_System *DMMUWrapper::wrap(ETISS_CPU *cpu, ETISS_System *system)
179 {
180 
181  mmu_->Init(cpu, system);
182 
183  DMMUWrapperSystem *ret = new DMMUWrapperSystem();
184 
185  ret->sys.iread = &iread;
186  ret->sys.iwrite = &iwrite;
187  ret->sys.dread = &dread;
188  ret->sys.dwrite = &dwrite;
189  ret->sys.dbg_read = &dbg_read;
190  ret->sys.dbg_write = &dbg_write;
191  ret->sys.syncTime = &syncTime;
192 
193  ret->sys.handle = (void *)ret;
194  ret->this_ = this;
195  ret->orig = system;
196 
197  return (ETISS_System *)ret;
198 }
199 
203 ETISS_System *DMMUWrapper::unwrap(ETISS_CPU *cpu, ETISS_System *system)
204 {
205  ETISS_System *ret = ((DMMUWrapperSystem *)system)->orig;
206  delete system;
207  return ret;
208 }
209 
210 std::string DMMUWrapper::_getPluginName() const
211 {
212  return mmu_->GetName() + std::string(" Wrapper");
213 }
214 
215 } // namespace mm
216 } // namespace etiss
DMMUWrapper.h
Wrapper class to wrap aroud data MMU.
uint64_t
static __inline__ uint64_t
Definition: arm_cde.h:31
int32_t
static __inline__ int32_t
Definition: arm_mve.h:51
etiss_uint64
uint64_t etiss_uint64
Definition: types.h:96
etiss_uint32
uint32_t etiss_uint32
Definition: types.h:93
unlikely
#define unlikely(x)
Definition: types.h:74
etiss_uint8
uint8_t etiss_uint8
Definition: types.h:87
etiss_int32
int32_t etiss_int32
Definition: types.h:92
etiss::mm::DMMUWrapper::mmu_
std::shared_ptr< MMU > mmu_
Definition: DMMUWrapper.h:84
etiss::mm::DMMUWrapper::DMMUWrapper
DMMUWrapper(std::shared_ptr< MMU > mmu)
Definition: DMMUWrapper.cpp:173
etiss::mm::DMMUWrapper::_getPluginName
std::string _getPluginName() const
Definition: DMMUWrapper.cpp:210
etiss::mm::DMMUWrapper::unwrap
ETISS_System * unwrap(ETISS_CPU *cpu, ETISS_System *system)
SystemWrapperPlugin interface to unwrap original ETISS_System.
Definition: DMMUWrapper.cpp:203
etiss::mm::DMMUWrapper::wrap
ETISS_System * wrap(ETISS_CPU *cpu, ETISS_System *system)
SystemWrapperPlugin interface to wrap around original ETISS_System.
Definition: DMMUWrapper.cpp:178
etiss::mm::dbg_write
static etiss_int32 dbg_write(void *handle, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
Definition: DMMUWrapper.cpp:147
etiss::mm::dbg_read
static etiss_int32 dbg_read(void *handle, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
Definition: DMMUWrapper.cpp:131
etiss::mm::iwrite
static etiss_int32 iwrite(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
Definition: DMMUWrapper.cpp:78
etiss::mm::iread
static etiss_int32 iread(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint32 length)
Definition: DMMUWrapper.cpp:59
etiss::mm::syncTime
static void syncTime(void *handle, ETISS_CPU *cpu)
Definition: DMMUWrapper.cpp:166
etiss::mm::dwrite
static etiss_int32 dwrite(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
Definition: DMMUWrapper.cpp:114
etiss::mm::dread
static etiss_int32 dread(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
Definition: DMMUWrapper.cpp:97
etiss
Page Table Entry (PTE) defines the composition of Page Frame Number (PFN) and relavant flags.
Definition: Benchmark.h:53
etiss::VERBOSE
@ VERBOSE
Definition: Misc.h:130
etiss::log
void log(Verbosity level, std::string msg)
write log message at the given level.
Definition: Misc.cpp:125
length
float __ovld __cnfn length(float p)
Return the length of vector p, i.e., sqrt(p.x2 + p.y 2 + ...)
ETISS_CPU
basic cpu state structure needed for execution of any cpu architecture.
Definition: CPU.h:89
ETISS_System
memory access and time synchronization functions.
Definition: System.h:78
ETISS_System::dwrite
etiss_int32(* dwrite)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
write data
Definition: System.h:97
ETISS_System::iread
etiss_int32(* iread)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint32 length)
used to simulate an instruction fetch.
Definition: System.h:84
ETISS_System::handle
void * handle
custom handle that will be passed to the functions of this structure
Definition: System.h:116
ETISS_System::dbg_write
etiss_int32(* dbg_write)(void *handle, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
direct debug write
Definition: System.h:108
ETISS_System::dbg_read
etiss_int32(* dbg_read)(void *handle, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
direct debug read
Definition: System.h:104
ETISS_System::dread
etiss_int32(* dread)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
read data
Definition: System.h:93
ETISS_System::syncTime
void(* syncTime)(void *handle, ETISS_CPU *cpu)
called after a block to synchronize the time
Definition: System.h:114
ETISS_System::iwrite
etiss_int32(* iwrite)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
write instruction data over instruction bus
Definition: System.h:88
etiss::mm::DMMUWrapperSystem::sys
struct ETISS_System sys
Definition: DMMUWrapper.h:93
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