ETISS 0.11.2
ExtendableTranslatingInstructionSetSimulator(version0.11.2)
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DMMUWrapper.cpp
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1// SPDX-License-Identifier: BSD-3-Clause
2//
3// This file is part of ETISS. It is licensed under the BSD 3-Clause License; you may not use this file except in
4// compliance with the License. You should have received a copy of the license along with this project. If not, see the
5// LICENSE file.
14#include "etiss/mm/DMMUWrapper.h"
15#include "etiss/jit/ReturnCode.h"
16#include "etiss/mm/MMU.h"
17
18namespace etiss
19{
20namespace mm
21{
22
23static etiss_int32 iread(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint32 length)
24{
25
26 int32_t exception;
27 DMMUWrapperSystem *msys = ((DMMUWrapperSystem *)handle);
28 std::shared_ptr<MMU> mmu = ((DMMUWrapper *)msys->this_)->mmu_;
29
30 // vma to pma translation
31 uint64_t pma = 0;
32 if (unlikely(exception = mmu->Translate(addr, &pma, MM_ACCESS::R_ACCESS)))
33 return exception;
34 std::stringstream msg;
35 msg << "Virtual memory: 0x" << std::hex << addr << " is translated into physical address 0x:" << std::hex << pma
36 << std::endl;
37 etiss::log(etiss::VERBOSE, msg.str());
38 ETISS_System *sys = msys->orig;
39 return sys->iread(sys->handle, cpu, pma, length);
40}
41
42static etiss_int32 iwrite(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
43{
44
45 int32_t exception;
46 DMMUWrapperSystem *msys = ((DMMUWrapperSystem *)handle);
47 std::shared_ptr<MMU> mmu = ((DMMUWrapper *)msys->this_)->mmu_;
48
49 // vma to pma translation
50 uint64_t pma = 0;
51 if (unlikely(exception = mmu->Translate(addr, &pma, MM_ACCESS::W_ACCESS)))
52 return exception;
53 std::stringstream msg;
54 msg << "Virtual memory: 0x" << std::hex << addr << " is translated into physical address 0x:" << std::hex << pma
55 << std::endl;
56 etiss::log(etiss::VERBOSE, msg.str());
57 ETISS_System *sys = msys->orig;
58 return sys->iwrite(sys->handle, cpu, pma, buffer, length);
59}
60
61static etiss_int32 dread(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
62{
63
64 int32_t exception;
65 DMMUWrapperSystem *msys = ((DMMUWrapperSystem *)handle);
66 std::shared_ptr<MMU> mmu = ((DMMUWrapper *)msys->this_)->mmu_;
67
68 // vma to pma translation
69 uint64_t pma = 0;
70 if (unlikely(exception = mmu->Translate(addr, &pma, MM_ACCESS::R_ACCESS)))
71 return exception;
72 std::stringstream msg;
73
74 ETISS_System *sys = msys->orig;
75 return sys->dread(sys->handle, cpu, pma, buffer, length);
76}
77
78static etiss_int32 dwrite(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
79{
80
81 int32_t exception;
82 DMMUWrapperSystem *msys = ((DMMUWrapperSystem *)handle);
83 std::shared_ptr<MMU> mmu = ((DMMUWrapper *)msys->this_)->mmu_;
84
85 // vma to pma translation
86 uint64_t pma = 0;
87 if (unlikely(exception = mmu->Translate(addr, &pma, MM_ACCESS::W_ACCESS)))
88 return exception;
89 std::stringstream msg;
90
91 ETISS_System *sys = msys->orig;
92 return sys->dwrite(sys->handle, cpu, pma, buffer, length);
93}
94
95static etiss_int32 dbg_read(void *handle, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
96{
97
98 int32_t exception;
99 DMMUWrapperSystem *msys = ((DMMUWrapperSystem *)handle);
100 std::shared_ptr<MMU> mmu = ((DMMUWrapper *)msys->this_)->mmu_;
101
102 // vma to pma translation
103 uint64_t pma = 0;
104 if (unlikely(exception = mmu->Translate(addr, &pma, MM_ACCESS::X_ACCESS)))
105 return etiss::RETURNCODE::PAGEFAULT;
106
107 ETISS_System *sys = msys->orig;
108 return sys->dbg_read(sys->handle, pma, buffer, length);
109}
110
111static etiss_int32 dbg_write(void *handle, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
112{
113
114 int32_t exception;
115 DMMUWrapperSystem *msys = ((DMMUWrapperSystem *)handle);
116 std::shared_ptr<MMU> mmu = ((DMMUWrapper *)msys->this_)->mmu_;
117
118 // vma to pma translation
119 uint64_t pma = 0;
120 if (unlikely(exception = mmu->Translate(addr, &pma, MM_ACCESS::W_ACCESS)))
121 return exception;
122 std::stringstream msg;
123 msg << "Virtual memory: 0x" << std::hex << addr << " is translated into physical address 0x:" << std::hex << pma
124 << std::endl;
125 etiss::log(etiss::VERBOSE, msg.str());
126 ETISS_System *sys = msys->orig;
127 return sys->dbg_write(sys->handle, pma, buffer, length);
128}
129
130static void syncTime(void *handle, ETISS_CPU *cpu)
131{
132 DMMUWrapperSystem *msys = ((DMMUWrapperSystem *)handle);
133 ETISS_System *sys = msys->orig;
134 sys->syncTime(sys->handle, cpu);
135}
136
137DMMUWrapper::DMMUWrapper(std::shared_ptr<MMU> mmu) : mmu_(mmu) {}
138
142ETISS_System *DMMUWrapper::wrap(ETISS_CPU *cpu, ETISS_System *system)
143{
144
145 mmu_->Init(cpu, system);
146
147 DMMUWrapperSystem *ret = new DMMUWrapperSystem();
148
149 ret->sys.iread = &iread;
150 ret->sys.iwrite = &iwrite;
151 ret->sys.dread = &dread;
152 ret->sys.dwrite = &dwrite;
153 ret->sys.dbg_read = &dbg_read;
154 ret->sys.dbg_write = &dbg_write;
155 ret->sys.syncTime = &syncTime;
156
157 ret->sys.handle = (void *)ret;
158 ret->this_ = this;
159 ret->orig = system;
160
161 return (ETISS_System *)ret;
162}
163
167ETISS_System *DMMUWrapper::unwrap(ETISS_CPU *cpu, ETISS_System *system)
168{
169 ETISS_System *ret = ((DMMUWrapperSystem *)system)->orig;
170 delete system;
171 return ret;
172}
173
174std::string DMMUWrapper::_getPluginName() const
175{
176 return mmu_->GetName() + std::string(" Wrapper");
177}
178
179} // namespace mm
180} // namespace etiss
DMMUWrapper.h
Wrapper class to wrap aroud data MMU.
MMU.h
Modeling hardware memory management for virtual memory -> physical memory translation and protection.
uint64_t
static __inline__ uint64_t
Definition arm_cde.h:31
int32_t
static __inline__ int32_t
Definition arm_mve.h:51
etiss_uint64
uint64_t etiss_uint64
Definition types.h:58
etiss_uint32
uint32_t etiss_uint32
Definition types.h:55
unlikely
#define unlikely(x)
Definition types.h:36
etiss_uint8
uint8_t etiss_uint8
Definition types.h:49
etiss_int32
int32_t etiss_int32
Definition types.h:54
etiss::mm::DMMUWrapper::mmu_
std::shared_ptr< MMU > mmu_
Definition DMMUWrapper.h:45
etiss::mm::DMMUWrapper::DMMUWrapper
DMMUWrapper(std::shared_ptr< MMU > mmu)
Definition DMMUWrapper.cpp:137
etiss::mm::DMMUWrapper::_getPluginName
std::string _getPluginName() const
Definition DMMUWrapper.cpp:174
etiss::mm::DMMUWrapper::unwrap
ETISS_System * unwrap(ETISS_CPU *cpu, ETISS_System *system)
SystemWrapperPlugin interface to unwrap original ETISS_System.
Definition DMMUWrapper.cpp:167
etiss::mm::DMMUWrapper::wrap
ETISS_System * wrap(ETISS_CPU *cpu, ETISS_System *system)
SystemWrapperPlugin interface to wrap around original ETISS_System.
Definition DMMUWrapper.cpp:142
etiss::mm::dbg_write
static etiss_int32 dbg_write(void *handle, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
Definition DMMUWrapper.cpp:111
etiss::mm::dbg_read
static etiss_int32 dbg_read(void *handle, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
Definition DMMUWrapper.cpp:95
etiss::mm::iwrite
static etiss_int32 iwrite(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
Definition DMMUWrapper.cpp:42
etiss::mm::iread
static etiss_int32 iread(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint32 length)
Definition DMMUWrapper.cpp:23
etiss::mm::syncTime
static void syncTime(void *handle, ETISS_CPU *cpu)
Definition DMMUWrapper.cpp:130
etiss::mm::dwrite
static etiss_int32 dwrite(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
Definition DMMUWrapper.cpp:78
etiss::mm::dread
static etiss_int32 dread(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
Definition DMMUWrapper.cpp:61
etiss
forwards: include/jit/*
Definition Benchmark.h:17
etiss::VERBOSE
@ VERBOSE
Definition Misc.h:88
etiss::log
void log(Verbosity level, std::string msg)
write log message at the given level.
Definition Misc.cpp:94
length
float __ovld __cnfn length(float p)
Return the length of vector p, i.e., sqrt(p.x2 + p.y 2 + ...)
ETISS_CPU
basic cpu state structure needed for execution of any cpu architecture.
Definition CPU.h:51
ETISS_System
memory access and time synchronization functions.
Definition System.h:40
ETISS_System::dwrite
etiss_int32(* dwrite)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
write data
Definition System.h:59
ETISS_System::iread
etiss_int32(* iread)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint32 length)
used to simulate an instruction fetch.
Definition System.h:46
ETISS_System::handle
void * handle
custom handle that will be passed to the functions of this structure
Definition System.h:78
ETISS_System::dbg_write
etiss_int32(* dbg_write)(void *handle, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
direct debug write
Definition System.h:70
ETISS_System::dbg_read
etiss_int32(* dbg_read)(void *handle, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
direct debug read
Definition System.h:66
ETISS_System::dread
etiss_int32(* dread)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
read data
Definition System.h:55
ETISS_System::syncTime
void(* syncTime)(void *handle, ETISS_CPU *cpu)
called after a block to synchronize the time
Definition System.h:76
ETISS_System::iwrite
etiss_int32(* iwrite)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
write instruction data over instruction bus
Definition System.h:50
etiss::mm::DMMUWrapperSystem::sys
struct ETISS_System sys
Definition DMMUWrapper.h:54
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