ETISS 0.8.0
Extendable Translating Instruction Set Simulator (version 0.8.0)
Translation.h
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1 /*
2 
3  @copyright
4 
5  <pre>
6 
7  Copyright 2018 Infineon Technologies AG
8 
9  This file is part of ETISS tool, see <https://github.com/tum-ei-eda/etiss>.
10 
11  The initial version of this software has been created with the funding support by the German Federal
12  Ministry of Education and Research (BMBF) in the project EffektiV under grant 01IS13022.
13 
14  Redistribution and use in source and binary forms, with or without modification, are permitted
15  provided that the following conditions are met:
16 
17  1. Redistributions of source code must retain the above copyright notice, this list of conditions and
18  the following disclaimer.
19 
20  2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions
21  and the following disclaimer in the documentation and/or other materials provided with the distribution.
22 
23  3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse
24  or promote products derived from this software without specific prior written permission.
25 
26  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
27  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
28  PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
29  DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
30  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
32  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33  POSSIBILITY OF SUCH DAMAGE.
34 
35  </pre>
36 
37  @author Chair of Electronic Design Automation, TUM
38 
39  @version 0.1
40 
41 */
42 
43 #ifndef ETISS_INCLUDE_TRANSLATION_H
44 #define ETISS_INCLUDE_TRANSLATION_H
45 
46 #include "etiss/CPUArch.h"
47 #include "etiss/CodePart.h"
48 #include "etiss/Instruction.h"
49 #include "etiss/JIT.h"
50 
51 #include <memory>
52 #include <unordered_map>
53 
54 namespace etiss
55 {
56 
57 typedef etiss::int32 (*ExecBlockCall)(ETISS_CPU *cpu, ETISS_System *system, void **plugin_pointers);
58 
62 class BlockLink
63 {
64  public:
69  unsigned refcount;
71  bool valid;
72  const std::shared_ptr<void> jitlib;
74  ~BlockLink();
79  static inline void incrRef(BlockLink *link) { link->refcount++; }
84  static inline void decrRef(BlockLink *&link)
85  {
86  link->refcount--;
87  if (unlikely(link->refcount == 0))
88  {
89  delete link;
90  }
91  link = 0;
92  }
99  static inline void updateRef(BlockLink *&link, BlockLink *newValue)
100  {
101  if (link == newValue)
102  {
103  return;
104  }
105  if (likely(link != 0))
106  {
107  link->refcount--;
108  if (unlikely(link->refcount == 0))
109  {
110  delete link;
111  }
112  }
113  if (likely(newValue != 0))
114  {
115  incrRef(newValue);
116  }
117  link = newValue;
118  }
119 };
120 
122 {
123  private:
124  std::shared_ptr<etiss::CPUArch> &archptr_;
125  std::shared_ptr<etiss::JIT> &jitptr_;
127  etiss::JIT *const jit_;
128  std::list<std::shared_ptr<etiss::Plugin>> &plugins_;
134 
147 
149 
150  std::unordered_map<etiss::uint64, std::list<BlockLink *>> blockmap_;
151 #if ETISS_TRANSLATOR_STAT
152  etiss::uint64 next_count_;
153  etiss::uint64 branch_count_;
154  etiss::uint64 miss_count_;
155 #endif
156  public:
157  Translation(std::shared_ptr<etiss::CPUArch> &arch, std::shared_ptr<etiss::JIT> &jit,
158  std::list<std::shared_ptr<etiss::Plugin>> &plugins, ETISS_System &system, ETISS_CPU &cpu);
159  ~Translation();
160  void **init();
165  inline BlockLink *getBlockFast(BlockLink *prev, const etiss::uint64 &instructionindex)
166  {
167  if (prev != 0)
168  {
169  BlockLink *bl = prev->next;
170  if (instructionindex >= prev->end && bl != 0 && bl->end > instructionindex)
171  { // ->next MUST always start immediately after the current block since it is not checked here
172  // check if block is invalid
173  if (bl->valid)
174  {
175 #if ETISS_TRANSLATOR_STAT
176  next_count_++;
177 #endif
178  return bl;
179  }
180  else
181  {
182  BlockLink::updateRef(prev->next, 0);
183  }
184  }
185  bl = prev->branch;
186  if (bl != 0 && bl->start <= instructionindex && bl->end > instructionindex)
187  {
188  // check if block is invalid
189  if (bl->valid)
190  { // check
191 #if ETISS_TRANSLATOR_STAT
192  branch_count_++;
193 #endif
194  return bl;
195  }
196  else
197  {
198  BlockLink::updateRef(prev->branch, 0);
199  }
200  }
201  }
202 #if ETISS_TRANSLATOR_STAT
203  miss_count_++;
204 #endif
205  return getBlock(prev, instructionindex);
206  }
207 
208  BlockLink *getBlock(BlockLink *prev, const etiss::uint64 &instructionindex);
209 
211 
212  void unloadBlocksAll();
213 
214  void unloadBlocks(etiss::uint64 startindex = 0, etiss::uint64 endindex = ((etiss::uint64)((etiss::int64)-1)));
215 
216  std::string disasm(uint8_t *buf, unsigned len, int &append);
217 
218  private:
220  const uint64_t id;
223 };
224 
225 } // namespace etiss
226 
227 #endif // ETISS_INCLUDE_TRANSLATION_H
etiss_int32 int32
Definition: 386-GCC.h:81
etiss_int64 int64
Definition: 386-GCC.h:83
etiss_uint64 uint64
Definition: 386-GCC.h:82
contains neccesary interfaces for instruction translation.
classes to hold code and additional information used for optimization of instruction translations
contains container classes to store instruction definitions + translation functions and build a trans...
JIT compiler interface definition.
static __inline__ uint64_t
Definition: arm_cde.h:31
static __inline__ uint8_t
Definition: arm_mve.h:323
#define likely(x)
Definition: types.h:73
#define unlikely(x)
Definition: types.h:74
the interface to translate instructions of and processor architecture
Definition: CPUArch.h:162
A list of CodeSets.
Definition: CodePart.h:570
compiler interface for just in time compilation of generated C code
Definition: JIT.h:67
allows to add code to the translation of instructions
Definition: Plugin.h:262
Translation(std::shared_ptr< etiss::CPUArch > &arch, std::shared_ptr< etiss::JIT > &jit, std::list< std::shared_ptr< etiss::Plugin >> &plugins, ETISS_System &system, ETISS_CPU &cpu)
std::string disasm(uint8_t *buf, unsigned len, int &append)
etiss::instr::ModedInstructionSet * mis_
Definition: Translation.h:148
etiss::JIT *const jit_
Definition: Translation.h:127
uint64_t tblockcount
countes translated blocks. needed to guarantee unique block function names
Definition: Translation.h:222
std::list< std::shared_ptr< etiss::Plugin > > & plugins_
Definition: Translation.h:128
size_t plugins_array_size_
Definition: Translation.h:133
etiss::TranslationPlugin ** plugins_array_
Definition: Translation.h:131
void unloadBlocks(etiss::uint64 startindex=0, etiss::uint64 endindex=((etiss::uint64)((etiss::int64) -1)))
etiss::CPUArch *const arch_
Definition: Translation.h:126
void ** plugins_handle_array_
Definition: Translation.h:132
std::unordered_map< etiss::uint64, std::list< BlockLink * > > blockmap_
Definition: Translation.h:150
std::shared_ptr< etiss::CPUArch > & archptr_
Definition: Translation.h:124
BlockLink * getBlockFast(BlockLink *prev, const etiss::uint64 &instructionindex)
CALL THIS function NOT getBlock(...) since getBlock will not check next/branch references.
Definition: Translation.h:165
ETISS_CPU & cpu_
Definition: Translation.h:130
const uint64_t id
unique id used to generate unique function names across translation instances
Definition: Translation.h:220
etiss::int32 translateBlock(CodeBlock &cb)
void(* plugins_finalizeCodeBlock_)(etiss::TranslationPlugin **, CodeBlock &)
Function pointer, the function is getting defined in Translation::init via template function etiss::c...
Definition: Translation.h:146
BlockLink * getBlock(BlockLink *prev, const etiss::uint64 &instructionindex)
void(* plugins_initCodeBlock_)(etiss::TranslationPlugin **, CodeBlock &)
Function pointer, the function is getting defined in Translation::init via template function etiss::c...
Definition: Translation.h:140
std::shared_ptr< etiss::JIT > & jitptr_
Definition: Translation.h:125
ETISS_System & system_
Definition: Translation.h:129
holds etiss::instr::VariableInstructionSet instances for different modes.
Definition: Instruction.h:562
Page Table Entry (PTE) defines the composition of Page Frame Number (PFN) and relavant flags.
Definition: Benchmark.h:53
etiss::int32(* ExecBlockCall)(ETISS_CPU *cpu, ETISS_System *system, void **plugin_pointers)
Definition: Translation.h:57
basic cpu state structure needed for execution of any cpu architecture.
Definition: CPU.h:89
memory access and time synchronization functions.
Definition: System.h:78