ETISS 0.11.2
ExtendableTranslatingInstructionSetSimulator(version0.11.2)
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RV64IMACFD_tum_retInstr.cpp
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1// clang-format off
9#include "RV64IMACFDArch.h"
10#include "RV64IMACFDFuncs.h"
11
12using namespace etiss;
13using namespace etiss::instr;
14
15// ECALL -----------------------------------------------------------------------
16static InstructionDefinition ecall_ (
17 ISA32_RV64IMACFD,
18 "ecall",
19 (uint32_t) 0x000073,
20 (uint32_t) 0xffffffff,
21 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
22 {
23
24// -----------------------------------------------------------------------------
25
26// -----------------------------------------------------------------------------
27
28// -----------------------------------------------------------------------------
29// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
30
31// NOLINTEND(clang-diagnostic-unused-but-set-variable)
32// -----------------------------------------------------------------------------
33
34 {
35 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
36
37 cp.code() = std::string("//ECALL\n");
38
39// -----------------------------------------------------------------------------
40cp.code() += "etiss_coverage_count(1, 168);\n";
41{ // block
42cp.code() += "etiss_coverage_count(1, 1169);\n";
43cp.code() += "{ // block\n";
44cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + 4) + "ULL;\n";
45cp.code() += "etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";
46cp.code() += "} // block\n";
47} // block
48{ // block
49cp.code() += "etiss_coverage_count(1, 2191);\n";
50cp.code() += "{ // block\n";
51{ // procedure
52cp.code() += "{ // procedure\n";
53cp.code() += "RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 8LL + ((RV64IMACFD*)cpu)->PRIV);\n";
54cp.code() += "etiss_coverage_count(4, 2190, 2186, 2189, 2188);\n";
55cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
56cp.code() += "} // procedure\n";
57} // procedure
58cp.code() += "} // block\n";
59} // block
60cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
61cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
62// -----------------------------------------------------------------------------
63 cp.getAffectedRegisters().add("instructionPointer", 32);
64 }
65 {
66 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
67
68 cp.code() = std::string("//ECALL\n");
69
70// -----------------------------------------------------------------------------
71cp.code() += "return cpu->exception;\n";
72// -----------------------------------------------------------------------------
73 }
74
75 return true;
76 },
77 0,
78 [] (BitArray & ba, Instruction & instr)
79 {
80// -----------------------------------------------------------------------------
81
82// -----------------------------------------------------------------------------
83
84 std::stringstream ss;
85// -----------------------------------------------------------------------------
86ss << "ecall" << " # " << ba << (" []");
87// -----------------------------------------------------------------------------
88 return ss.str();
89 }
90);
91
92// MRET ------------------------------------------------------------------------
93static InstructionDefinition mret_ (
94 ISA32_RV64IMACFD,
95 "mret",
96 (uint32_t) 0x30200073,
97 (uint32_t) 0xffffffff,
98 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
99 {
100
101// -----------------------------------------------------------------------------
102
103// -----------------------------------------------------------------------------
104
105// -----------------------------------------------------------------------------
106// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
107
108// NOLINTEND(clang-diagnostic-unused-but-set-variable)
109// -----------------------------------------------------------------------------
110
111 {
112 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
113
114 cp.code() = std::string("//MRET\n");
115
116// -----------------------------------------------------------------------------
117cp.code() += "etiss_coverage_count(1, 166);\n";
118{ // block
119cp.code() += "etiss_coverage_count(1, 1169);\n";
120cp.code() += "{ // block\n";
121cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + 4) + "ULL;\n";
122cp.code() += "etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";
123cp.code() += "} // block\n";
124} // block
125{ // block
126cp.code() += "etiss_coverage_count(1, 2325);\n";
127cp.code() += "{ // block\n";
128cp.code() += "etiss_coverage_count(1, 2264);\n";
129cp.code() += "if (((RV64IMACFD*)cpu)->PRIV < 3LL) { // conditional\n";
130cp.code() += "etiss_coverage_count(2, 2267, 2265);\n";
131{ // procedure
132cp.code() += "{ // procedure\n";
133cp.code() += "RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";
134cp.code() += "etiss_coverage_count(2, 2270, 2268);\n";
135cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
136cp.code() += "} // procedure\n";
137} // procedure
138cp.code() += "} // conditional\n";
139cp.code() += "cpu->nextPc = *((RV64IMACFD*)cpu)->CSR[833LL];\n";
140cp.code() += "etiss_coverage_count(3, 2275, 2271, 2274);\n";
141cp.code() += "etiss_uint64 s = RV64IMACFD_csr_read(cpu, system, plugin_pointers, 768LL);\n";
142cp.code() += "etiss_coverage_count(2, 2279, 2278);\n";
143cp.code() += "etiss_uint64 prev_prv = RV64IMACFD_get_field(s, 6144LL);\n";
144cp.code() += "etiss_coverage_count(3, 2284, 2283, 2281);\n";
145cp.code() += "etiss_coverage_count(1, 2285);\n";
146cp.code() += "if (prev_prv != 3LL) { // conditional\n";
147cp.code() += "etiss_coverage_count(2, 2288, 2286);\n";
148cp.code() += "s = RV64IMACFD_set_field(s, 131072LL, 0LL);\n";
149cp.code() += "etiss_coverage_count(5, 2294, 2289, 2293, 2290, 2292);\n";
150cp.code() += "} // conditional\n";
151cp.code() += "s = RV64IMACFD_set_field(s, 8LL, RV64IMACFD_get_field(s, 128LL));\n";
152cp.code() += "etiss_coverage_count(6, 2302, 2295, 2301, 2296, 2300, 2298);\n";
153cp.code() += "s = RV64IMACFD_set_field(s, 128LL, 1ULL);\n";
154cp.code() += "etiss_coverage_count(5, 2308, 2303, 2307, 2304, 2306);\n";
155cp.code() += "s = RV64IMACFD_set_field(s, 6144LL, (RV64IMACFD_extension_enabled(cpu, system, plugin_pointers, 85ULL)) ? (0LL) : (3LL));\n";
156cp.code() += "etiss_coverage_count(7, 2318, 2309, 2317, 2310, 2316, 2313, 2312);\n";
157cp.code() += "RV64IMACFD_csr_write(cpu, system, plugin_pointers, 768LL, s);\n";
158cp.code() += "etiss_coverage_count(2, 2321, 2320);\n";
159cp.code() += "((RV64IMACFD*)cpu)->PRIV = (prev_prv) & 0x7ULL;\n";
160cp.code() += "etiss_coverage_count(3, 2324, 2322, 2323);\n";
161cp.code() += "} // block\n";
162} // block
163cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
164cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
165// -----------------------------------------------------------------------------
166 cp.getAffectedRegisters().add("instructionPointer", 32);
167 }
168 {
169 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
170
171 cp.code() = std::string("//MRET\n");
172
173// -----------------------------------------------------------------------------
174cp.code() += "return cpu->exception;\n";
175// -----------------------------------------------------------------------------
176 }
177
178 return true;
179 },
180 0,
181 [] (BitArray & ba, Instruction & instr)
182 {
183// -----------------------------------------------------------------------------
184
185// -----------------------------------------------------------------------------
186
187 std::stringstream ss;
188// -----------------------------------------------------------------------------
189ss << "mret" << " # " << ba << (" []");
190// -----------------------------------------------------------------------------
191 return ss.str();
192 }
193);
194
195// WFI -------------------------------------------------------------------------
196static InstructionDefinition wfi_ (
197 ISA32_RV64IMACFD,
198 "wfi",
199 (uint32_t) 0x10500073,
200 (uint32_t) 0xffffffff,
201 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
202 {
203
204// -----------------------------------------------------------------------------
205
206// -----------------------------------------------------------------------------
207
208// -----------------------------------------------------------------------------
209// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
210
211// NOLINTEND(clang-diagnostic-unused-but-set-variable)
212// -----------------------------------------------------------------------------
213
214 {
215 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
216
217 cp.code() = std::string("//WFI\n");
218
219// -----------------------------------------------------------------------------
220cp.code() += "etiss_coverage_count(1, 169);\n";
221{ // block
222cp.code() += "etiss_coverage_count(1, 1169);\n";
223cp.code() += "{ // block\n";
224cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + 4) + "ULL;\n";
225cp.code() += "etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";
226cp.code() += "} // block\n";
227} // block
228{ // block
229cp.code() += "etiss_coverage_count(1, 2326);\n";
230cp.code() += "{ // block\n";
231cp.code() += "} // block\n";
232} // block
233cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
234cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
235// -----------------------------------------------------------------------------
236 cp.getAffectedRegisters().add("instructionPointer", 32);
237 }
238 {
239 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
240
241 cp.code() = std::string("//WFI\n");
242
243// -----------------------------------------------------------------------------
244cp.code() += "return cpu->exception;\n";
245// -----------------------------------------------------------------------------
246 }
247
248 return true;
249 },
250 0,
251 [] (BitArray & ba, Instruction & instr)
252 {
253// -----------------------------------------------------------------------------
254
255// -----------------------------------------------------------------------------
256
257 std::stringstream ss;
258// -----------------------------------------------------------------------------
259ss << "wfi" << " # " << ba << (" []");
260// -----------------------------------------------------------------------------
261 return ss.str();
262 }
263);
264
265// SRET ------------------------------------------------------------------------
266static InstructionDefinition sret_ (
267 ISA32_RV64IMACFD,
268 "sret",
269 (uint32_t) 0x10200073,
270 (uint32_t) 0xffffffff,
271 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
272 {
273
274// -----------------------------------------------------------------------------
275
276// -----------------------------------------------------------------------------
277
278// -----------------------------------------------------------------------------
279// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
280
281// NOLINTEND(clang-diagnostic-unused-but-set-variable)
282// -----------------------------------------------------------------------------
283
284 {
285 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
286
287 cp.code() = std::string("//SRET\n");
288
289// -----------------------------------------------------------------------------
290cp.code() += "etiss_coverage_count(1, 167);\n";
291{ // block
292cp.code() += "etiss_coverage_count(1, 1169);\n";
293cp.code() += "{ // block\n";
294cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + 4) + "ULL;\n";
295cp.code() += "etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";
296cp.code() += "} // block\n";
297} // block
298{ // block
299cp.code() += "etiss_coverage_count(1, 6415);\n";
300cp.code() += "{ // block\n";
301cp.code() += "etiss_coverage_count(1, 6361);\n";
302cp.code() += "if (((RV64IMACFD*)cpu)->PRIV < ((RV64IMACFD_get_field(RV64IMACFD_csr_read(cpu, system, plugin_pointers, 768LL), 4194304LL)) ? (3LL) : (1LL))) { // conditional\n";
303cp.code() += "etiss_coverage_count(6, 6371, 6362, 6369, 6366, 6364, 6370);\n";
304{ // procedure
305cp.code() += "{ // procedure\n";
306cp.code() += "RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";
307cp.code() += "etiss_coverage_count(2, 6374, 6372);\n";
308cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
309cp.code() += "} // procedure\n";
310} // procedure
311cp.code() += "} // conditional\n";
312cp.code() += "cpu->nextPc = *((RV64IMACFD*)cpu)->CSR[321LL];\n";
313cp.code() += "etiss_coverage_count(3, 6379, 6375, 6378);\n";
314cp.code() += "etiss_uint64 s = RV64IMACFD_csr_read(cpu, system, plugin_pointers, 256LL);\n";
315cp.code() += "etiss_coverage_count(2, 6383, 6382);\n";
316cp.code() += "etiss_uint64 prev_prv = RV64IMACFD_get_field(s, 256LL);\n";
317cp.code() += "etiss_coverage_count(3, 6388, 6387, 6385);\n";
318cp.code() += "s = RV64IMACFD_set_field(s, 2LL, RV64IMACFD_get_field(s, 32LL));\n";
319cp.code() += "etiss_coverage_count(6, 6396, 6389, 6395, 6390, 6394, 6392);\n";
320cp.code() += "s = RV64IMACFD_set_field(s, 32LL, 1ULL);\n";
321cp.code() += "etiss_coverage_count(5, 6402, 6397, 6401, 6398, 6400);\n";
322cp.code() += "s = RV64IMACFD_set_field(s, 256LL, 0LL);\n";
323cp.code() += "etiss_coverage_count(4, 6408, 6403, 6407, 6404);\n";
324cp.code() += "RV64IMACFD_csr_write(cpu, system, plugin_pointers, 768LL, s);\n";
325cp.code() += "etiss_coverage_count(2, 6411, 6410);\n";
326cp.code() += "((RV64IMACFD*)cpu)->PRIV = (prev_prv) & 0x7ULL;\n";
327cp.code() += "etiss_coverage_count(3, 6414, 6412, 6413);\n";
328cp.code() += "} // block\n";
329} // block
330cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
331cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
332// -----------------------------------------------------------------------------
333 cp.getAffectedRegisters().add("instructionPointer", 32);
334 }
335 {
336 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
337
338 cp.code() = std::string("//SRET\n");
339
340// -----------------------------------------------------------------------------
341cp.code() += "return cpu->exception;\n";
342// -----------------------------------------------------------------------------
343 }
344
345 return true;
346 },
347 0,
348 [] (BitArray & ba, Instruction & instr)
349 {
350// -----------------------------------------------------------------------------
351
352// -----------------------------------------------------------------------------
353
354 std::stringstream ss;
355// -----------------------------------------------------------------------------
356ss << "sret" << " # " << ba << (" []");
357// -----------------------------------------------------------------------------
358 return ss.str();
359 }
360);
361// clang-format on
ISA32_RV64IMACFD
etiss::instr::InstructionGroup ISA32_RV64IMACFD("ISA32_RV64IMACFD", 32)
sret_
static InstructionDefinition sret_(ISA32_RV64IMACFD, "sret",(uint32_t) 0x10200073,(uint32_t) 0xffffffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRET\n");cp.code()+="etiss_coverage_count(1, 167);\n";{ cp.code()+="etiss_coverage_count(1, 1169);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6415);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 6361);\n";cp.code()+="if (((RV64IMACFD*)cpu)->PRIV < ((RV64IMACFD_get_field(RV64IMACFD_csr_read(cpu, system, plugin_pointers, 768LL), 4194304LL)) ? (3LL) : (1LL))) { // conditional\n";cp.code()+="etiss_coverage_count(6, 6371, 6362, 6369, 6366, 6364, 6370);\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";cp.code()+="etiss_coverage_count(2, 6374, 6372);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="cpu->nextPc = *((RV64IMACFD*)cpu)->CSR[321LL];\n";cp.code()+="etiss_coverage_count(3, 6379, 6375, 6378);\n";cp.code()+="etiss_uint64 s = RV64IMACFD_csr_read(cpu, system, plugin_pointers, 256LL);\n";cp.code()+="etiss_coverage_count(2, 6383, 6382);\n";cp.code()+="etiss_uint64 prev_prv = RV64IMACFD_get_field(s, 256LL);\n";cp.code()+="etiss_coverage_count(3, 6388, 6387, 6385);\n";cp.code()+="s = RV64IMACFD_set_field(s, 2LL, RV64IMACFD_get_field(s, 32LL));\n";cp.code()+="etiss_coverage_count(6, 6396, 6389, 6395, 6390, 6394, 6392);\n";cp.code()+="s = RV64IMACFD_set_field(s, 32LL, 1ULL);\n";cp.code()+="etiss_coverage_count(5, 6402, 6397, 6401, 6398, 6400);\n";cp.code()+="s = RV64IMACFD_set_field(s, 256LL, 0LL);\n";cp.code()+="etiss_coverage_count(4, 6408, 6403, 6407, 6404);\n";cp.code()+="RV64IMACFD_csr_write(cpu, system, plugin_pointers, 768LL, s);\n";cp.code()+="etiss_coverage_count(2, 6411, 6410);\n";cp.code()+="((RV64IMACFD*)cpu)->PRIV = (prev_prv) & 0x7ULL;\n";cp.code()+="etiss_coverage_count(3, 6414, 6412, 6413);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SRET\n");cp.code()+="return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { std::stringstream ss;ss<< "sret"<< " # "<< ba<<(" []");return ss.str();})
wfi_
static InstructionDefinition wfi_(ISA32_RV64IMACFD, "wfi",(uint32_t) 0x10500073,(uint32_t) 0xffffffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//WFI\n");cp.code()+="etiss_coverage_count(1, 169);\n";{ cp.code()+="etiss_coverage_count(1, 1169);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 2326);\n";cp.code()+="{ // block\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//WFI\n");cp.code()+="return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { std::stringstream ss;ss<< "wfi"<< " # "<< ba<<(" []");return ss.str();})
ecall_
static InstructionDefinition ecall_(ISA32_RV64IMACFD, "ecall",(uint32_t) 0x000073,(uint32_t) 0xffffffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ECALL\n");cp.code()+="etiss_coverage_count(1, 168);\n";{ cp.code()+="etiss_coverage_count(1, 1169);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 2191);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 8LL + ((RV64IMACFD*)cpu)->PRIV);\n";cp.code()+="etiss_coverage_count(4, 2190, 2186, 2189, 2188);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//ECALL\n");cp.code()+="return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { std::stringstream ss;ss<< "ecall"<< " # "<< ba<<(" []");return ss.str();})
mret_
static InstructionDefinition mret_(ISA32_RV64IMACFD, "mret",(uint32_t) 0x30200073,(uint32_t) 0xffffffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//MRET\n");cp.code()+="etiss_coverage_count(1, 166);\n";{ cp.code()+="etiss_coverage_count(1, 1169);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 2325);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 2264);\n";cp.code()+="if (((RV64IMACFD*)cpu)->PRIV < 3LL) { // conditional\n";cp.code()+="etiss_coverage_count(2, 2267, 2265);\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";cp.code()+="etiss_coverage_count(2, 2270, 2268);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="cpu->nextPc = *((RV64IMACFD*)cpu)->CSR[833LL];\n";cp.code()+="etiss_coverage_count(3, 2275, 2271, 2274);\n";cp.code()+="etiss_uint64 s = RV64IMACFD_csr_read(cpu, system, plugin_pointers, 768LL);\n";cp.code()+="etiss_coverage_count(2, 2279, 2278);\n";cp.code()+="etiss_uint64 prev_prv = RV64IMACFD_get_field(s, 6144LL);\n";cp.code()+="etiss_coverage_count(3, 2284, 2283, 2281);\n";cp.code()+="etiss_coverage_count(1, 2285);\n";cp.code()+="if (prev_prv != 3LL) { // conditional\n";cp.code()+="etiss_coverage_count(2, 2288, 2286);\n";cp.code()+="s = RV64IMACFD_set_field(s, 131072LL, 0LL);\n";cp.code()+="etiss_coverage_count(5, 2294, 2289, 2293, 2290, 2292);\n";cp.code()+="} // conditional\n";cp.code()+="s = RV64IMACFD_set_field(s, 8LL, RV64IMACFD_get_field(s, 128LL));\n";cp.code()+="etiss_coverage_count(6, 2302, 2295, 2301, 2296, 2300, 2298);\n";cp.code()+="s = RV64IMACFD_set_field(s, 128LL, 1ULL);\n";cp.code()+="etiss_coverage_count(5, 2308, 2303, 2307, 2304, 2306);\n";cp.code()+="s = RV64IMACFD_set_field(s, 6144LL, (RV64IMACFD_extension_enabled(cpu, system, plugin_pointers, 85ULL)) ? (0LL) : (3LL));\n";cp.code()+="etiss_coverage_count(7, 2318, 2309, 2317, 2310, 2316, 2313, 2312);\n";cp.code()+="RV64IMACFD_csr_write(cpu, system, plugin_pointers, 768LL, s);\n";cp.code()+="etiss_coverage_count(2, 2321, 2320);\n";cp.code()+="((RV64IMACFD*)cpu)->PRIV = (prev_prv) & 0x7ULL;\n";cp.code()+="etiss_coverage_count(3, 2324, 2322, 2323);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//MRET\n");cp.code()+="return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { std::stringstream ss;ss<< "mret"<< " # "<< ba<<(" []");return ss.str();})
etiss::CodePart
Contains a small code snipped.
Definition CodePart.h:348
etiss::CodePart::APPENDEDRETURNINGREQUIRED
@ APPENDEDRETURNINGREQUIRED
Definition CodePart.h:364
etiss::CodePart::code
std::string & code()
Definition CodePart.h:378
etiss::CodePart::getAffectedRegisters
RegisterSet & getAffectedRegisters()
Definition CodePart.h:376
etiss::CodeSet
A set of CodeParts.
Definition CodePart.h:399
etiss::CodeSet::append
void append(const CodePart &part, CodePart::TYPE type)
Definition CodePart.h:412
etiss::RegisterSet::add
void add(const RegisterPart &rp)
add a registerPart to the set or just its relevant bits if a register with the same name is already p...
Definition CodePart.h:184
etiss::instr::BitArray
stores a bit vector
Definition Instruction.h:114
etiss::instr::InstructionContext
this class contains parameters that persist in between instruction lookpus/translation within a trans...
Definition Instruction.h:290
etiss::instr::InstructionContext::current_address_
uint64_t current_address_
start address of current instruction
Definition Instruction.h:319
etiss::instr::Instruction
holds information and translation callbacks for an instruction.
Definition Instruction.h:346
etiss
forwards: include/jit/*
Definition Benchmark.h:17
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