2 #include "etiss/jit/ReturnCode.h"
12 if (addr < customH->base || addr >= customH->end)
14 return customH->origSys->dread(customH->origSys->handle, cpu, addr, buf, len);
20 *buf = customH->mmp->read8(addr);
35 return ETISS_RETURNCODE_NOERROR;
41 if (addr < customH->base || addr >= customH->end)
43 return customH->origSys->dwrite(customH->origSys->handle, cpu, addr, buf, len);
49 customH->mmp->write8(addr, *buf);
64 return ETISS_RETURNCODE_NOERROR;
CustomHandle customHandle_
virtual MappedMemory getMappedMem() const =0
Defines in which memory region to map this peripheral.
ETISS_System getWrapInfo(ETISS_System *origSystem) final
Defines which System functions to wrap.
etiss_int32 dread(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buf, etiss_uint32 len)
etiss_int32 dwrite(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buf, etiss_uint32 len)
Page Table Entry (PTE) defines the composition of Page Frame Number (PFN) and relavant flags.
void log(Verbosity level, std::string msg)
write log message at the given level.
basic cpu state structure needed for execution of any cpu architecture.
memory access and time synchronization functions.
etiss_int32(* dwrite)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
write data
void * handle
custom handle that will be passed to the functions of this structure
etiss_int32(* dread)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
read data