ETISS 0.8.0
Extendable Translating Instruction Set Simulator (version 0.8.0)
main.cpp
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1 /*
2 
3  @copyright
4 
5  <pre>
6 
7  Copyright 2018 Infineon Technologies AG
8 
9  This file is part of ETISS tool, see <https://github.com/tum-ei-eda/etiss>.
10 
11  The initial version of this software has been created with the funding support by the German Federal
12  Ministry of Education and Research (BMBF) in the project EffektiV under grant 01IS13022.
13 
14  Redistribution and use in source and binary forms, with or without modification, are permitted
15  provided that the following conditions are met:
16 
17  1. Redistributions of source code must retain the above copyright notice, this list of conditions and
18  the following disclaimer.
19 
20  2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions
21  and the following disclaimer in the documentation and/or other materials provided with the distribution.
22 
23  3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse
24  or promote products derived from this software without specific prior written permission.
25 
26  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
27  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
28  PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
29  DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
30  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
32  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33  POSSIBILITY OF SUCH DAMAGE.
34 
35  </pre>
36 
37  @author Chair of Electronic Design Automation, TUM
38 
39  @version 0.1
40 
41 */
42 
43 #include "TracePrinter.h"
44 #include "etiss/SimpleMemSystem.h"
45 #include "etiss/ETISS.h"
46 
47 int main(int argc, const char *argv[])
48 {
49  // by default etiss wil search for plugin libraries in its install path and
50  // relative to the library using the file plugins/list.txt.
51  // For loading configurations and ETISS internal plug-ins you can add a list
52  // with .ini file to the Initializer. See ETISS.ini for more details. Ini
53  // files and All configurations can be set with program arguments, too. E.g.:
54  // ./main [-o<option> <value>] [-f[no]<flag>] [-i<additionalinifile>]
55  // All arguments with this format will be evaluated by the Initializer.
56  std::cout << "=== Setting up configurations ===" << std::endl;
57  //std::list<std::string> iniFiles;
58  // iniFiles.push_back("../ETISS.ini"); // will be loaded within the run.sh
59  // iniFiles.push_back("additional.ini");
60  etiss::Initializer initializer(argc, argv); //add &iniFiles as the first argument if .ini files are loaded explicitly here
61  std::cout << "=== Finished setting up configurations ===" << std::endl << std::endl;
62 
63  std::cout << "=== Setting up test system ===" << std::endl;
64  std::cout << " Setting up Memory" << std::endl;
65 
67  dsys.init_memory();
68 
69  if (!etiss::cfg().isSet("arch.cpu")) {
70  std::cout << " CPU architecture was not set anywhere! Please set it manually using the arch.cpu configuration option!";
71  return 3;
72  }
73 
74  if (false)
75  {
76  std::list<etiss::uint32> instructions;
77  {
78  instructions.push_back(0x80b584b0); // push {r7, lr}, sub sp, #16
79  }
80  // write instructions into debug system
81  unsigned pos = 0;
82  for (auto it_instr : instructions)
83  {
84  etiss::uint8 buf[4];
85  buf[0] = it_instr >> 24;
86  buf[1] = it_instr >> 16;
87  buf[2] = it_instr >> 8;
88  buf[3] = it_instr;
89  dsys.dbg_write(pos, buf, 4);
90  pos += 4;
91  }
92  }
93 
94 
95  std::cout << " Setting up CPUCore" << std::endl;
96  // create a cpu core named core0 with the or1k architecture
97  std::string CPUArchName = etiss::cfg().get<std::string>("arch.cpu", "");
98  etiss::uint64 sa = etiss::cfg().get<uint64_t>("vp.entry_point", dsys.get_startaddr());
99  std::cout << " CPU start address: 0x" << std::hex << sa << std::dec << std::endl;
100  std::shared_ptr<etiss::CPUCore> cpu = etiss::CPUCore::create(CPUArchName, "core0");
101  if (!cpu)
102  {
103  etiss::log(etiss::FATALERROR, " Failed to create CPU core!");
104  }
105 
106  // disable timer plugin
107  cpu->setTimer(false);
108 
109  // reset CPU with a manual start address
110  cpu->reset(&sa);
111 
112  // add the virtual structure of the cpu to the VirtualStruct root. This allows
113  // to access the field of the cpu from a global context. See
114  // etiss::VirtualStruct::getVirtualStruct() and
115  // etiss::VirtualStruct::getResolvedField(). In this case e.g. the
116  // instructionPointer can be read from a global context by calling
117  // etiss::VirtualStruct::root()->getResolvedField("core0.instructionPointer")
118  // ->read().
119  etiss::VirtualStruct::root()->mountStruct("core0", cpu->getStruct());
120  std::cout << "=== Finished Setting up test system ===" << std::endl << std::endl;
121 
122  std::cout << "=== Setting up plug-ins ===" << std::endl;
123 
124  auto irq_handler = std::make_shared<etiss::InterruptHandler>(cpu->getInterruptVector(), cpu->getInterruptEnable(), cpu->getArch(), etiss::LEVEL_TRIGGERED, false);
125  cpu->addPlugin(irq_handler);
126 
127  initializer.loadIniPlugins(cpu);
128  initializer.loadIniJIT(cpu);
129  // here own developped plug-ins can be added with:
130  if (etiss::cfg().get<bool>("etiss.log_pc", false)) {
131  etiss::cfg().set<int>("etiss.max_block_size", 1);
132  cpu->addPlugin(std::shared_ptr<etiss::Plugin>(new TracePrinter(0x88888)));
133  }
134 
135  std::cout << "=== Setting up plug-ins ===" << std::endl << std::endl;
136 
137  // Simulation start
138  std::cout << std::endl << "=== Simulation start ===" << std::endl;
139  //float startTime = (float)clock() / CLOCKS_PER_SEC; // TESTING
140  // run cpu with the SimpleMemSystem (in other cases that "system" is most likely a
141  // bus that connects the cpu to memory,periphery,etc)
142  etiss_int32 exception = cpu->execute(dsys);
143  //float endTime = (float)clock() / CLOCKS_PER_SEC;
144  std::cout << "=== Simulation end ===" << std::endl << std::endl;
145 
146 
147  // print the exception code returned by the cpu core
148  std::cout << "CPU0 exited with exception: 0x" << std::hex << exception << std::dec << ": "
149  << etiss::RETURNCODE::getErrorMessages()[exception] << std::endl;
150 
151  switch(exception){
152  case etiss::RETURNCODE::CPUFINISHED:
154  case etiss::RETURNCODE::CPUTERMINATED:
155  return 0;
156  break;
157  case etiss::RETURNCODE::DBUS_READ_ERROR:
158  case etiss::RETURNCODE::DBUS_WRITE_ERROR:
159  case etiss::RETURNCODE::IBUS_READ_ERROR:
160  case etiss::RETURNCODE::IBUS_WRITE_ERROR:
161  case etiss::RETURNCODE::INTERRUPT:
162  case etiss::RETURNCODE::RESET:
163  case etiss::RETURNCODE::ILLEGALINSTRUCTION:
164  case etiss::RETURNCODE::ILLEGALJUMP:
165  case etiss::RETURNCODE::INSTR_PAGEFAULT:
166  case etiss::RETURNCODE::LOAD_PAGEFAULT:
167  case etiss::RETURNCODE::STORE_PAGEFAULT:
168  case etiss::RETURNCODE::GDBNOERROR:
169  case etiss::RETURNCODE::SYSCALL:
170  case etiss::RETURNCODE::PAGEFAULT:
171  return 1;
172  break;
173  case etiss::RETURNCODE::JITERROR:
174  case etiss::RETURNCODE::JITCOMPILATIONERROR:
175  return 2;
176  break;
177  case etiss::RETURNCODE::GENERALERROR:
178  case etiss::RETURNCODE::RELOADBLOCKS:
179  case etiss::RETURNCODE::RELOADCURRENTBLOCK:
180  case etiss::RETURNCODE::BREAKPOINT:
181  case etiss::RETURNCODE::ARCHERROR:
182  case etiss::RETURNCODE::EMULATIONNOTSUPPORTED:
183  case etiss::RETURNCODE::INVALIDSYSTEM:
184  return 3;
185  break;
186  default:
187  return -1;
188  break;
189  }
190 }
191 
192 
etiss_uint8 uint8
Definition: 386-GCC.h:76
etiss_uint64 uint64
Definition: 386-GCC.h:82
Header file of the ETISS library.
simple test system implementation
static __inline__ uint64_t
Definition: arm_cde.h:31
int32_t etiss_int32
Definition: types.h:92
A simple logger dedicated to print PC trace.
Definition: TracePrinter.h:61
static std::shared_ptr< CPUCore > create(std::string archname, std::string instancename="", std::map< std::string, std::string > archoptions=std::map< std::string, std::string >())
Create a CPUCore instance.
Definition: CPUCore.cpp:250
bool set(const std::string &key, T value)
template function to set the value of a configuration key.
Definition: Misc.h:372
T get(const std::string &key, T default_, bool *default_used=0)
template function to read the value of a configuration key.
Definition: Misc.h:349
Wrapper for the initialize and shutdown of the ETISS environment.
Definition: ETISS.h:253
void loadIniPlugins(std::shared_ptr< etiss::CPUCore > cpu)
loads the plugins given with the previous loaded .ini files
Definition: ETISS.cpp:556
void loadIniJIT(std::shared_ptr< etiss::CPUCore > cpu)
sets the JIT given with the previous loaded .ini files
Definition: ETISS.cpp:665
simple etiss:System implementation for testing
etiss::uint64 get_startaddr(void)
etiss::int32 dbg_write(etiss::uint64 addr, etiss::uint8 *buf, etiss::uint32 len)
Debug write operation.
static std::shared_ptr< VirtualStruct > root()
int main(int argc, const char *argv[])
Definition: main.cpp:47
MM_EXPORT const int32_t NOERROR
@ LEVEL_TRIGGERED
@ FATALERROR
Definition: Misc.h:126
Configuration & cfg(const std::string &cfgName)
Get reference of the global ETISS configuration object.
Definition: Misc.cpp:560
void log(Verbosity level, std::string msg)
write log message at the given level.
Definition: Misc.cpp:125