ETISS 0.11.2
ExtendableTranslatingInstructionSetSimulator(version0.11.2)
Loading...
Searching...
No Matches
Variables
RV64IMACFD_RV64ICInstr.cpp File Reference
#include "RV64IMACFDArch.h"
#include "RV64IMACFDFuncs.h"
Include dependency graph for RV64IMACFD_RV64ICInstr.cpp:

Go to the source code of this file.

Variables

static InstructionDefinition caddiw_imm_rs1 (ISA16_RV64IMACFD, "caddiw",(uint64_t) 0x2001,(uint64_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 imm=0;static BitArrayRange R_imm_0(6, 2);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(11, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_imm_5(12, 12);imm+=R_imm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CADDIW\n");cp.code()+="etiss_coverage_count(1, 206);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 8096);\n";if((rs1 % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 8102, 8099, 8097, 8100, 8101);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] = (etiss_int32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) + "+std::to_string(((etiss_int8)(((etiss_int8) imm)<<(2)) > >(2)))+"LL;\n";cp.code()+="etiss_coverage_count(11, 8119, 8107, 8106, 8104, 8118, 8114, 8112, 8111, 8109, 8117, 8115);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 imm=0;static BitArrayRange R_imm_0(6, 2);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(11, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_imm_5(12, 12);imm+=R_imm_5.read(ba)<< 5;std::stringstream ss;ss<< "caddiw"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})
 
static InstructionDefinition csrli_nzuimm_rs1 (ISA16_RV64IMACFD, "csrli",(uint64_t) 0x8001,(uint64_t) 0xec03, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 nzuimm=0;static BitArrayRange R_nzuimm_0(6, 2);nzuimm+=R_nzuimm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_nzuimm_5(12, 12);nzuimm+=R_nzuimm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRLI\n");cp.code()+="etiss_coverage_count(1, 199);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 7957);\n";cp.code()+="{ // block\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] >> "+std::to_string(nzuimm)+"ULL;\n";cp.code()+="etiss_coverage_count(11, 7956, 7948, 7947, 7945, 7946, 7955, 7953, 7952, 7950, 7951, 7954);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 nzuimm=0;static BitArrayRange R_nzuimm_0(6, 2);nzuimm+=R_nzuimm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_nzuimm_5(12, 12);nzuimm+=R_nzuimm_5.read(ba)<< 5;std::stringstream ss;ss<< "csrli"<< " # "<< ba<<(" [nzuimm="+std::to_string(nzuimm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})
 
static InstructionDefinition csrai_shamt_rs1 (ISA16_RV64IMACFD, "csrai",(uint64_t) 0x8401,(uint64_t) 0xec03, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(6, 2);shamt+=R_shamt_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_shamt_5(12, 12);shamt+=R_shamt_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRAI\n");cp.code()+="etiss_coverage_count(1, 200);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 7974);\n";cp.code()+="{ // block\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] = ((etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL])) >> "+std::to_string(shamt)+"ULL;\n";cp.code()+="etiss_coverage_count(13, 7973, 7962, 7961, 7959, 7960, 7972, 7969, 7967, 7966, 7964, 7965, 7970, 7971);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(6, 2);shamt+=R_shamt_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_shamt_5(12, 12);shamt+=R_shamt_5.read(ba)<< 5;std::stringstream ss;ss<< "csrai"<< " # "<< ba<<(" [shamt="+std::to_string(shamt)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})
 
static InstructionDefinition cslli_shamt_rs1 (ISA16_RV64IMACFD, "cslli",(uint64_t) 0x02,(uint64_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(6, 2);shamt+=R_shamt_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(11, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_shamt_5(12, 12);shamt+=R_shamt_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSLLI\n");cp.code()+="etiss_coverage_count(1, 201);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 7991);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 7975);\n";if(rs1==0LL) { cp.code()+="etiss_coverage_count(3, 7978, 7976, 7977);\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";cp.code()+="etiss_coverage_count(2, 7981, 7979);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} } cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rs1)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1)+"ULL] << "+std::to_string(shamt)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 7990, 7984, 7983, 7989, 7987, 7986, 7988);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CSLLI\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(6, 2);shamt+=R_shamt_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(11, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_shamt_5(12, 12);shamt+=R_shamt_5.read(ba)<< 5;std::stringstream ss;ss<< "cslli"<< " # "<< ba<<(" [shamt="+std::to_string(shamt)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})
 
static InstructionDefinition cld_rd_uimm_rs1 (ISA16_RV64IMACFD, "cld",(uint64_t) 0x6000,(uint64_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(4, 2);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(6, 5);uimm+=R_uimm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CLD\n");cp.code()+="etiss_coverage_count(1, 202);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 8015);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 8000, 7999, 7997, 7996, 7994, 7995, 7998);\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL] = (etiss_int64)(mem_val_0);\n";cp.code()+="etiss_coverage_count(10, 8014, 8005, 8004, 8002, 8003, 8013, 8011, 8009, 8007, 8008);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CLD\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(4, 2);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(6, 5);uimm+=R_uimm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;std::stringstream ss;ss<< "cld"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | uimm="+std::to_string(uimm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})
 
static InstructionDefinition csd_rs2_uimm_rs1 (ISA16_RV64IMACFD, "csd",(uint64_t) 0xe000,(uint64_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(6, 5);uimm+=R_uimm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSD\n");cp.code()+="etiss_coverage_count(1, 203);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 8039);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 8024, 8023, 8021, 8020, 8018, 8019, 8022);\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_uint64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2+8ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(10, 8038, 8030, 8028, 8026, 8027, 8037, 8035, 8034, 8032, 8033);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CSD\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(6, 5);uimm+=R_uimm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;std::stringstream ss;ss<< "csd"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | uimm="+std::to_string(uimm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})
 
static InstructionDefinition csubw_rs2_rd (ISA16_RV64IMACFD, "csubw",(uint64_t) 0x9c01,(uint64_t) 0xfc63, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(9, 7);rd+=R_rd_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSUBW\n");cp.code()+="etiss_coverage_count(1, 204);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 8067);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 res = (etiss_uint32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL]) - (etiss_uint32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2+8ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(12, 8056, 8055, 8047, 8045, 8044, 8042, 8043, 8054, 8052, 8051, 8049, 8050);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL] = (etiss_uint64)((etiss_int32)(res));\n";cp.code()+="etiss_coverage_count(8, 8066, 8061, 8060, 8058, 8059, 8065, 8063, 8062);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(9, 7);rd+=R_rd_0.read(ba)<< 0;std::stringstream ss;ss<< "csubw"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | rd="+std::to_string(rd)+"]");return ss.str();})
 
static InstructionDefinition caddw_rs2_rd (ISA16_RV64IMACFD, "caddw",(uint64_t) 0x9c21,(uint64_t) 0xfc63, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(9, 7);rd+=R_rd_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CADDW\n");cp.code()+="etiss_coverage_count(1, 205);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 8095);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 res = (etiss_uint32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL]) + (etiss_uint32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2+8ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(12, 8084, 8083, 8075, 8073, 8072, 8070, 8071, 8082, 8080, 8079, 8077, 8078);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL] = (etiss_uint64)((etiss_int32)(res));\n";cp.code()+="etiss_coverage_count(8, 8094, 8089, 8088, 8086, 8087, 8093, 8091, 8090);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(9, 7);rd+=R_rd_0.read(ba)<< 0;std::stringstream ss;ss<< "caddw"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | rd="+std::to_string(rd)+"]");return ss.str();})
 
static InstructionDefinition cldsp_uimm_rd (ISA16_RV64IMACFD, "cldsp",(uint64_t) 0x6002,(uint64_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 uimm=0;static BitArrayRange R_uimm_6(4, 2);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_3(6, 5);uimm+=R_uimm_3.read(ba)<< 3;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;static BitArrayRange R_uimm_5(12, 12);uimm+=R_uimm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CLDSP\n");cp.code()+="etiss_coverage_count(1, 207);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 8149);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[2ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 8126, 8125, 8123, 8122, 8124);\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int64 res = mem_val_0;\n";cp.code()+="etiss_coverage_count(5, 8134, 8133, 8131, 8129, 8130);\n";cp.code()+="etiss_coverage_count(1, 8135);\n";if(rd % 32ULL) { cp.code()+="etiss_coverage_count(2, 8138, 8136);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(5, 8145, 8143, 8142, 8140, 8144);\n";} else { { cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2ULL);\n";cp.code()+="etiss_coverage_count(3, 8148, 8146, 8147);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} } cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CLDSP\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 uimm=0;static BitArrayRange R_uimm_6(4, 2);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_3(6, 5);uimm+=R_uimm_3.read(ba)<< 3;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;static BitArrayRange R_uimm_5(12, 12);uimm+=R_uimm_5.read(ba)<< 5;std::stringstream ss;ss<< "cldsp"<< " # "<< ba<<(" [uimm="+std::to_string(uimm)+" | rd="+std::to_string(rd)+"]");return ss.str();})
 
static InstructionDefinition csdsp_rs2_uimm (ISA16_RV64IMACFD, "csdsp",(uint64_t) 0xe002,(uint64_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(6, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint16 uimm=0;static BitArrayRange R_uimm_6(9, 7);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSDSP\n");cp.code()+="etiss_coverage_count(1, 208);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 8171);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[2ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 8156, 8155, 8153, 8152, 8154);\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_uint64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(9, 8170, 8162, 8160, 8158, 8159, 8169, 8167, 8166, 8164);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CSDSP\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(6, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint16 uimm=0;static BitArrayRange R_uimm_6(9, 7);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;std::stringstream ss;ss<< "csdsp"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | uimm="+std::to_string(uimm)+"]");return ss.str();})
 

Variable Documentation

◆ caddiw_imm_rs1

InstructionDefinition caddiw_imm_rs1(ISA16_RV64IMACFD, "caddiw",(uint64_t) 0x2001,(uint64_t) 0xe003,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 imm=0;static BitArrayRange R_imm_0(6, 2);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(11, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_imm_5(12, 12);imm+=R_imm_5.read(ba)<< 5; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CADDIW\n"); cp.code()+="etiss_coverage_count(1, 206);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 8096);\n";if((rs1 % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 8102, 8099, 8097, 8100, 8101);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] = (etiss_int32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) + "+std::to_string(((etiss_int8)(((etiss_int8) imm)<<(2)) > >(2)))+"LL;\n";cp.code()+="etiss_coverage_count(11, 8119, 8107, 8106, 8104, 8118, 8114, 8112, 8111, 8109, 8117, 8115);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 imm=0;static BitArrayRange R_imm_0(6, 2);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(11, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_imm_5(12, 12);imm+=R_imm_5.read(ba)<< 5; std::stringstream ss; ss<< "caddiw"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+"]"); return ss.str();}) ( ISA16_RV64IMACFD  ,
"caddiw"  ,
(uint64_t 0x2001,
(uint64_t 0xe003,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 imm=0;static BitArrayRange R_imm_0(6, 2);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(11, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_imm_5(12, 12);imm+=R_imm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CADDIW\n");cp.code()+="etiss_coverage_count(1, 206);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 8096);\n";if((rs1 % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 8102, 8099, 8097, 8100, 8101);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] = (etiss_int32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) + "+std::to_string(((etiss_int8)(((etiss_int8) imm)<<(2)) > >(2)))+"LL;\n";cp.code()+="etiss_coverage_count(11, 8119, 8107, 8106, 8104, 8118, 8114, 8112, 8111, 8109, 8117, 8115);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 imm=0;static BitArrayRange R_imm_0(6, 2);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(11, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_imm_5(12, 12);imm+=R_imm_5.read(ba)<< 5;std::stringstream ss;ss<< "caddiw"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();}   
)
static

◆ caddw_rs2_rd

InstructionDefinition caddw_rs2_rd(ISA16_RV64IMACFD, "caddw",(uint64_t) 0x9c21,(uint64_t) 0xfc63,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(9, 7);rd+=R_rd_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CADDW\n"); cp.code()+="etiss_coverage_count(1, 205);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 8095);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 res = (etiss_uint32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL]) + (etiss_uint32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2+8ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(12, 8084, 8083, 8075, 8073, 8072, 8070, 8071, 8082, 8080, 8079, 8077, 8078);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL] = (etiss_uint64)((etiss_int32)(res));\n";cp.code()+="etiss_coverage_count(8, 8094, 8089, 8088, 8086, 8087, 8093, 8091, 8090);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(9, 7);rd+=R_rd_0.read(ba)<< 0; std::stringstream ss; ss<< "caddw"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | rd="+std::to_string(rd)+"]"); return ss.str();}) ( ISA16_RV64IMACFD  ,
"caddw"  ,
(uint64_t 0x9c21,
(uint64_t 0xfc63,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(9, 7);rd+=R_rd_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CADDW\n");cp.code()+="etiss_coverage_count(1, 205);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 8095);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 res = (etiss_uint32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL]) + (etiss_uint32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2+8ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(12, 8084, 8083, 8075, 8073, 8072, 8070, 8071, 8082, 8080, 8079, 8077, 8078);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL] = (etiss_uint64)((etiss_int32)(res));\n";cp.code()+="etiss_coverage_count(8, 8094, 8089, 8088, 8086, 8087, 8093, 8091, 8090);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(9, 7);rd+=R_rd_0.read(ba)<< 0;std::stringstream ss;ss<< "caddw"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | rd="+std::to_string(rd)+"]");return ss.str();}   
)
static

◆ cld_rd_uimm_rs1

InstructionDefinition cld_rd_uimm_rs1(ISA16_RV64IMACFD, "cld",(uint64_t) 0x6000,(uint64_t) 0xe003,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(4, 2);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(6, 5);uimm+=R_uimm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CLD\n"); cp.code()+="etiss_coverage_count(1, 202);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 8015);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 8000, 7999, 7997, 7996, 7994, 7995, 7998);\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL] = (etiss_int64)(mem_val_0);\n";cp.code()+="etiss_coverage_count(10, 8014, 8005, 8004, 8002, 8003, 8013, 8011, 8009, 8007, 8008);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CLD\n"); cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(4, 2);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(6, 5);uimm+=R_uimm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3; std::stringstream ss; ss<< "cld"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | uimm="+std::to_string(uimm)+" | rs1="+std::to_string(rs1)+"]"); return ss.str();}) ( ISA16_RV64IMACFD  ,
"cld"  ,
(uint64_t 0x6000,
(uint64_t 0xe003,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(4, 2);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(6, 5);uimm+=R_uimm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CLD\n");cp.code()+="etiss_coverage_count(1, 202);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 8015);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 8000, 7999, 7997, 7996, 7994, 7995, 7998);\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL] = (etiss_int64)(mem_val_0);\n";cp.code()+="etiss_coverage_count(10, 8014, 8005, 8004, 8002, 8003, 8013, 8011, 8009, 8007, 8008);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CLD\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(4, 2);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(6, 5);uimm+=R_uimm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;std::stringstream ss;ss<< "cld"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | uimm="+std::to_string(uimm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();}   
)
static

◆ cldsp_uimm_rd

InstructionDefinition cldsp_uimm_rd(ISA16_RV64IMACFD, "cldsp",(uint64_t) 0x6002,(uint64_t) 0xe003,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 uimm=0;static BitArrayRange R_uimm_6(4, 2);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_3(6, 5);uimm+=R_uimm_3.read(ba)<< 3;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;static BitArrayRange R_uimm_5(12, 12);uimm+=R_uimm_5.read(ba)<< 5; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CLDSP\n"); cp.code()+="etiss_coverage_count(1, 207);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 8149);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[2ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 8126, 8125, 8123, 8122, 8124);\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int64 res = mem_val_0;\n";cp.code()+="etiss_coverage_count(5, 8134, 8133, 8131, 8129, 8130);\n";cp.code()+="etiss_coverage_count(1, 8135);\n";if(rd % 32ULL) { cp.code()+="etiss_coverage_count(2, 8138, 8136);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(5, 8145, 8143, 8142, 8140, 8144);\n";} else { { cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2ULL);\n";cp.code()+="etiss_coverage_count(3, 8148, 8146, 8147);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} } cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CLDSP\n"); cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint16 uimm=0;static BitArrayRange R_uimm_6(4, 2);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_3(6, 5);uimm+=R_uimm_3.read(ba)<< 3;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;static BitArrayRange R_uimm_5(12, 12);uimm+=R_uimm_5.read(ba)<< 5; std::stringstream ss; ss<< "cldsp"<< " # "<< ba<<(" [uimm="+std::to_string(uimm)+" | rd="+std::to_string(rd)+"]"); return ss.str();}) ( ISA16_RV64IMACFD  ,
"cldsp"  ,
(uint64_t 0x6002,
(uint64_t 0xe003,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 uimm=0;static BitArrayRange R_uimm_6(4, 2);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_3(6, 5);uimm+=R_uimm_3.read(ba)<< 3;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;static BitArrayRange R_uimm_5(12, 12);uimm+=R_uimm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CLDSP\n");cp.code()+="etiss_coverage_count(1, 207);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 8149);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[2ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 8126, 8125, 8123, 8122, 8124);\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int64 res = mem_val_0;\n";cp.code()+="etiss_coverage_count(5, 8134, 8133, 8131, 8129, 8130);\n";cp.code()+="etiss_coverage_count(1, 8135);\n";if(rd % 32ULL) { cp.code()+="etiss_coverage_count(2, 8138, 8136);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(5, 8145, 8143, 8142, 8140, 8144);\n";} else { { cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2ULL);\n";cp.code()+="etiss_coverage_count(3, 8148, 8146, 8147);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} } cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CLDSP\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint16 uimm=0;static BitArrayRange R_uimm_6(4, 2);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_3(6, 5);uimm+=R_uimm_3.read(ba)<< 3;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;static BitArrayRange R_uimm_5(12, 12);uimm+=R_uimm_5.read(ba)<< 5;std::stringstream ss;ss<< "cldsp"<< " # "<< ba<<(" [uimm="+std::to_string(uimm)+" | rd="+std::to_string(rd)+"]");return ss.str();}   
)
static

◆ csd_rs2_uimm_rs1

InstructionDefinition csd_rs2_uimm_rs1(ISA16_RV64IMACFD, "csd",(uint64_t) 0xe000,(uint64_t) 0xe003,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(6, 5);uimm+=R_uimm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSD\n"); cp.code()+="etiss_coverage_count(1, 203);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 8039);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 8024, 8023, 8021, 8020, 8018, 8019, 8022);\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_uint64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2+8ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(10, 8038, 8030, 8028, 8026, 8027, 8037, 8035, 8034, 8032, 8033);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CSD\n"); cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(6, 5);uimm+=R_uimm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3; std::stringstream ss; ss<< "csd"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | uimm="+std::to_string(uimm)+" | rs1="+std::to_string(rs1)+"]"); return ss.str();}) ( ISA16_RV64IMACFD  ,
"csd"  ,
(uint64_t 0xe000,
(uint64_t 0xe003,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(6, 5);uimm+=R_uimm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSD\n");cp.code()+="etiss_coverage_count(1, 203);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 8039);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 8024, 8023, 8021, 8020, 8018, 8019, 8022);\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_uint64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2+8ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(10, 8038, 8030, 8028, 8026, 8027, 8037, 8035, 8034, 8032, 8033);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CSD\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(6, 5);uimm+=R_uimm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;std::stringstream ss;ss<< "csd"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | uimm="+std::to_string(uimm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();}   
)
static

◆ csdsp_rs2_uimm

InstructionDefinition csdsp_rs2_uimm(ISA16_RV64IMACFD, "csdsp",(uint64_t) 0xe002,(uint64_t) 0xe003,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(6, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint16 uimm=0;static BitArrayRange R_uimm_6(9, 7);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSDSP\n"); cp.code()+="etiss_coverage_count(1, 208);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 8171);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[2ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 8156, 8155, 8153, 8152, 8154);\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_uint64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(9, 8170, 8162, 8160, 8158, 8159, 8169, 8167, 8166, 8164);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CSDSP\n"); cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(6, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint16 uimm=0;static BitArrayRange R_uimm_6(9, 7);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3; std::stringstream ss; ss<< "csdsp"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | uimm="+std::to_string(uimm)+"]"); return ss.str();}) ( ISA16_RV64IMACFD  ,
"csdsp"  ,
(uint64_t 0xe002,
(uint64_t 0xe003,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(6, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint16 uimm=0;static BitArrayRange R_uimm_6(9, 7);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSDSP\n");cp.code()+="etiss_coverage_count(1, 208);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 8171);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[2ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 8156, 8155, 8153, 8152, 8154);\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_uint64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(9, 8170, 8162, 8160, 8158, 8159, 8169, 8167, 8166, 8164);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CSDSP\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(6, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint16 uimm=0;static BitArrayRange R_uimm_6(9, 7);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;std::stringstream ss;ss<< "csdsp"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | uimm="+std::to_string(uimm)+"]");return ss.str();}   
)
static

◆ cslli_shamt_rs1

InstructionDefinition cslli_shamt_rs1(ISA16_RV64IMACFD, "cslli",(uint64_t) 0x02,(uint64_t) 0xe003,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(6, 2);shamt+=R_shamt_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(11, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_shamt_5(12, 12);shamt+=R_shamt_5.read(ba)<< 5; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSLLI\n"); cp.code()+="etiss_coverage_count(1, 201);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 7991);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 7975);\n";if(rs1==0LL) { cp.code()+="etiss_coverage_count(3, 7978, 7976, 7977);\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";cp.code()+="etiss_coverage_count(2, 7981, 7979);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} } cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rs1)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1)+"ULL] << "+std::to_string(shamt)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 7990, 7984, 7983, 7989, 7987, 7986, 7988);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CSLLI\n"); cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(6, 2);shamt+=R_shamt_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(11, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_shamt_5(12, 12);shamt+=R_shamt_5.read(ba)<< 5; std::stringstream ss; ss<< "cslli"<< " # "<< ba<<(" [shamt="+std::to_string(shamt)+" | rs1="+std::to_string(rs1)+"]"); return ss.str();}) ( ISA16_RV64IMACFD  ,
"cslli"  ,
(uint64_t 0x02,
(uint64_t 0xe003,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(6, 2);shamt+=R_shamt_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(11, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_shamt_5(12, 12);shamt+=R_shamt_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSLLI\n");cp.code()+="etiss_coverage_count(1, 201);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 7991);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 7975);\n";if(rs1==0LL) { cp.code()+="etiss_coverage_count(3, 7978, 7976, 7977);\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";cp.code()+="etiss_coverage_count(2, 7981, 7979);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} } cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rs1)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1)+"ULL] << "+std::to_string(shamt)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 7990, 7984, 7983, 7989, 7987, 7986, 7988);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CSLLI\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(6, 2);shamt+=R_shamt_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(11, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_shamt_5(12, 12);shamt+=R_shamt_5.read(ba)<< 5;std::stringstream ss;ss<< "cslli"<< " # "<< ba<<(" [shamt="+std::to_string(shamt)+" | rs1="+std::to_string(rs1)+"]");return ss.str();}   
)
static

◆ csrai_shamt_rs1

InstructionDefinition csrai_shamt_rs1(ISA16_RV64IMACFD, "csrai",(uint64_t) 0x8401,(uint64_t) 0xec03,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(6, 2);shamt+=R_shamt_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_shamt_5(12, 12);shamt+=R_shamt_5.read(ba)<< 5; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRAI\n"); cp.code()+="etiss_coverage_count(1, 200);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 7974);\n";cp.code()+="{ // block\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] = ((etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL])) >> "+std::to_string(shamt)+"ULL;\n";cp.code()+="etiss_coverage_count(13, 7973, 7962, 7961, 7959, 7960, 7972, 7969, 7967, 7966, 7964, 7965, 7970, 7971);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(6, 2);shamt+=R_shamt_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_shamt_5(12, 12);shamt+=R_shamt_5.read(ba)<< 5; std::stringstream ss; ss<< "csrai"<< " # "<< ba<<(" [shamt="+std::to_string(shamt)+" | rs1="+std::to_string(rs1)+"]"); return ss.str();}) ( ISA16_RV64IMACFD  ,
"csrai"  ,
(uint64_t 0x8401,
(uint64_t 0xec03,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(6, 2);shamt+=R_shamt_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_shamt_5(12, 12);shamt+=R_shamt_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRAI\n");cp.code()+="etiss_coverage_count(1, 200);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 7974);\n";cp.code()+="{ // block\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] = ((etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL])) >> "+std::to_string(shamt)+"ULL;\n";cp.code()+="etiss_coverage_count(13, 7973, 7962, 7961, 7959, 7960, 7972, 7969, 7967, 7966, 7964, 7965, 7970, 7971);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(6, 2);shamt+=R_shamt_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_shamt_5(12, 12);shamt+=R_shamt_5.read(ba)<< 5;std::stringstream ss;ss<< "csrai"<< " # "<< ba<<(" [shamt="+std::to_string(shamt)+" | rs1="+std::to_string(rs1)+"]");return ss.str();}   
)
static

◆ csrli_nzuimm_rs1

InstructionDefinition csrli_nzuimm_rs1(ISA16_RV64IMACFD, "csrli",(uint64_t) 0x8001,(uint64_t) 0xec03,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 nzuimm=0;static BitArrayRange R_nzuimm_0(6, 2);nzuimm+=R_nzuimm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_nzuimm_5(12, 12);nzuimm+=R_nzuimm_5.read(ba)<< 5; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRLI\n"); cp.code()+="etiss_coverage_count(1, 199);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 7957);\n";cp.code()+="{ // block\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] >> "+std::to_string(nzuimm)+"ULL;\n";cp.code()+="etiss_coverage_count(11, 7956, 7948, 7947, 7945, 7946, 7955, 7953, 7952, 7950, 7951, 7954);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 nzuimm=0;static BitArrayRange R_nzuimm_0(6, 2);nzuimm+=R_nzuimm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_nzuimm_5(12, 12);nzuimm+=R_nzuimm_5.read(ba)<< 5; std::stringstream ss; ss<< "csrli"<< " # "<< ba<<(" [nzuimm="+std::to_string(nzuimm)+" | rs1="+std::to_string(rs1)+"]"); return ss.str();}) ( ISA16_RV64IMACFD  ,
"csrli"  ,
(uint64_t 0x8001,
(uint64_t 0xec03,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 nzuimm=0;static BitArrayRange R_nzuimm_0(6, 2);nzuimm+=R_nzuimm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_nzuimm_5(12, 12);nzuimm+=R_nzuimm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRLI\n");cp.code()+="etiss_coverage_count(1, 199);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 7957);\n";cp.code()+="{ // block\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] >> "+std::to_string(nzuimm)+"ULL;\n";cp.code()+="etiss_coverage_count(11, 7956, 7948, 7947, 7945, 7946, 7955, 7953, 7952, 7950, 7951, 7954);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 nzuimm=0;static BitArrayRange R_nzuimm_0(6, 2);nzuimm+=R_nzuimm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_nzuimm_5(12, 12);nzuimm+=R_nzuimm_5.read(ba)<< 5;std::stringstream ss;ss<< "csrli"<< " # "<< ba<<(" [nzuimm="+std::to_string(nzuimm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();}   
)
static

◆ csubw_rs2_rd

InstructionDefinition csubw_rs2_rd(ISA16_RV64IMACFD, "csubw",(uint64_t) 0x9c01,(uint64_t) 0xfc63,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(9, 7);rd+=R_rd_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSUBW\n"); cp.code()+="etiss_coverage_count(1, 204);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 8067);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 res = (etiss_uint32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL]) - (etiss_uint32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2+8ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(12, 8056, 8055, 8047, 8045, 8044, 8042, 8043, 8054, 8052, 8051, 8049, 8050);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL] = (etiss_uint64)((etiss_int32)(res));\n";cp.code()+="etiss_coverage_count(8, 8066, 8061, 8060, 8058, 8059, 8065, 8063, 8062);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(9, 7);rd+=R_rd_0.read(ba)<< 0; std::stringstream ss; ss<< "csubw"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | rd="+std::to_string(rd)+"]"); return ss.str();}) ( ISA16_RV64IMACFD  ,
"csubw"  ,
(uint64_t 0x9c01,
(uint64_t 0xfc63,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(9, 7);rd+=R_rd_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSUBW\n");cp.code()+="etiss_coverage_count(1, 204);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 8067);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 res = (etiss_uint32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL]) - (etiss_uint32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2+8ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(12, 8056, 8055, 8047, 8045, 8044, 8042, 8043, 8054, 8052, 8051, 8049, 8050);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL] = (etiss_uint64)((etiss_int32)(res));\n";cp.code()+="etiss_coverage_count(8, 8066, 8061, 8060, 8058, 8059, 8065, 8063, 8062);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(9, 7);rd+=R_rd_0.read(ba)<< 0;std::stringstream ss;ss<< "csubw"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | rd="+std::to_string(rd)+"]");return ss.str();}   
)
static