RV64IMACFD_RV64FInstr.cpp File Reference

#include "RV64IMACFDArch.h"
#include "RV64IMACFDFuncs.h"

Include dependency graph for RV64IMACFD_RV64FInstr.cpp:

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Variables
static InstructionDefinition	fcvt_l_s_rd_rm_rs1 (ISA32_RV64IMACFD, "fcvt_l_s",(uint32_t) 0xc0200053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FCVT_L_S\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_int64 res = fcvt_32_64(unbox_s(((RV64IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]), 0LL, "+std::to_string(rm)+"ULL);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = res;\n";} cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="((RV64IMACFD*)cpu)->FCSR = (((RV64IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;std::stringstream ss;ss<< "fcvt_l_s"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})
static InstructionDefinition	fcvt_lu_s_rd_rm_rs1 (ISA32_RV64IMACFD, "fcvt_lu_s",(uint32_t) 0xc0300053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FCVT_LU_S\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = fcvt_32_64(unbox_s(((RV64IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]), 1ULL, "+std::to_string(rm)+"ULL);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = res;\n";} cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="((RV64IMACFD*)cpu)->FCSR = (((RV64IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;std::stringstream ss;ss<< "fcvt_lu_s"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})
static InstructionDefinition	fcvt_s_l_rd_rm_rs1 (ISA32_RV64IMACFD, "fcvt_s_l",(uint32_t) 0xd0200053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FCVT_S_L\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 res = fcvt_64_32(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL], 2ULL, "+std::to_string(rm)+"ULL);\n";{ cp.code()+="{ // block\n";cp.code()+="((RV64IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = -4294967296LL | (etiss_uint64)(res);\n";cp.code()+="} // block\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;std::stringstream ss;ss<< "fcvt_s_l"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})
static InstructionDefinition	fcvt_s_lu_rd_rm_rs1 (ISA32_RV64IMACFD, "fcvt_s_lu",(uint32_t) 0xd0300053,(uint32_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FCVT_S_LU\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 res = fcvt_64_32(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL], 3ULL, "+std::to_string(rm)+"ULL);\n";{ cp.code()+="{ // block\n";cp.code()+="((RV64IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = -4294967296LL | (etiss_uint64)(res);\n";cp.code()+="} // block\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;std::stringstream ss;ss<< "fcvt_s_lu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})

Variable Documentation

fcvt_l_s_rd_rm_rs1

InstructionDefinition fcvt_l_s_rd_rm_rs1(ISA32_RV64IMACFD, "fcvt_l_s",(uint32_t) 0xc0200053,(uint32_t) 0xfff0007f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FCVT_L_S\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_int64 res = fcvt_32_64(unbox_s(((RV64IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]), 0LL, "+std::to_string(rm)+"ULL);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = res;\n";} cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="((RV64IMACFD*)cpu)->FCSR = (((RV64IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0; std::stringstream ss; ss<< "fcvt_l_s"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  , "fcvt_l_s"  , (uint32_t)  0xc0200053, (uint32_t)  0xfff0007f, [] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FCVT_L_S\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_int64 res = fcvt_32_64(unbox_s(((RV64IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]), 0LL, "+std::to_string(rm)+"ULL);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = res;\n";} cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="((RV64IMACFD*)cpu)->FCSR = (((RV64IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  , 0  , [] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;std::stringstream ss;ss<< "fcvt_l_s"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();}    )

static

fcvt_lu_s_rd_rm_rs1

InstructionDefinition fcvt_lu_s_rd_rm_rs1(ISA32_RV64IMACFD, "fcvt_lu_s",(uint32_t) 0xc0300053,(uint32_t) 0xfff0007f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FCVT_LU_S\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = fcvt_32_64(unbox_s(((RV64IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]), 1ULL, "+std::to_string(rm)+"ULL);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = res;\n";} cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="((RV64IMACFD*)cpu)->FCSR = (((RV64IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0; std::stringstream ss; ss<< "fcvt_lu_s"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  , "fcvt_lu_s"  , (uint32_t)  0xc0300053, (uint32_t)  0xfff0007f, [] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FCVT_LU_S\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = fcvt_32_64(unbox_s(((RV64IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]), 1ULL, "+std::to_string(rm)+"ULL);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = res;\n";} cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="((RV64IMACFD*)cpu)->FCSR = (((RV64IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  , 0  , [] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;std::stringstream ss;ss<< "fcvt_lu_s"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();}    )

static

fcvt_s_l_rd_rm_rs1

InstructionDefinition fcvt_s_l_rd_rm_rs1(ISA32_RV64IMACFD, "fcvt_s_l",(uint32_t) 0xd0200053,(uint32_t) 0xfff0007f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FCVT_S_L\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 res = fcvt_64_32(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL], 2ULL, "+std::to_string(rm)+"ULL);\n";{ cp.code()+="{ // block\n";cp.code()+="((RV64IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = -4294967296LL | (etiss_uint64)(res);\n";cp.code()+="} // block\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0; std::stringstream ss; ss<< "fcvt_s_l"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  , "fcvt_s_l"  , (uint32_t)  0xd0200053, (uint32_t)  0xfff0007f, [] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FCVT_S_L\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 res = fcvt_64_32(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL], 2ULL, "+std::to_string(rm)+"ULL);\n";{ cp.code()+="{ // block\n";cp.code()+="((RV64IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = -4294967296LL | (etiss_uint64)(res);\n";cp.code()+="} // block\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  , 0  , [] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;std::stringstream ss;ss<< "fcvt_s_l"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();}    )

static

fcvt_s_lu_rd_rm_rs1

InstructionDefinition fcvt_s_lu_rd_rm_rs1(ISA32_RV64IMACFD, "fcvt_s_lu",(uint32_t) 0xd0300053,(uint32_t) 0xfff0007f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FCVT_S_LU\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 res = fcvt_64_32(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL], 3ULL, "+std::to_string(rm)+"ULL);\n";{ cp.code()+="{ // block\n";cp.code()+="((RV64IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = -4294967296LL | (etiss_uint64)(res);\n";cp.code()+="} // block\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0; std::stringstream ss; ss<< "fcvt_s_lu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  , "fcvt_s_lu"  , (uint32_t)  0xd0300053, (uint32_t)  0xfff0007f, [] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FCVT_S_LU\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 res = fcvt_64_32(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL], 3ULL, "+std::to_string(rm)+"ULL);\n";{ cp.code()+="{ // block\n";cp.code()+="((RV64IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = -4294967296LL | (etiss_uint64)(res);\n";cp.code()+="} // block\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  , 0  , [] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;std::stringstream ss;ss<< "fcvt_s_lu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();}    )

static