ETISS 0.8.0
Extendable Translating Instruction Set Simulator (version 0.8.0)
Variables
RV64IMACFD_RV32IInstr.cpp File Reference
#include "RV64IMACFDArch.h"
#include "RV64IMACFDFuncs.h"
Include dependency graph for RV64IMACFD_RV32IInstr.cpp:

Go to the source code of this file.

Variables

static InstructionDefinition lui_rd_imm (ISA32_RV64IMACFD, "lui",(uint32_t) 0x000037,(uint32_t) 0x00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LUI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string((etiss_uint64)(((etiss_int32)(imm))))+"ULL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "lui"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition auipc_rd_imm (ISA32_RV64IMACFD, "auipc",(uint32_t) 0x000017,(uint32_t) 0x00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//AUIPC\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string(ic.current_address_+(etiss_int32)(imm))+"LL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "auipc"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition jal_rd_imm (ISA32_RV64IMACFD, "jal",(uint32_t) 0x00006f,(uint32_t) 0x00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(19, 12);imm+=R_imm_12.read(ba)<< 12;static BitArrayRange R_imm_11(20, 20);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(30, 21);imm+=R_imm_1.read(ba)<< 1;static BitArrayRange R_imm_20(31, 31);imm+=R_imm_20.read(ba)<< 20;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//JAL\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";if(imm % 2ULL) { { cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string(ic.current_address_+4ULL)+"ULL;\n";} cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int32)(((etiss_int32) imm)<<(11)) >>(11)))+"LL;\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//JAL\n");cp.code()+="return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(19, 12);imm+=R_imm_12.read(ba)<< 12;static BitArrayRange R_imm_11(20, 20);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(30, 21);imm+=R_imm_1.read(ba)<< 1;static BitArrayRange R_imm_20(31, 31);imm+=R_imm_20.read(ba)<< 20;std::stringstream ss;ss<< "jal"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition jalr_rd_rs1_imm (ISA32_RV64IMACFD, "jalr",(uint32_t) 0x000067,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//JALR\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 new_pc = (*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL) & -2LL;\n";cp.code()+="if (new_pc % 2ULL) { // conditional\n";{ cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="else { // conditional\n";{ cp.code()+="{ // block\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string(ic.current_address_+4ULL)+"ULL;\n";} cp.code()+="cpu->nextPc = new_pc & -2LL;\n";cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//JALR\n");cp.code()+="return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "jalr"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition beq_imm_rs1_rs2 (ISA32_RV64IMACFD, "beq",(uint32_t) 0x000063,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BEQ\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="if (*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] == *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";{ cp.code()+="{ // block\n";if(imm % 2ULL) { { cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) >>(3)))+"LL;\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BEQ\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "beq"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition bne_imm_rs1_rs2 (ISA32_RV64IMACFD, "bne",(uint32_t) 0x001063,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BNE\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="if (*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] != *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";{ cp.code()+="{ // block\n";if(imm % 2ULL) { { cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) >>(3)))+"LL;\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BNE\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "bne"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition blt_imm_rs1_rs2 (ISA32_RV64IMACFD, "blt",(uint32_t) 0x004063,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BLT\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="if ((etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) < (etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) { // conditional\n";{ cp.code()+="{ // block\n";if(imm % 2ULL) { { cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) >>(3)))+"LL;\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BLT\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "blt"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition bge_imm_rs1_rs2 (ISA32_RV64IMACFD, "bge",(uint32_t) 0x005063,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BGE\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="if ((etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) >= (etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) { // conditional\n";{ cp.code()+="{ // block\n";if(imm % 2ULL) { { cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) >>(3)))+"LL;\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BGE\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "bge"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition bltu_imm_rs1_rs2 (ISA32_RV64IMACFD, "bltu",(uint32_t) 0x006063,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BLTU\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="if (*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] < *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";{ cp.code()+="{ // block\n";if(imm % 2ULL) { { cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) >>(3)))+"LL;\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BLTU\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "bltu"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition bgeu_imm_rs1_rs2 (ISA32_RV64IMACFD, "bgeu",(uint32_t) 0x007063,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BGEU\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="if (*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] >= *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";{ cp.code()+="{ // block\n";if(imm % 2ULL) { { cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) >>(3)))+"LL;\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BGEU\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "bgeu"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition lb_rd_rs1_imm (ISA32_RV64IMACFD, "lb",(uint32_t) 0x000003,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LB\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 load_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint8 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 1);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int8 res = (etiss_int8)(mem_val_0);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint64)(res);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LB\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "lb"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition lh_rd_rs1_imm (ISA32_RV64IMACFD, "lh",(uint32_t) 0x001003,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LH\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 load_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint16 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 2);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int16 res = (etiss_int16)(mem_val_0);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint64)(res);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LH\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "lh"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition lw_rd_rs1_imm (ISA32_RV64IMACFD, "lw",(uint32_t) 0x002003,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LW\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 load_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int32 res = (etiss_int32)(mem_val_0);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint64)(res);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LW\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "lw"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition lbu_rd_rs1_imm (ISA32_RV64IMACFD, "lbu",(uint32_t) 0x004003,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LBU\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 load_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint8 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 1);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_uint8 res = (etiss_uint8)(mem_val_0);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint64)(res);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LBU\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "lbu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition lhu_rd_rs1_imm (ISA32_RV64IMACFD, "lhu",(uint32_t) 0x005003,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LHU\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 load_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint16 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 2);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_uint16 res = (etiss_uint16)(mem_val_0);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint64)(res);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LHU\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "lhu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition sb_imm_rs1_rs2 (ISA32_RV64IMACFD, "sb",(uint32_t) 0x000023,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SB\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 store_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint8 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_int8)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, store_address, (etiss_uint8*)&mem_val_0, 1);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SB\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;std::stringstream ss;ss<< "sb"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition sh_imm_rs1_rs2 (ISA32_RV64IMACFD, "sh",(uint32_t) 0x001023,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SH\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 store_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint16 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_int16)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, store_address, (etiss_uint8*)&mem_val_0, 2);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SH\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;std::stringstream ss;ss<< "sh"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition sw_imm_rs1_rs2 (ISA32_RV64IMACFD, "sw",(uint32_t) 0x002023,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SW\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 store_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_int32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, store_address, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SW\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;std::stringstream ss;ss<< "sw"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition addi_rd_rs1_imm (ISA32_RV64IMACFD, "addi",(uint32_t) 0x000013,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ADDI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "addi"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition slti_rd_rs1_imm (ISA32_RV64IMACFD, "slti",(uint32_t) 0x002013,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLTI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (((etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) < "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL)) ? (1ULL) : (0LL);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "slti"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition sltiu_rd_rs1_imm (ISA32_RV64IMACFD, "sltiu",(uint32_t) 0x003013,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLTIU\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = ((*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] < "+std::to_string((etiss_uint64)((((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))))+"ULL)) ? (1ULL) : (0LL);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "sltiu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition xori_rd_rs1_imm (ISA32_RV64IMACFD, "xori",(uint32_t) 0x004013,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//XORI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] ^ "+std::to_string((etiss_uint64)((((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))))+"ULL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "xori"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition ori_rd_rs1_imm (ISA32_RV64IMACFD, "ori",(uint32_t) 0x006013,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ORI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] | "+std::to_string((etiss_uint64)((((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))))+"ULL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "ori"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition andi_rd_rs1_imm (ISA32_RV64IMACFD, "andi",(uint32_t) 0x007013,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ANDI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] & "+std::to_string((etiss_uint64)((((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))))+"ULL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "andi"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition slli_rd_rs1_shamt (ISA32_RV64IMACFD, "slli",(uint32_t) 0x001013,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLLI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] << "+std::to_string(shamt)+"ULL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;std::stringstream ss;ss<< "slli"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | shamt="+std::to_string(shamt)+"]");return ss.str();})
 
static InstructionDefinition srli_rd_rs1_shamt (ISA32_RV64IMACFD, "srli",(uint32_t) 0x005013,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRLI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] >> "+std::to_string(shamt)+"ULL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;std::stringstream ss;ss<< "srli"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | shamt="+std::to_string(shamt)+"]");return ss.str();})
 
static InstructionDefinition srai_rd_rs1_shamt (ISA32_RV64IMACFD, "srai",(uint32_t) 0x40005013,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRAI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) >> "+std::to_string(shamt)+"ULL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;std::stringstream ss;ss<< "srai"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | shamt="+std::to_string(shamt)+"]");return ss.str();})
 
static InstructionDefinition add_rd_rs1_rs2 (ISA32_RV64IMACFD, "add",(uint32_t) 0x000033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ADD\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "add"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition sub_rd_rs1_rs2 (ISA32_RV64IMACFD, "sub",(uint32_t) 0x40000033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SUB\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] - *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "sub"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition sll_rd_rs1_rs2 (ISA32_RV64IMACFD, "sll",(uint32_t) 0x001033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLL\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] << (*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL] & 63ULL);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "sll"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition slt_rd_rs1_rs2 (ISA32_RV64IMACFD, "slt",(uint32_t) 0x002033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLT\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = ((etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) < (etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) ? (1ULL) : (0LL);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "slt"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition sltu_rd_rs1_rs2 (ISA32_RV64IMACFD, "sltu",(uint32_t) 0x003033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLTU\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] < *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) ? (1ULL) : (0LL);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "sltu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition xor_rd_rs1_rs2 (ISA32_RV64IMACFD, "xor",(uint32_t) 0x004033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//XOR\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] ^ *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "xor"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition srl_rd_rs1_rs2 (ISA32_RV64IMACFD, "srl",(uint32_t) 0x005033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRL\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] >> (*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL] & 63ULL);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "srl"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition sra_rd_rs1_rs2 (ISA32_RV64IMACFD, "sra",(uint32_t) 0x40005033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRA\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) >> (*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL] & 63ULL);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "sra"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition or_rd_rs1_rs2 (ISA32_RV64IMACFD, "or",(uint32_t) 0x006033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//OR\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] | *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "or"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition and_rd_rs1_rs2 (ISA32_RV64IMACFD, "and",(uint32_t) 0x007033,(uint32_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//AND\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] & *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "and"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition fence_rd_rs1_succ_pred_fm (ISA32_RV64IMACFD, "fence",(uint32_t) 0x00000f,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 succ=0;static BitArrayRange R_succ_0(23, 20);succ+=R_succ_0.read(ba)<< 0;etiss_uint8 pred=0;static BitArrayRange R_pred_0(27, 24);pred+=R_pred_0.read(ba)<< 0;etiss_uint8 fm=0;static BitArrayRange R_fm_0(31, 28);fm+=R_fm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FENCE\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} cp.code()+="((RV64IMACFD*)cpu)->FENCE[0ULL] = "+std::to_string(pred<< 4ULL|succ)+"ULL;\n";cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 succ=0;static BitArrayRange R_succ_0(23, 20);succ+=R_succ_0.read(ba)<< 0;etiss_uint8 pred=0;static BitArrayRange R_pred_0(27, 24);pred+=R_pred_0.read(ba)<< 0;etiss_uint8 fm=0;static BitArrayRange R_fm_0(31, 28);fm+=R_fm_0.read(ba)<< 0;std::stringstream ss;ss<< "fence"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | succ="+std::to_string(succ)+" | pred="+std::to_string(pred)+" | fm="+std::to_string(fm)+"]");return ss.str();})
 

Variable Documentation

◆ add_rd_rs1_rs2

InstructionDefinition add_rd_rs1_rs2(ISA32_RV64IMACFD, "add",(uint32_t) 0x000033,(uint32_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ADD\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; std::stringstream ss; ss<< "add"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"add"  ,
(uint32_t 0x000033,
(uint32_t 0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ADD\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "add"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ addi_rd_rs1_imm

InstructionDefinition addi_rd_rs1_imm(ISA32_RV64IMACFD, "addi",(uint32_t) 0x000013,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ADDI\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "addi"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"addi"  ,
(uint32_t 0x000013,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ADDI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "addi"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ and_rd_rs1_rs2

InstructionDefinition and_rd_rs1_rs2(ISA32_RV64IMACFD, "and",(uint32_t) 0x007033,(uint32_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//AND\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] & *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; std::stringstream ss; ss<< "and"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"and"  ,
(uint32_t 0x007033,
(uint32_t 0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//AND\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] & *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "and"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ andi_rd_rs1_imm

InstructionDefinition andi_rd_rs1_imm(ISA32_RV64IMACFD, "andi",(uint32_t) 0x007013,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ANDI\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] & "+std::to_string((etiss_uint64)((((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))))+"ULL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "andi"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"andi"  ,
(uint32_t 0x007013,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ANDI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] & "+std::to_string((etiss_uint64)((((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))))+"ULL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "andi"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ auipc_rd_imm

InstructionDefinition auipc_rd_imm(ISA32_RV64IMACFD, "auipc",(uint32_t) 0x000017,(uint32_t) 0x00007f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//AUIPC\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string(ic.current_address_+(etiss_int32)(imm))+"LL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12; std::stringstream ss; ss<< "auipc"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"auipc"  ,
(uint32_t 0x000017,
(uint32_t 0x00007f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//AUIPC\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string(ic.current_address_+(etiss_int32)(imm))+"LL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "auipc"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ beq_imm_rs1_rs2

InstructionDefinition beq_imm_rs1_rs2(ISA32_RV64IMACFD, "beq",(uint32_t) 0x000063,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BEQ\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="if (*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] == *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";{ cp.code()+="{ // block\n";if(imm % 2ULL) { { cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) >>(3)))+"LL;\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BEQ\n"); cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; std::stringstream ss; ss<< "beq"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"beq"  ,
(uint32_t 0x000063,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BEQ\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="if (*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] == *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";{ cp.code()+="{ // block\n";if(imm % 2ULL) { { cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) >>(3)))+"LL;\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BEQ\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "beq"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ bge_imm_rs1_rs2

InstructionDefinition bge_imm_rs1_rs2(ISA32_RV64IMACFD, "bge",(uint32_t) 0x005063,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BGE\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="if ((etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) >= (etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) { // conditional\n";{ cp.code()+="{ // block\n";if(imm % 2ULL) { { cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) >>(3)))+"LL;\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BGE\n"); cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; std::stringstream ss; ss<< "bge"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"bge"  ,
(uint32_t 0x005063,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BGE\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="if ((etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) >= (etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) { // conditional\n";{ cp.code()+="{ // block\n";if(imm % 2ULL) { { cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) >>(3)))+"LL;\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BGE\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "bge"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ bgeu_imm_rs1_rs2

InstructionDefinition bgeu_imm_rs1_rs2(ISA32_RV64IMACFD, "bgeu",(uint32_t) 0x007063,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BGEU\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="if (*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] >= *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";{ cp.code()+="{ // block\n";if(imm % 2ULL) { { cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) >>(3)))+"LL;\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BGEU\n"); cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; std::stringstream ss; ss<< "bgeu"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"bgeu"  ,
(uint32_t 0x007063,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BGEU\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="if (*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] >= *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";{ cp.code()+="{ // block\n";if(imm % 2ULL) { { cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) >>(3)))+"LL;\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BGEU\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "bgeu"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ blt_imm_rs1_rs2

InstructionDefinition blt_imm_rs1_rs2(ISA32_RV64IMACFD, "blt",(uint32_t) 0x004063,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BLT\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="if ((etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) < (etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) { // conditional\n";{ cp.code()+="{ // block\n";if(imm % 2ULL) { { cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) >>(3)))+"LL;\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BLT\n"); cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; std::stringstream ss; ss<< "blt"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"blt"  ,
(uint32_t 0x004063,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BLT\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="if ((etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) < (etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) { // conditional\n";{ cp.code()+="{ // block\n";if(imm % 2ULL) { { cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) >>(3)))+"LL;\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BLT\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "blt"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ bltu_imm_rs1_rs2

InstructionDefinition bltu_imm_rs1_rs2(ISA32_RV64IMACFD, "bltu",(uint32_t) 0x006063,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BLTU\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="if (*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] < *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";{ cp.code()+="{ // block\n";if(imm % 2ULL) { { cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) >>(3)))+"LL;\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BLTU\n"); cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; std::stringstream ss; ss<< "bltu"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"bltu"  ,
(uint32_t 0x006063,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BLTU\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="if (*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] < *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";{ cp.code()+="{ // block\n";if(imm % 2ULL) { { cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) >>(3)))+"LL;\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BLTU\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "bltu"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ bne_imm_rs1_rs2

InstructionDefinition bne_imm_rs1_rs2(ISA32_RV64IMACFD, "bne",(uint32_t) 0x001063,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BNE\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="if (*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] != *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";{ cp.code()+="{ // block\n";if(imm % 2ULL) { { cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) >>(3)))+"LL;\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BNE\n"); cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; std::stringstream ss; ss<< "bne"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"bne"  ,
(uint32_t 0x001063,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BNE\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="if (*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] != *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";{ cp.code()+="{ // block\n";if(imm % 2ULL) { { cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) >>(3)))+"LL;\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BNE\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "bne"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ fence_rd_rs1_succ_pred_fm

InstructionDefinition fence_rd_rs1_succ_pred_fm(ISA32_RV64IMACFD, "fence",(uint32_t) 0x00000f,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 succ=0;static BitArrayRange R_succ_0(23, 20);succ+=R_succ_0.read(ba)<< 0;etiss_uint8 pred=0;static BitArrayRange R_pred_0(27, 24);pred+=R_pred_0.read(ba)<< 0;etiss_uint8 fm=0;static BitArrayRange R_fm_0(31, 28);fm+=R_fm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FENCE\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} cp.code()+="((RV64IMACFD*)cpu)->FENCE[0ULL] = "+std::to_string(pred<< 4ULL|succ)+"ULL;\n";cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 succ=0;static BitArrayRange R_succ_0(23, 20);succ+=R_succ_0.read(ba)<< 0;etiss_uint8 pred=0;static BitArrayRange R_pred_0(27, 24);pred+=R_pred_0.read(ba)<< 0;etiss_uint8 fm=0;static BitArrayRange R_fm_0(31, 28);fm+=R_fm_0.read(ba)<< 0; std::stringstream ss; ss<< "fence"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | succ="+std::to_string(succ)+" | pred="+std::to_string(pred)+" | fm="+std::to_string(fm)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"fence"  ,
(uint32_t 0x00000f,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 succ=0;static BitArrayRange R_succ_0(23, 20);succ+=R_succ_0.read(ba)<< 0;etiss_uint8 pred=0;static BitArrayRange R_pred_0(27, 24);pred+=R_pred_0.read(ba)<< 0;etiss_uint8 fm=0;static BitArrayRange R_fm_0(31, 28);fm+=R_fm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FENCE\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} cp.code()+="((RV64IMACFD*)cpu)->FENCE[0ULL] = "+std::to_string(pred<< 4ULL|succ)+"ULL;\n";cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 succ=0;static BitArrayRange R_succ_0(23, 20);succ+=R_succ_0.read(ba)<< 0;etiss_uint8 pred=0;static BitArrayRange R_pred_0(27, 24);pred+=R_pred_0.read(ba)<< 0;etiss_uint8 fm=0;static BitArrayRange R_fm_0(31, 28);fm+=R_fm_0.read(ba)<< 0;std::stringstream ss;ss<< "fence"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | succ="+std::to_string(succ)+" | pred="+std::to_string(pred)+" | fm="+std::to_string(fm)+"]");return ss.str();}   
)
static

◆ jal_rd_imm

InstructionDefinition jal_rd_imm(ISA32_RV64IMACFD, "jal",(uint32_t) 0x00006f,(uint32_t) 0x00007f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(19, 12);imm+=R_imm_12.read(ba)<< 12;static BitArrayRange R_imm_11(20, 20);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(30, 21);imm+=R_imm_1.read(ba)<< 1;static BitArrayRange R_imm_20(31, 31);imm+=R_imm_20.read(ba)<< 20; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//JAL\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";if(imm % 2ULL) { { cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string(ic.current_address_+4ULL)+"ULL;\n";} cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int32)(((etiss_int32) imm)<<(11)) >>(11)))+"LL;\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//JAL\n"); cp.code()+="return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(19, 12);imm+=R_imm_12.read(ba)<< 12;static BitArrayRange R_imm_11(20, 20);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(30, 21);imm+=R_imm_1.read(ba)<< 1;static BitArrayRange R_imm_20(31, 31);imm+=R_imm_20.read(ba)<< 20; std::stringstream ss; ss<< "jal"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"jal"  ,
(uint32_t 0x00006f,
(uint32_t 0x00007f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(19, 12);imm+=R_imm_12.read(ba)<< 12;static BitArrayRange R_imm_11(20, 20);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(30, 21);imm+=R_imm_1.read(ba)<< 1;static BitArrayRange R_imm_20(31, 31);imm+=R_imm_20.read(ba)<< 20;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//JAL\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";if(imm % 2ULL) { { cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string(ic.current_address_+4ULL)+"ULL;\n";} cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int32)(((etiss_int32) imm)<<(11)) >>(11)))+"LL;\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//JAL\n");cp.code()+="return cpu->exception;\n";} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(19, 12);imm+=R_imm_12.read(ba)<< 12;static BitArrayRange R_imm_11(20, 20);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(30, 21);imm+=R_imm_1.read(ba)<< 1;static BitArrayRange R_imm_20(31, 31);imm+=R_imm_20.read(ba)<< 20;std::stringstream ss;ss<< "jal"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ jalr_rd_rs1_imm

InstructionDefinition jalr_rd_rs1_imm(ISA32_RV64IMACFD, "jalr",(uint32_t) 0x000067,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//JALR\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 new_pc = (*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL) & -2LL;\n";cp.code()+="if (new_pc % 2ULL) { // conditional\n";{ cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="else { // conditional\n";{ cp.code()+="{ // block\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string(ic.current_address_+4ULL)+"ULL;\n";} cp.code()+="cpu->nextPc = new_pc & -2LL;\n";cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//JALR\n"); cp.code()+="return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "jalr"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"jalr"  ,
(uint32_t 0x000067,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//JALR\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 new_pc = (*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL) & -2LL;\n";cp.code()+="if (new_pc % 2ULL) { // conditional\n";{ cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="else { // conditional\n";{ cp.code()+="{ // block\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string(ic.current_address_+4ULL)+"ULL;\n";} cp.code()+="cpu->nextPc = new_pc & -2LL;\n";cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//JALR\n");cp.code()+="return cpu->exception;\n";} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "jalr"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ lb_rd_rs1_imm

InstructionDefinition lb_rd_rs1_imm(ISA32_RV64IMACFD, "lb",(uint32_t) 0x000003,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LB\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 load_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint8 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 1);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int8 res = (etiss_int8)(mem_val_0);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint64)(res);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LB\n"); cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "lb"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"lb"  ,
(uint32_t 0x000003,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LB\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 load_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint8 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 1);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int8 res = (etiss_int8)(mem_val_0);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint64)(res);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LB\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "lb"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ lbu_rd_rs1_imm

InstructionDefinition lbu_rd_rs1_imm(ISA32_RV64IMACFD, "lbu",(uint32_t) 0x004003,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LBU\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 load_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint8 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 1);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_uint8 res = (etiss_uint8)(mem_val_0);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint64)(res);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LBU\n"); cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "lbu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"lbu"  ,
(uint32_t 0x004003,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LBU\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 load_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint8 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 1);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_uint8 res = (etiss_uint8)(mem_val_0);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint64)(res);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LBU\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "lbu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ lh_rd_rs1_imm

InstructionDefinition lh_rd_rs1_imm(ISA32_RV64IMACFD, "lh",(uint32_t) 0x001003,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LH\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 load_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint16 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 2);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int16 res = (etiss_int16)(mem_val_0);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint64)(res);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LH\n"); cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "lh"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"lh"  ,
(uint32_t 0x001003,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LH\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 load_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint16 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 2);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int16 res = (etiss_int16)(mem_val_0);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint64)(res);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LH\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "lh"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ lhu_rd_rs1_imm

InstructionDefinition lhu_rd_rs1_imm(ISA32_RV64IMACFD, "lhu",(uint32_t) 0x005003,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LHU\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 load_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint16 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 2);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_uint16 res = (etiss_uint16)(mem_val_0);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint64)(res);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LHU\n"); cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "lhu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"lhu"  ,
(uint32_t 0x005003,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LHU\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 load_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint16 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 2);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_uint16 res = (etiss_uint16)(mem_val_0);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint64)(res);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LHU\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "lhu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ lui_rd_imm

InstructionDefinition lui_rd_imm(ISA32_RV64IMACFD, "lui",(uint32_t) 0x000037,(uint32_t) 0x00007f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LUI\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string((etiss_uint64)(((etiss_int32)(imm))))+"ULL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12; std::stringstream ss; ss<< "lui"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"lui"  ,
(uint32_t 0x000037,
(uint32_t 0x00007f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LUI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string((etiss_uint64)(((etiss_int32)(imm))))+"ULL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "lui"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ lw_rd_rs1_imm

InstructionDefinition lw_rd_rs1_imm(ISA32_RV64IMACFD, "lw",(uint32_t) 0x002003,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LW\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 load_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int32 res = (etiss_int32)(mem_val_0);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint64)(res);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LW\n"); cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "lw"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"lw"  ,
(uint32_t 0x002003,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LW\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 load_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int32 res = (etiss_int32)(mem_val_0);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint64)(res);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LW\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "lw"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ or_rd_rs1_rs2

InstructionDefinition or_rd_rs1_rs2(ISA32_RV64IMACFD, "or",(uint32_t) 0x006033,(uint32_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//OR\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] | *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; std::stringstream ss; ss<< "or"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"or"  ,
(uint32_t 0x006033,
(uint32_t 0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//OR\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] | *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "or"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ ori_rd_rs1_imm

InstructionDefinition ori_rd_rs1_imm(ISA32_RV64IMACFD, "ori",(uint32_t) 0x006013,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ORI\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] | "+std::to_string((etiss_uint64)((((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))))+"ULL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "ori"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"ori"  ,
(uint32_t 0x006013,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ORI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] | "+std::to_string((etiss_uint64)((((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))))+"ULL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "ori"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ sb_imm_rs1_rs2

InstructionDefinition sb_imm_rs1_rs2(ISA32_RV64IMACFD, "sb",(uint32_t) 0x000023,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SB\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 store_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint8 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_int8)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, store_address, (etiss_uint8*)&mem_val_0, 1);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SB\n"); cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5; std::stringstream ss; ss<< "sb"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"sb"  ,
(uint32_t 0x000023,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SB\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 store_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint8 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_int8)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, store_address, (etiss_uint8*)&mem_val_0, 1);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SB\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;std::stringstream ss;ss<< "sb"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ sh_imm_rs1_rs2

InstructionDefinition sh_imm_rs1_rs2(ISA32_RV64IMACFD, "sh",(uint32_t) 0x001023,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SH\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 store_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint16 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_int16)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, store_address, (etiss_uint8*)&mem_val_0, 2);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SH\n"); cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5; std::stringstream ss; ss<< "sh"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"sh"  ,
(uint32_t 0x001023,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SH\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 store_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint16 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_int16)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, store_address, (etiss_uint8*)&mem_val_0, 2);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SH\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;std::stringstream ss;ss<< "sh"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ sll_rd_rs1_rs2

InstructionDefinition sll_rd_rs1_rs2(ISA32_RV64IMACFD, "sll",(uint32_t) 0x001033,(uint32_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLL\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] << (*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL] & 63ULL);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; std::stringstream ss; ss<< "sll"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"sll"  ,
(uint32_t 0x001033,
(uint32_t 0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLL\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] << (*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL] & 63ULL);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "sll"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ slli_rd_rs1_shamt

InstructionDefinition slli_rd_rs1_shamt(ISA32_RV64IMACFD, "slli",(uint32_t) 0x001013,(uint32_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLLI\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] << "+std::to_string(shamt)+"ULL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0; std::stringstream ss; ss<< "slli"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | shamt="+std::to_string(shamt)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"slli"  ,
(uint32_t 0x001013,
(uint32_t 0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLLI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] << "+std::to_string(shamt)+"ULL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;std::stringstream ss;ss<< "slli"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | shamt="+std::to_string(shamt)+"]");return ss.str();}   
)
static

◆ slt_rd_rs1_rs2

InstructionDefinition slt_rd_rs1_rs2(ISA32_RV64IMACFD, "slt",(uint32_t) 0x002033,(uint32_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLT\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = ((etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) < (etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) ? (1ULL) : (0LL);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; std::stringstream ss; ss<< "slt"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"slt"  ,
(uint32_t 0x002033,
(uint32_t 0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLT\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = ((etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) < (etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) ? (1ULL) : (0LL);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "slt"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ slti_rd_rs1_imm

InstructionDefinition slti_rd_rs1_imm(ISA32_RV64IMACFD, "slti",(uint32_t) 0x002013,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLTI\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (((etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) < "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL)) ? (1ULL) : (0LL);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "slti"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"slti"  ,
(uint32_t 0x002013,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLTI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (((etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) < "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL)) ? (1ULL) : (0LL);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "slti"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ sltiu_rd_rs1_imm

InstructionDefinition sltiu_rd_rs1_imm(ISA32_RV64IMACFD, "sltiu",(uint32_t) 0x003013,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLTIU\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = ((*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] < "+std::to_string((etiss_uint64)((((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))))+"ULL)) ? (1ULL) : (0LL);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "sltiu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"sltiu"  ,
(uint32_t 0x003013,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLTIU\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = ((*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] < "+std::to_string((etiss_uint64)((((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))))+"ULL)) ? (1ULL) : (0LL);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "sltiu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ sltu_rd_rs1_rs2

InstructionDefinition sltu_rd_rs1_rs2(ISA32_RV64IMACFD, "sltu",(uint32_t) 0x003033,(uint32_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLTU\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] < *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) ? (1ULL) : (0LL);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; std::stringstream ss; ss<< "sltu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"sltu"  ,
(uint32_t 0x003033,
(uint32_t 0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLTU\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] < *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) ? (1ULL) : (0LL);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "sltu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ sra_rd_rs1_rs2

InstructionDefinition sra_rd_rs1_rs2(ISA32_RV64IMACFD, "sra",(uint32_t) 0x40005033,(uint32_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRA\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) >> (*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL] & 63ULL);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; std::stringstream ss; ss<< "sra"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"sra"  ,
(uint32_t 0x40005033,
(uint32_t 0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRA\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) >> (*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL] & 63ULL);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "sra"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ srai_rd_rs1_shamt

InstructionDefinition srai_rd_rs1_shamt(ISA32_RV64IMACFD, "srai",(uint32_t) 0x40005013,(uint32_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRAI\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) >> "+std::to_string(shamt)+"ULL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0; std::stringstream ss; ss<< "srai"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | shamt="+std::to_string(shamt)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"srai"  ,
(uint32_t 0x40005013,
(uint32_t 0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRAI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_int64)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) >> "+std::to_string(shamt)+"ULL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;std::stringstream ss;ss<< "srai"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | shamt="+std::to_string(shamt)+"]");return ss.str();}   
)
static

◆ srl_rd_rs1_rs2

InstructionDefinition srl_rd_rs1_rs2(ISA32_RV64IMACFD, "srl",(uint32_t) 0x005033,(uint32_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRL\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] >> (*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL] & 63ULL);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; std::stringstream ss; ss<< "srl"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"srl"  ,
(uint32_t 0x005033,
(uint32_t 0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRL\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] >> (*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL] & 63ULL);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "srl"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ srli_rd_rs1_shamt

InstructionDefinition srli_rd_rs1_shamt(ISA32_RV64IMACFD, "srli",(uint32_t) 0x005013,(uint32_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRLI\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] >> "+std::to_string(shamt)+"ULL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0; std::stringstream ss; ss<< "srli"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | shamt="+std::to_string(shamt)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"srli"  ,
(uint32_t 0x005013,
(uint32_t 0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRLI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] >> "+std::to_string(shamt)+"ULL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;std::stringstream ss;ss<< "srli"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | shamt="+std::to_string(shamt)+"]");return ss.str();}   
)
static

◆ sub_rd_rs1_rs2

InstructionDefinition sub_rd_rs1_rs2(ISA32_RV64IMACFD, "sub",(uint32_t) 0x40000033,(uint32_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SUB\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] - *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; std::stringstream ss; ss<< "sub"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"sub"  ,
(uint32_t 0x40000033,
(uint32_t 0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SUB\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] - *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "sub"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ sw_imm_rs1_rs2

InstructionDefinition sw_imm_rs1_rs2(ISA32_RV64IMACFD, "sw",(uint32_t) 0x002023,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SW\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 store_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_int32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, store_address, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SW\n"); cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5; std::stringstream ss; ss<< "sw"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"sw"  ,
(uint32_t 0x002023,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SW\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 store_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))+"LL;\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_int32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, store_address, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SW\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;std::stringstream ss;ss<< "sw"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ xor_rd_rs1_rs2

InstructionDefinition xor_rd_rs1_rs2(ISA32_RV64IMACFD, "xor",(uint32_t) 0x004033,(uint32_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//XOR\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] ^ *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; std::stringstream ss; ss<< "xor"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"xor"  ,
(uint32_t 0x004033,
(uint32_t 0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//XOR\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] ^ *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "xor"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ xori_rd_rs1_imm

InstructionDefinition xori_rd_rs1_imm(ISA32_RV64IMACFD, "xori",(uint32_t) 0x004013,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//XORI\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] ^ "+std::to_string((etiss_uint64)((((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))))+"ULL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "xori"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV64IMACFD  ,
"xori"  ,
(uint32_t 0x004013,
(uint32_t 0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//XORI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] ^ "+std::to_string((etiss_uint64)((((etiss_int16)(((etiss_int16) imm)<<(4)) >>(4)))))+"ULL;\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "xori"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static