ETISS 0.11.2
ExtendableTranslatingInstructionSetSimulator(version0.11.2)
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MemoryDevice.cpp
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1// SPDX-License-Identifier: BSD-3-Clause
2//
3// This file is part of ETISS. It is licensed under the BSD 3-Clause License; you may not use this file except in
4// compliance with the License. You should have received a copy of the license along with this project. If not, see the
5// LICENSE file.
6
8#include "etiss/System.h"
9
10namespace etiss
11{
12namespace plugin
13{
14
15namespace
16{
17
19{
20
21 struct ETISS_System sys;
22
24
26
27 bool (*fastrule)(uint64_t addr, unsigned len);
28};
29
30bool empty_fastrule(uint64_t, unsigned)
31{
32 return false; // pass through directly
33}
34
36{
37 MapperSystem *lsys = ((MapperSystem *)handle);
38 if (lsys->fastrule(addr, length))
39 {
40 return lsys->this_->iread(lsys->orig, cpu, addr, length);
41 }
42 ETISS_System *sys = lsys->orig;
43 return sys->iread(sys->handle, cpu, addr, length);
44}
46{
47 MapperSystem *lsys = ((MapperSystem *)handle);
48 if (lsys->fastrule(addr, length))
49 {
50 return lsys->this_->iwrite(lsys->orig, cpu, addr, buffer, length);
51 }
52 ETISS_System *sys = lsys->orig;
53 return sys->iwrite(sys->handle, cpu, addr, buffer, length);
54}
55
57{
58 MapperSystem *lsys = ((MapperSystem *)handle);
59 if (lsys->fastrule(addr, length))
60 {
61 return lsys->this_->dread(lsys->orig, cpu, addr, buffer, length);
62 }
63 ETISS_System *sys = lsys->orig;
64 return sys->dread(sys->handle, cpu, addr, buffer, length);
65}
67{
68 MapperSystem *lsys = ((MapperSystem *)handle);
69 if (lsys->fastrule(addr, length))
70 {
71 return lsys->this_->dwrite(lsys->orig, cpu, addr, buffer, length);
72 }
73 ETISS_System *sys = lsys->orig;
74 return sys->dwrite(sys->handle, cpu, addr, buffer, length);
75}
76
78{
79 MapperSystem *lsys = ((MapperSystem *)handle);
80 if (lsys->fastrule(addr, length))
81 {
82 return lsys->this_->dbg_read(lsys->orig, addr, buffer, length);
83 }
84 ETISS_System *sys = lsys->orig;
85 return sys->dbg_read(sys->handle, addr, buffer, length);
86}
87
89{
90 MapperSystem *lsys = ((MapperSystem *)handle);
91 if (lsys->fastrule(addr, length))
92 {
93 return lsys->this_->dbg_write(lsys->orig, addr, buffer, length);
94 }
95 ETISS_System *sys = lsys->orig;
96 return sys->dbg_write(sys->handle, addr, buffer, length);
97}
98
99#ifdef ETISS_ENABLE_SYNCTIME_EXCEPTIONS
101#else
102void
103#endif
104syncTime_(void *handle, ETISS_CPU *cpu)
105{
106 MapperSystem *lsys = ((MapperSystem *)handle);
107 ETISS_System *sys = lsys->orig;
108#ifdef ETISS_ENABLE_SYNCTIME_EXCEPTIONS
109 return sys->syncTime(sys->handle, cpu);
110#else
111 sys->syncTime(sys->handle, cpu);
112#endif
113}
114
115} // namespace
116
117MemoryDeviceMapper::MemoryDeviceMapper(std::string name) : name_(name) {}
118
120
122{
123 MapperSystem *ret = new MapperSystem();
124
125 ret->sys.iread = &iread_;
126 ret->sys.iwrite = &iwrite_;
127 ret->sys.dread = &dread_;
128 ret->sys.dwrite = &dwrite_;
129 ret->sys.dbg_read = &dbg_read_;
130 ret->sys.dbg_write = &dbg_write_;
131 ret->sys.syncTime = &syncTime_;
132
133 ret->sys.handle = (void *)ret;
134
135 ret->this_ = this;
136
137 ret->orig = system;
138
139 ret->fastrule = &empty_fastrule;
140
141 return (ETISS_System *)ret;
142}
144{
145 ETISS_System *ret = ((MapperSystem *)system)->orig;
146
147 delete system;
148
149 return ret;
150}
151
152etiss::int32 MemoryDeviceMapper::iread(ETISS_System *sys, ETISS_CPU *cpu, etiss::uint64 addr, etiss::uint32 len)
153{
154 while (true)
155 {
156 unsigned nlen = len;
157 int index = map(true, true, false, addr, 0, len, nlen);
158 if ((index < 0) || (index > (int)devices_.size()) || (devices_[index] == 0))
159 {
160 int32_t err = sys->iread(sys->handle, cpu, addr, len);
161 if (err)
162 return err;
163 }
164 else
165 {
166 int32_t err = devices_[index]->iread(cpu, addr, nlen);
167 if (err)
168 return err;
169 }
170 len = len - nlen;
171 if (len == 0)
172 return 0;
173 addr += nlen;
174 }
175}
176etiss::int32 MemoryDeviceMapper::iwrite(ETISS_System *sys, ETISS_CPU *cpu, etiss::uint64 addr, etiss::uint8 *buf,
177 etiss::uint32 len)
178{
179 while (true)
180 {
181 unsigned nlen = len;
182 int index = map(true, false, false, addr, buf, len, nlen);
183 if ((index < 0) || (index > (int)devices_.size()) || (devices_[index] == 0))
184 {
185 int32_t err = sys->iwrite(sys->handle, cpu, addr, buf, len);
186 if (err)
187 return err;
188 }
189 else
190 {
191 int32_t err = devices_[index]->iwrite(cpu, addr, buf, nlen);
192 if (err)
193 return err;
194 }
195 len = len - nlen;
196 if (len == 0)
197 return 0;
198 buf += nlen;
199 addr += nlen;
200 }
201}
202etiss::int32 MemoryDeviceMapper::dread(ETISS_System *sys, ETISS_CPU *cpu, etiss::uint64 addr, etiss::uint8 *buf,
203 etiss::uint32 len)
204{
205 while (true)
206 {
207 unsigned nlen = len;
208 int index = map(false, true, false, addr, buf, len, nlen);
209 if ((index < 0) || (index > (int)devices_.size()) || (devices_[index] == 0))
210 {
211 int32_t err = sys->dread(sys->handle, cpu, addr, buf, len);
212 if (err)
213 return err;
214 }
215 else
216 {
217 int32_t err = devices_[index]->dread(cpu, addr, buf, nlen);
218 if (err)
219 return err;
220 }
221 len = len - nlen;
222 if (len == 0)
223 return 0;
224 buf += nlen;
225 addr += nlen;
226 }
227}
228etiss::int32 MemoryDeviceMapper::dwrite(ETISS_System *sys, ETISS_CPU *cpu, etiss::uint64 addr, etiss::uint8 *buf,
229 etiss::uint32 len)
230{
231 while (true)
232 {
233 unsigned nlen = len;
234 int index = map(false, false, false, addr, buf, len, nlen);
235 if ((index < 0) || (index > (int)devices_.size()) || (devices_[index] == 0))
236 {
237 int32_t err = sys->dwrite(sys->handle, cpu, addr, buf, len);
238 if (err)
239 return err;
240 }
241 else
242 {
243 int32_t err = devices_[index]->dwrite(cpu, addr, buf, nlen);
244 if (err)
245 return err;
246 }
247 len = len - nlen;
248 if (len == 0)
249 return 0;
250 buf += nlen;
251 addr += nlen;
252 }
253}
254etiss::int32 MemoryDeviceMapper::dbg_read(ETISS_System *sys, etiss::uint64 addr, etiss::uint8 *buf, etiss::uint32 len)
255{
256 while (true)
257 {
258 unsigned nlen = len;
259 int index = map(false, true, true, addr, buf, len, nlen);
260 if ((index < 0) || (index > (int)devices_.size()) || (devices_[index] == 0))
261 {
262 int32_t err = sys->dbg_read(sys->handle, addr, buf, len);
263 if (err)
264 return err;
265 }
266 else
267 {
268 int32_t err = devices_[index]->dbg_read(addr, buf, nlen);
269 if (err)
270 return err;
271 }
272 len = len - nlen;
273 if (len == 0)
274 return 0;
275 buf += nlen;
276 addr += nlen;
277 }
278}
279etiss::int32 MemoryDeviceMapper::dbg_write(ETISS_System *sys, etiss::uint64 addr, etiss::uint8 *buf, etiss::uint32 len)
280{
281 while (true)
282 {
283 unsigned nlen = len;
284 int index = map(false, true, true, addr, buf, len, nlen);
285 if ((index < 0) || (index > (int)devices_.size()) || (devices_[index] == 0))
286 {
287 int32_t err = sys->dbg_write(sys->handle, addr, buf, len);
288 if (err)
289 return err;
290 }
291 else
292 {
293 int32_t err = devices_[index]->dbg_write(addr, buf, nlen);
294 if (err)
295 return err;
296 }
297 len = len - nlen;
298 if (len == 0)
299 return 0;
300 buf += nlen;
301 addr += nlen;
302 }
303}
304
305int MemoryDeviceMapper::map(bool ibus, bool read, bool dbg, uint64_t addr, uint8_t *buf, unsigned len, unsigned &newlen)
306{
307 for (unsigned i = 0; i < mountPoints_.size(); i++)
308 {
309 std::pair<uint64_t, uint64_t> &mp = mountPoints_[i];
310 if ((addr & mp.first) == mp.second)
311 return (int)i;
312 }
313 return -1;
314}
315
317{
318 if (sys == 0)
319 return false;
320
321 devices_.push_back(sys);
322 mountPoints_.push_back(std::make_pair(mask, addr));
323
324 return true;
325}
326
327} // namespace plugin
328} // namespace etiss
static __inline__ uint64_t
Definition arm_cde.h:31
static __inline__ int32_t
Definition arm_mve.h:51
static __inline__ uint8_t
Definition arm_mve.h:323
uint64_t etiss_uint64
Definition types.h:58
uint32_t etiss_uint32
Definition types.h:55
uint8_t etiss_uint8
Definition types.h:49
int32_t etiss_int32
Definition types.h:54
System Interface for the basic system IO operations and time synchronization.
Definition System.h:38
std::vector< etiss::System * > devices_
etiss::int32 dread(ETISS_System *sys, ETISS_CPU *cpu, etiss::uint64 addr, etiss::uint8 *buf, etiss::uint32 len)
etiss::int32 dbg_read(ETISS_System *sys, etiss::uint64 addr, etiss::uint8 *buf, etiss::uint32 len)
virtual int map(bool ibus, bool read, bool dbg, uint64_t addr, uint8_t *buf, unsigned len, unsigned &newlen)
virtual bool mount(etiss::System *sys, uint64_t mask, uint64_t addr)
virtual ETISS_System * unwrap(ETISS_CPU *cpu, ETISS_System *system)
undo wrap function call this function will be called AFTER etiss::Plugin::cleanup
etiss::int32 dbg_write(ETISS_System *sys, etiss::uint64 addr, etiss::uint8 *buf, etiss::uint32 len)
std::vector< std::pair< uint64_t, uint64_t > > mountPoints_
etiss::int32 iwrite(ETISS_System *sys, ETISS_CPU *cpu, etiss::uint64 addr, etiss::uint8 *buf, etiss::uint32 len)
etiss::int32 iread(ETISS_System *sys, ETISS_CPU *cpu, etiss::uint64 addr, etiss::uint32 len)
etiss::int32 dwrite(ETISS_System *sys, ETISS_CPU *cpu, etiss::uint64 addr, etiss::uint8 *buf, etiss::uint32 len)
virtual ETISS_System * wrap(ETISS_CPU *cpu, ETISS_System *system)
change/wrap the passed system structure.
conatins a convinience class that can be wrapped as a ETISS_System structure
etiss_int32 dread_(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
etiss_int32 dbg_write_(void *handle, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
etiss_int32 iwrite_(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
etiss_int32 dbg_read_(void *handle, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
etiss_int32 iread_(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint32 length)
etiss_int32 dwrite_(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
forwards: include/jit/*
Definition Benchmark.h:17
float __ovld __cnfn length(float p)
Return the length of vector p, i.e., sqrt(p.x2 + p.y 2 + ...)
#define bool
Definition stdbool.h:15
basic cpu state structure needed for execution of any cpu architecture.
Definition CPU.h:51
memory access and time synchronization functions.
Definition System.h:40
etiss_int32(* dwrite)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
write data
Definition System.h:59
etiss_int32(* iread)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint32 length)
used to simulate an instruction fetch.
Definition System.h:46
void * handle
custom handle that will be passed to the functions of this structure
Definition System.h:81
etiss_int32(* dbg_write)(void *handle, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
direct debug write
Definition System.h:70
etiss_int32(* dbg_read)(void *handle, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
direct debug read
Definition System.h:66
etiss_int32(* dread)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
read data
Definition System.h:55
void(* syncTime)(void *handle, ETISS_CPU *cpu)
called after a block to synchronize the time
Definition System.h:79
etiss_int32(* iwrite)(void *handle, ETISS_CPU *cpu, etiss_uint64 addr, etiss_uint8 *buffer, etiss_uint32 length)
write instruction data over instruction bus
Definition System.h:50