RV32IMACFD_tum_retInstr.cpp File Reference

#include "RV32IMACFDArch.h"
#include "RV32IMACFDFuncs.h"

Include dependency graph for RV32IMACFD_tum_retInstr.cpp:

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Variables
static InstructionDefinition	ecall_ (ISA32_RV32IMACFD, "ecall",(uint64_t) 0x000073,(uint64_t) 0xffffffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ECALL\n");cp.code()+="etiss_coverage_count(1, 168);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6692);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 8LL + ((RV32IMACFD*)cpu)->PRIV);\n";cp.code()+="etiss_coverage_count(4, 6691, 6687, 6690, 6689);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//ECALL\n");cp.code()+="return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { std::stringstream ss;ss<< "ecall"<< " # "<< ba<<(" []");return ss.str();})
static InstructionDefinition	mret_ (ISA32_RV32IMACFD, "mret",(uint64_t) 0x30200073,(uint64_t) 0xffffffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//MRET\n");cp.code()+="etiss_coverage_count(1, 166);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6621);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 6548);\n";cp.code()+="if (((RV32IMACFD*)cpu)->PRIV < 3LL) { // conditional\n";cp.code()+="etiss_coverage_count(2, 6551, 6549);\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";cp.code()+="etiss_coverage_count(2, 6554, 6552);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="cpu->nextPc = *((RV32IMACFD*)cpu)->CSR[833LL];\n";cp.code()+="etiss_coverage_count(3, 6559, 6555, 6558);\n";cp.code()+="etiss_uint32 s = RV32IMACFD_csr_read(cpu, system, plugin_pointers, 768LL);\n";cp.code()+="etiss_coverage_count(2, 6563, 6562);\n";cp.code()+="etiss_uint32 prev_prv = (etiss_uint32)(RV32IMACFD_get_field(s, 6144LL));\n";cp.code()+="etiss_coverage_count(4, 6570, 6569, 6567, 6565);\n";cp.code()+="etiss_coverage_count(1, 6571);\n";cp.code()+="if (prev_prv != 3LL) { // conditional\n";cp.code()+="etiss_coverage_count(2, 6574, 6572);\n";cp.code()+="s = (etiss_uint32)(RV32IMACFD_set_field(s, 131072LL, 0LL));\n";cp.code()+="etiss_coverage_count(6, 6582, 6575, 6581, 6579, 6576, 6578);\n";cp.code()+="} // conditional\n";cp.code()+="s = (etiss_uint32)(RV32IMACFD_set_field(s, 8LL, RV32IMACFD_get_field(s, 128LL)));\n";cp.code()+="etiss_coverage_count(7, 6592, 6583, 6591, 6589, 6584, 6588, 6586);\n";cp.code()+="s = (etiss_uint32)(RV32IMACFD_set_field(s, 128LL, 1ULL));\n";cp.code()+="etiss_coverage_count(6, 6600, 6593, 6599, 6597, 6594, 6596);\n";cp.code()+="s = (etiss_uint32)(RV32IMACFD_set_field(s, 6144LL, (RV32IMACFD_extension_enabled(cpu, system, plugin_pointers, 85ULL)) ? (0LL) : (3LL)));\n";cp.code()+="etiss_coverage_count(8, 6612, 6601, 6611, 6609, 6602, 6608, 6605, 6604);\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, 768LL, s);\n";cp.code()+="etiss_coverage_count(2, 6615, 6614);\n";cp.code()+="((RV32IMACFD*)cpu)->PRIV = ((etiss_uint8)(prev_prv)) & 0x7ULL;\n";cp.code()+="etiss_coverage_count(4, 6620, 6616, 6619, 6617);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//MRET\n");cp.code()+="return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { std::stringstream ss;ss<< "mret"<< " # "<< ba<<(" []");return ss.str();})
static InstructionDefinition	wfi_ (ISA32_RV32IMACFD, "wfi",(uint64_t) 0x10500073,(uint64_t) 0xffffffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//WFI\n");cp.code()+="etiss_coverage_count(1, 169);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6693);\n";cp.code()+="{ // block\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//WFI\n");cp.code()+="return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { std::stringstream ss;ss<< "wfi"<< " # "<< ba<<(" []");return ss.str();})
static InstructionDefinition	sret_ (ISA32_RV32IMACFD, "sret",(uint64_t) 0x10200073,(uint64_t) 0xffffffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRET\n");cp.code()+="etiss_coverage_count(1, 167);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6686);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 6622);\n";cp.code()+="if (((RV32IMACFD*)cpu)->PRIV < ((RV32IMACFD_get_field(RV32IMACFD_csr_read(cpu, system, plugin_pointers, 768LL), 4194304LL)) ? (3LL) : (1LL))) { // conditional\n";cp.code()+="etiss_coverage_count(6, 6632, 6623, 6630, 6627, 6625, 6631);\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";cp.code()+="etiss_coverage_count(2, 6635, 6633);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="cpu->nextPc = *((RV32IMACFD*)cpu)->CSR[321LL];\n";cp.code()+="etiss_coverage_count(3, 6640, 6636, 6639);\n";cp.code()+="etiss_uint32 s = RV32IMACFD_csr_read(cpu, system, plugin_pointers, 256LL);\n";cp.code()+="etiss_coverage_count(2, 6644, 6643);\n";cp.code()+="etiss_uint32 prev_prv = (etiss_uint32)(RV32IMACFD_get_field(s, 256LL));\n";cp.code()+="etiss_coverage_count(4, 6651, 6650, 6648, 6646);\n";cp.code()+="s = (etiss_uint32)(RV32IMACFD_set_field(s, 2LL, RV32IMACFD_get_field(s, 32LL)));\n";cp.code()+="etiss_coverage_count(7, 6661, 6652, 6660, 6658, 6653, 6657, 6655);\n";cp.code()+="s = (etiss_uint32)(RV32IMACFD_set_field(s, 32LL, 1ULL));\n";cp.code()+="etiss_coverage_count(6, 6669, 6662, 6668, 6666, 6663, 6665);\n";cp.code()+="s = (etiss_uint32)(RV32IMACFD_set_field(s, 256LL, 0LL));\n";cp.code()+="etiss_coverage_count(5, 6677, 6670, 6676, 6674, 6671);\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, 768LL, s);\n";cp.code()+="etiss_coverage_count(2, 6680, 6679);\n";cp.code()+="((RV32IMACFD*)cpu)->PRIV = ((etiss_uint8)(prev_prv)) & 0x7ULL;\n";cp.code()+="etiss_coverage_count(4, 6685, 6681, 6684, 6682);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SRET\n");cp.code()+="return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { std::stringstream ss;ss<< "sret"<< " # "<< ba<<(" []");return ss.str();})

Variable Documentation

ecall_

InstructionDefinition ecall_(ISA32_RV32IMACFD, "ecall",(uint64_t) 0x000073,(uint64_t) 0xffffffff,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ECALL\n"); cp.code()+="etiss_coverage_count(1, 168);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6692);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 8LL + ((RV32IMACFD*)cpu)->PRIV);\n";cp.code()+="etiss_coverage_count(4, 6691, 6687, 6690, 6689);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//ECALL\n"); cp.code()+="return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { std::stringstream ss; ss<< "ecall"<< " # "<< ba<<(" []"); return ss.str();}) ( ISA32_RV32IMACFD  , "ecall"  , (uint64_t)  0x000073, (uint64_t)  0xffffffff, [] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ECALL\n");cp.code()+="etiss_coverage_count(1, 168);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6692);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 8LL + ((RV32IMACFD*)cpu)->PRIV);\n";cp.code()+="etiss_coverage_count(4, 6691, 6687, 6690, 6689);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//ECALL\n");cp.code()+="return cpu->exception;\n";} return true;}  , 0  , [] (BitArray &ba, Instruction &instr) { std::stringstream ss;ss<< "ecall"<< " # "<< ba<<(" []");return ss.str();}    )

static

mret_

InstructionDefinition mret_(ISA32_RV32IMACFD, "mret",(uint64_t) 0x30200073,(uint64_t) 0xffffffff,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//MRET\n"); cp.code()+="etiss_coverage_count(1, 166);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6621);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 6548);\n";cp.code()+="if (((RV32IMACFD*)cpu)->PRIV < 3LL) { // conditional\n";cp.code()+="etiss_coverage_count(2, 6551, 6549);\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";cp.code()+="etiss_coverage_count(2, 6554, 6552);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="cpu->nextPc = *((RV32IMACFD*)cpu)->CSR[833LL];\n";cp.code()+="etiss_coverage_count(3, 6559, 6555, 6558);\n";cp.code()+="etiss_uint32 s = RV32IMACFD_csr_read(cpu, system, plugin_pointers, 768LL);\n";cp.code()+="etiss_coverage_count(2, 6563, 6562);\n";cp.code()+="etiss_uint32 prev_prv = (etiss_uint32)(RV32IMACFD_get_field(s, 6144LL));\n";cp.code()+="etiss_coverage_count(4, 6570, 6569, 6567, 6565);\n";cp.code()+="etiss_coverage_count(1, 6571);\n";cp.code()+="if (prev_prv != 3LL) { // conditional\n";cp.code()+="etiss_coverage_count(2, 6574, 6572);\n";cp.code()+="s = (etiss_uint32)(RV32IMACFD_set_field(s, 131072LL, 0LL));\n";cp.code()+="etiss_coverage_count(6, 6582, 6575, 6581, 6579, 6576, 6578);\n";cp.code()+="} // conditional\n";cp.code()+="s = (etiss_uint32)(RV32IMACFD_set_field(s, 8LL, RV32IMACFD_get_field(s, 128LL)));\n";cp.code()+="etiss_coverage_count(7, 6592, 6583, 6591, 6589, 6584, 6588, 6586);\n";cp.code()+="s = (etiss_uint32)(RV32IMACFD_set_field(s, 128LL, 1ULL));\n";cp.code()+="etiss_coverage_count(6, 6600, 6593, 6599, 6597, 6594, 6596);\n";cp.code()+="s = (etiss_uint32)(RV32IMACFD_set_field(s, 6144LL, (RV32IMACFD_extension_enabled(cpu, system, plugin_pointers, 85ULL)) ? (0LL) : (3LL)));\n";cp.code()+="etiss_coverage_count(8, 6612, 6601, 6611, 6609, 6602, 6608, 6605, 6604);\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, 768LL, s);\n";cp.code()+="etiss_coverage_count(2, 6615, 6614);\n";cp.code()+="((RV32IMACFD*)cpu)->PRIV = ((etiss_uint8)(prev_prv)) & 0x7ULL;\n";cp.code()+="etiss_coverage_count(4, 6620, 6616, 6619, 6617);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//MRET\n"); cp.code()+="return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { std::stringstream ss; ss<< "mret"<< " # "<< ba<<(" []"); return ss.str();}) ( ISA32_RV32IMACFD  , "mret"  , (uint64_t)  0x30200073, (uint64_t)  0xffffffff, [] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//MRET\n");cp.code()+="etiss_coverage_count(1, 166);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6621);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 6548);\n";cp.code()+="if (((RV32IMACFD*)cpu)->PRIV < 3LL) { // conditional\n";cp.code()+="etiss_coverage_count(2, 6551, 6549);\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";cp.code()+="etiss_coverage_count(2, 6554, 6552);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="cpu->nextPc = *((RV32IMACFD*)cpu)->CSR[833LL];\n";cp.code()+="etiss_coverage_count(3, 6559, 6555, 6558);\n";cp.code()+="etiss_uint32 s = RV32IMACFD_csr_read(cpu, system, plugin_pointers, 768LL);\n";cp.code()+="etiss_coverage_count(2, 6563, 6562);\n";cp.code()+="etiss_uint32 prev_prv = (etiss_uint32)(RV32IMACFD_get_field(s, 6144LL));\n";cp.code()+="etiss_coverage_count(4, 6570, 6569, 6567, 6565);\n";cp.code()+="etiss_coverage_count(1, 6571);\n";cp.code()+="if (prev_prv != 3LL) { // conditional\n";cp.code()+="etiss_coverage_count(2, 6574, 6572);\n";cp.code()+="s = (etiss_uint32)(RV32IMACFD_set_field(s, 131072LL, 0LL));\n";cp.code()+="etiss_coverage_count(6, 6582, 6575, 6581, 6579, 6576, 6578);\n";cp.code()+="} // conditional\n";cp.code()+="s = (etiss_uint32)(RV32IMACFD_set_field(s, 8LL, RV32IMACFD_get_field(s, 128LL)));\n";cp.code()+="etiss_coverage_count(7, 6592, 6583, 6591, 6589, 6584, 6588, 6586);\n";cp.code()+="s = (etiss_uint32)(RV32IMACFD_set_field(s, 128LL, 1ULL));\n";cp.code()+="etiss_coverage_count(6, 6600, 6593, 6599, 6597, 6594, 6596);\n";cp.code()+="s = (etiss_uint32)(RV32IMACFD_set_field(s, 6144LL, (RV32IMACFD_extension_enabled(cpu, system, plugin_pointers, 85ULL)) ? (0LL) : (3LL)));\n";cp.code()+="etiss_coverage_count(8, 6612, 6601, 6611, 6609, 6602, 6608, 6605, 6604);\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, 768LL, s);\n";cp.code()+="etiss_coverage_count(2, 6615, 6614);\n";cp.code()+="((RV32IMACFD*)cpu)->PRIV = ((etiss_uint8)(prev_prv)) & 0x7ULL;\n";cp.code()+="etiss_coverage_count(4, 6620, 6616, 6619, 6617);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//MRET\n");cp.code()+="return cpu->exception;\n";} return true;}  , 0  , [] (BitArray &ba, Instruction &instr) { std::stringstream ss;ss<< "mret"<< " # "<< ba<<(" []");return ss.str();}    )

static

sret_

InstructionDefinition sret_(ISA32_RV32IMACFD, "sret",(uint64_t) 0x10200073,(uint64_t) 0xffffffff,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRET\n"); cp.code()+="etiss_coverage_count(1, 167);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6686);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 6622);\n";cp.code()+="if (((RV32IMACFD*)cpu)->PRIV < ((RV32IMACFD_get_field(RV32IMACFD_csr_read(cpu, system, plugin_pointers, 768LL), 4194304LL)) ? (3LL) : (1LL))) { // conditional\n";cp.code()+="etiss_coverage_count(6, 6632, 6623, 6630, 6627, 6625, 6631);\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";cp.code()+="etiss_coverage_count(2, 6635, 6633);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="cpu->nextPc = *((RV32IMACFD*)cpu)->CSR[321LL];\n";cp.code()+="etiss_coverage_count(3, 6640, 6636, 6639);\n";cp.code()+="etiss_uint32 s = RV32IMACFD_csr_read(cpu, system, plugin_pointers, 256LL);\n";cp.code()+="etiss_coverage_count(2, 6644, 6643);\n";cp.code()+="etiss_uint32 prev_prv = (etiss_uint32)(RV32IMACFD_get_field(s, 256LL));\n";cp.code()+="etiss_coverage_count(4, 6651, 6650, 6648, 6646);\n";cp.code()+="s = (etiss_uint32)(RV32IMACFD_set_field(s, 2LL, RV32IMACFD_get_field(s, 32LL)));\n";cp.code()+="etiss_coverage_count(7, 6661, 6652, 6660, 6658, 6653, 6657, 6655);\n";cp.code()+="s = (etiss_uint32)(RV32IMACFD_set_field(s, 32LL, 1ULL));\n";cp.code()+="etiss_coverage_count(6, 6669, 6662, 6668, 6666, 6663, 6665);\n";cp.code()+="s = (etiss_uint32)(RV32IMACFD_set_field(s, 256LL, 0LL));\n";cp.code()+="etiss_coverage_count(5, 6677, 6670, 6676, 6674, 6671);\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, 768LL, s);\n";cp.code()+="etiss_coverage_count(2, 6680, 6679);\n";cp.code()+="((RV32IMACFD*)cpu)->PRIV = ((etiss_uint8)(prev_prv)) & 0x7ULL;\n";cp.code()+="etiss_coverage_count(4, 6685, 6681, 6684, 6682);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SRET\n"); cp.code()+="return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { std::stringstream ss; ss<< "sret"<< " # "<< ba<<(" []"); return ss.str();}) ( ISA32_RV32IMACFD  , "sret"  , (uint64_t)  0x10200073, (uint64_t)  0xffffffff, [] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRET\n");cp.code()+="etiss_coverage_count(1, 167);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6686);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 6622);\n";cp.code()+="if (((RV32IMACFD*)cpu)->PRIV < ((RV32IMACFD_get_field(RV32IMACFD_csr_read(cpu, system, plugin_pointers, 768LL), 4194304LL)) ? (3LL) : (1LL))) { // conditional\n";cp.code()+="etiss_coverage_count(6, 6632, 6623, 6630, 6627, 6625, 6631);\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";cp.code()+="etiss_coverage_count(2, 6635, 6633);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="cpu->nextPc = *((RV32IMACFD*)cpu)->CSR[321LL];\n";cp.code()+="etiss_coverage_count(3, 6640, 6636, 6639);\n";cp.code()+="etiss_uint32 s = RV32IMACFD_csr_read(cpu, system, plugin_pointers, 256LL);\n";cp.code()+="etiss_coverage_count(2, 6644, 6643);\n";cp.code()+="etiss_uint32 prev_prv = (etiss_uint32)(RV32IMACFD_get_field(s, 256LL));\n";cp.code()+="etiss_coverage_count(4, 6651, 6650, 6648, 6646);\n";cp.code()+="s = (etiss_uint32)(RV32IMACFD_set_field(s, 2LL, RV32IMACFD_get_field(s, 32LL)));\n";cp.code()+="etiss_coverage_count(7, 6661, 6652, 6660, 6658, 6653, 6657, 6655);\n";cp.code()+="s = (etiss_uint32)(RV32IMACFD_set_field(s, 32LL, 1ULL));\n";cp.code()+="etiss_coverage_count(6, 6669, 6662, 6668, 6666, 6663, 6665);\n";cp.code()+="s = (etiss_uint32)(RV32IMACFD_set_field(s, 256LL, 0LL));\n";cp.code()+="etiss_coverage_count(5, 6677, 6670, 6676, 6674, 6671);\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, 768LL, s);\n";cp.code()+="etiss_coverage_count(2, 6680, 6679);\n";cp.code()+="((RV32IMACFD*)cpu)->PRIV = ((etiss_uint8)(prev_prv)) & 0x7ULL;\n";cp.code()+="etiss_coverage_count(4, 6685, 6681, 6684, 6682);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SRET\n");cp.code()+="return cpu->exception;\n";} return true;}  , 0  , [] (BitArray &ba, Instruction &instr) { std::stringstream ss;ss<< "sret"<< " # "<< ba<<(" []");return ss.str();}    )

static

wfi_

InstructionDefinition wfi_(ISA32_RV32IMACFD, "wfi",(uint64_t) 0x10500073,(uint64_t) 0xffffffff,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//WFI\n"); cp.code()+="etiss_coverage_count(1, 169);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6693);\n";cp.code()+="{ // block\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//WFI\n"); cp.code()+="return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { std::stringstream ss; ss<< "wfi"<< " # "<< ba<<(" []"); return ss.str();}) ( ISA32_RV32IMACFD  , "wfi"  , (uint64_t)  0x10500073, (uint64_t)  0xffffffff, [] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//WFI\n");cp.code()+="etiss_coverage_count(1, 169);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6693);\n";cp.code()+="{ // block\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//WFI\n");cp.code()+="return cpu->exception;\n";} return true;}  , 0  , [] (BitArray &ba, Instruction &instr) { std::stringstream ss;ss<< "wfi"<< " # "<< ba<<(" []");return ss.str();}    )

static