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| static InstructionDefinition | csrrw_rd_rs1_csr (ISA32_RV32IMACFD, "csrrw",(uint64_t) 0x001073,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRW\n");cp.code()+="etiss_coverage_count(1, 153);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6390);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrs1 = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(4, 6363, 6362, 6361, 6359);\n";cp.code()+="etiss_coverage_count(1, 6364);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 6370, 6367, 6365, 6368, 6369);\n";{ cp.code()+="etiss_coverage_count(1, 6385);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";cp.code()+="etiss_coverage_count(3, 6374, 6373, 6372);\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrs1);\n";cp.code()+="etiss_coverage_count(3, 6377, 6375, 6376);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";cp.code()+="etiss_coverage_count(5, 6384, 6382, 6381, 6379, 6383);\n";cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 6389);\n";cp.code()+="{ // block\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrs1);\n";cp.code()+="etiss_coverage_count(3, 6388, 6386, 6387);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;std::stringstream ss;ss<< "csrrw"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | csr="+std::to_string(csr)+"]");return ss.str();}) |
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| static InstructionDefinition | csrrs_rd_rs1_csr (ISA32_RV32IMACFD, "csrrs",(uint64_t) 0x002073,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRS\n");cp.code()+="etiss_coverage_count(1, 154);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6425);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";cp.code()+="etiss_coverage_count(3, 6394, 6393, 6392);\n";cp.code()+="etiss_uint32 xrs1 = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(4, 6401, 6400, 6399, 6397);\n";cp.code()+="etiss_coverage_count(1, 6402);\n";if(rs1 !=0LL) { cp.code()+="etiss_coverage_count(3, 6405, 6403, 6404);\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrd | xrs1);\n";cp.code()+="etiss_coverage_count(5, 6410, 6406, 6409, 6407, 6408);\n";} cp.code()+="etiss_coverage_count(1, 6411);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 6417, 6414, 6412, 6415, 6416);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";cp.code()+="etiss_coverage_count(5, 6424, 6422, 6421, 6419, 6423);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;std::stringstream ss;ss<< "csrrs"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | csr="+std::to_string(csr)+"]");return ss.str();}) |
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| static InstructionDefinition | csrrc_rd_rs1_csr (ISA32_RV32IMACFD, "csrrc",(uint64_t) 0x003073,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRC\n");cp.code()+="etiss_coverage_count(1, 155);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6461);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";cp.code()+="etiss_coverage_count(3, 6429, 6428, 6427);\n";cp.code()+="etiss_uint32 xrs1 = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(4, 6436, 6435, 6434, 6432);\n";cp.code()+="etiss_coverage_count(1, 6437);\n";if(rs1 !=0LL) { cp.code()+="etiss_coverage_count(3, 6440, 6438, 6439);\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrd & ~(xrs1));\n";cp.code()+="etiss_coverage_count(6, 6446, 6441, 6445, 6442, 6444, 6443);\n";} cp.code()+="etiss_coverage_count(1, 6447);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 6453, 6450, 6448, 6451, 6452);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";cp.code()+="etiss_coverage_count(5, 6460, 6458, 6457, 6455, 6459);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;std::stringstream ss;ss<< "csrrc"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | csr="+std::to_string(csr)+"]");return ss.str();}) |
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| static InstructionDefinition | csrrwi_rd_zimm_csr (ISA32_RV32IMACFD, "csrrwi",(uint64_t) 0x005073,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRWI\n");cp.code()+="etiss_coverage_count(1, 156);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6485);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";cp.code()+="etiss_coverage_count(3, 6465, 6464, 6463);\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, "+std::to_string((etiss_uint32)(zimm))+"ULL);\n";cp.code()+="etiss_coverage_count(4, 6470, 6466, 6469, 6467);\n";cp.code()+="etiss_coverage_count(1, 6471);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 6477, 6474, 6472, 6475, 6476);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";cp.code()+="etiss_coverage_count(5, 6484, 6482, 6481, 6479, 6483);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;std::stringstream ss;ss<< "csrrwi"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | zimm="+std::to_string(zimm)+" | csr="+std::to_string(csr)+"]");return ss.str();}) |
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| static InstructionDefinition | csrrsi_rd_zimm_csr (ISA32_RV32IMACFD, "csrrsi",(uint64_t) 0x006073,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRSI\n");cp.code()+="etiss_coverage_count(1, 157);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6515);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";cp.code()+="etiss_coverage_count(3, 6489, 6488, 6487);\n";cp.code()+="etiss_coverage_count(1, 6490);\n";if(zimm !=0LL) { cp.code()+="etiss_coverage_count(3, 6493, 6491, 6492);\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrd | "+std::to_string((etiss_uint32)(zimm))+"ULL);\n";cp.code()+="etiss_coverage_count(6, 6500, 6494, 6499, 6495, 6498, 6496);\n";} cp.code()+="etiss_coverage_count(1, 6501);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 6507, 6504, 6502, 6505, 6506);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";cp.code()+="etiss_coverage_count(5, 6514, 6512, 6511, 6509, 6513);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;std::stringstream ss;ss<< "csrrsi"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | zimm="+std::to_string(zimm)+" | csr="+std::to_string(csr)+"]");return ss.str();}) |
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| static InstructionDefinition | csrrci_rd_zimm_csr (ISA32_RV32IMACFD, "csrrci",(uint64_t) 0x007073,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRCI\n");cp.code()+="etiss_coverage_count(1, 158);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6547);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";cp.code()+="etiss_coverage_count(3, 6519, 6518, 6517);\n";cp.code()+="etiss_coverage_count(1, 6520);\n";if(zimm !=0LL) { cp.code()+="etiss_coverage_count(3, 6523, 6521, 6522);\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrd & "+std::to_string(~(((etiss_uint32)(zimm))))+"ULL);\n";cp.code()+="etiss_coverage_count(8, 6532, 6524, 6531, 6525, 6530, 6528, 6526, 6529);\n";} cp.code()+="etiss_coverage_count(1, 6533);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 6539, 6536, 6534, 6537, 6538);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";cp.code()+="etiss_coverage_count(5, 6546, 6544, 6543, 6541, 6545);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;std::stringstream ss;ss<< "csrrci"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | zimm="+std::to_string(zimm)+" | csr="+std::to_string(csr)+"]");return ss.str();}) |
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