RV32IMACFD_tum_csrInstr.cpp File Reference

#include "RV32IMACFDArch.h"
#include "RV32IMACFDFuncs.h"

Include dependency graph for RV32IMACFD_tum_csrInstr.cpp:

Go to the source code of this file.

Variables
static InstructionDefinition	csrrw_rd_rs1_csr (ISA32_RV32IMACFD, "csrrw",(uint32_t) 0x001073,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRW\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrs1 = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";if((rd % 32ULL) !=0LL) { { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrs1);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrs1);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;std::stringstream ss;ss<< "csrrw"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | csr="+std::to_string(csr)+"]");return ss.str();})
static InstructionDefinition	csrrs_rd_rs1_csr (ISA32_RV32IMACFD, "csrrs",(uint32_t) 0x002073,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRS\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";cp.code()+="etiss_uint32 xrs1 = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";if(rs1 !=0LL) { cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrd | xrs1);\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;std::stringstream ss;ss<< "csrrs"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | csr="+std::to_string(csr)+"]");return ss.str();})
static InstructionDefinition	csrrc_rd_rs1_csr (ISA32_RV32IMACFD, "csrrc",(uint32_t) 0x003073,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRC\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";cp.code()+="etiss_uint32 xrs1 = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";if(rs1 !=0LL) { cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrd & ~(xrs1));\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;std::stringstream ss;ss<< "csrrc"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | csr="+std::to_string(csr)+"]");return ss.str();})
static InstructionDefinition	csrrwi_rd_zimm_csr (ISA32_RV32IMACFD, "csrrwi",(uint32_t) 0x005073,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRWI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, "+std::to_string((etiss_uint32)(zimm))+"ULL);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;std::stringstream ss;ss<< "csrrwi"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | zimm="+std::to_string(zimm)+" | csr="+std::to_string(csr)+"]");return ss.str();})
static InstructionDefinition	csrrsi_rd_zimm_csr (ISA32_RV32IMACFD, "csrrsi",(uint32_t) 0x006073,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRSI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";if(zimm !=0LL) { cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrd | "+std::to_string((etiss_uint32)(zimm))+"ULL);\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;std::stringstream ss;ss<< "csrrsi"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | zimm="+std::to_string(zimm)+" | csr="+std::to_string(csr)+"]");return ss.str();})
static InstructionDefinition	csrrci_rd_zimm_csr (ISA32_RV32IMACFD, "csrrci",(uint32_t) 0x007073,(uint32_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRCI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";if(zimm !=0LL) { cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrd & "+std::to_string(~(((etiss_uint32)(zimm))))+"ULL);\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;std::stringstream ss;ss<< "csrrci"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | zimm="+std::to_string(zimm)+" | csr="+std::to_string(csr)+"]");return ss.str();})

Variable Documentation

csrrc_rd_rs1_csr

InstructionDefinition csrrc_rd_rs1_csr(ISA32_RV32IMACFD, "csrrc",(uint32_t) 0x003073,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRC\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";cp.code()+="etiss_uint32 xrs1 = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";if(rs1 !=0LL) { cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrd & ~(xrs1));\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0; std::stringstream ss; ss<< "csrrc"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | csr="+std::to_string(csr)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  , "csrrc"  , (uint32_t)  0x003073, (uint32_t)  0x00707f, [] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRC\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";cp.code()+="etiss_uint32 xrs1 = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";if(rs1 !=0LL) { cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrd & ~(xrs1));\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  , 0  , [] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;std::stringstream ss;ss<< "csrrc"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | csr="+std::to_string(csr)+"]");return ss.str();}    )

static

csrrci_rd_zimm_csr

InstructionDefinition csrrci_rd_zimm_csr(ISA32_RV32IMACFD, "csrrci",(uint32_t) 0x007073,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRCI\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";if(zimm !=0LL) { cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrd & "+std::to_string(~(((etiss_uint32)(zimm))))+"ULL);\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0; std::stringstream ss; ss<< "csrrci"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | zimm="+std::to_string(zimm)+" | csr="+std::to_string(csr)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  , "csrrci"  , (uint32_t)  0x007073, (uint32_t)  0x00707f, [] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRCI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";if(zimm !=0LL) { cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrd & "+std::to_string(~(((etiss_uint32)(zimm))))+"ULL);\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  , 0  , [] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;std::stringstream ss;ss<< "csrrci"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | zimm="+std::to_string(zimm)+" | csr="+std::to_string(csr)+"]");return ss.str();}    )

static

csrrs_rd_rs1_csr

InstructionDefinition csrrs_rd_rs1_csr(ISA32_RV32IMACFD, "csrrs",(uint32_t) 0x002073,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRS\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";cp.code()+="etiss_uint32 xrs1 = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";if(rs1 !=0LL) { cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrd | xrs1);\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0; std::stringstream ss; ss<< "csrrs"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | csr="+std::to_string(csr)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  , "csrrs"  , (uint32_t)  0x002073, (uint32_t)  0x00707f, [] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRS\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";cp.code()+="etiss_uint32 xrs1 = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";if(rs1 !=0LL) { cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrd | xrs1);\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  , 0  , [] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;std::stringstream ss;ss<< "csrrs"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | csr="+std::to_string(csr)+"]");return ss.str();}    )

static

csrrsi_rd_zimm_csr

InstructionDefinition csrrsi_rd_zimm_csr(ISA32_RV32IMACFD, "csrrsi",(uint32_t) 0x006073,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRSI\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";if(zimm !=0LL) { cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrd | "+std::to_string((etiss_uint32)(zimm))+"ULL);\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0; std::stringstream ss; ss<< "csrrsi"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | zimm="+std::to_string(zimm)+" | csr="+std::to_string(csr)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  , "csrrsi"  , (uint32_t)  0x006073, (uint32_t)  0x00707f, [] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRSI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";if(zimm !=0LL) { cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrd | "+std::to_string((etiss_uint32)(zimm))+"ULL);\n";} if((rd % 32ULL) !=0LL) { cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  , 0  , [] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;std::stringstream ss;ss<< "csrrsi"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | zimm="+std::to_string(zimm)+" | csr="+std::to_string(csr)+"]");return ss.str();}    )

static

csrrw_rd_rs1_csr

InstructionDefinition csrrw_rd_rs1_csr(ISA32_RV32IMACFD, "csrrw",(uint32_t) 0x001073,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRW\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrs1 = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";if((rd % 32ULL) !=0LL) { { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrs1);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrs1);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0; std::stringstream ss; ss<< "csrrw"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | csr="+std::to_string(csr)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  , "csrrw"  , (uint32_t)  0x001073, (uint32_t)  0x00707f, [] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRW\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrs1 = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";if((rd % 32ULL) !=0LL) { { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrs1);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";cp.code()+="} // block\n";} } else { { cp.code()+="{ // block\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, xrs1);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  , 0  , [] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;std::stringstream ss;ss<< "csrrw"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | csr="+std::to_string(csr)+"]");return ss.str();}    )

static

csrrwi_rd_zimm_csr

InstructionDefinition csrrwi_rd_zimm_csr(ISA32_RV32IMACFD, "csrrwi",(uint32_t) 0x005073,(uint32_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRWI\n"); { cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, "+std::to_string((etiss_uint32)(zimm))+"ULL);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0; std::stringstream ss; ss<< "csrrwi"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | zimm="+std::to_string(zimm)+" | csr="+std::to_string(csr)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  , "csrrwi"  , (uint32_t)  0x005073, (uint32_t)  0x00707f, [] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSRRWI\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 xrd = RV32IMACFD_csr_read(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL);\n";cp.code()+="RV32IMACFD_csr_write(cpu, system, plugin_pointers, "+std::to_string(csr)+"ULL, "+std::to_string((etiss_uint32)(zimm))+"ULL);\n";if((rd % 32ULL) !=0LL) { cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = xrd;\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  , 0  , [] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 zimm=0;static BitArrayRange R_zimm_0(19, 15);zimm+=R_zimm_0.read(ba)<< 0;etiss_uint16 csr=0;static BitArrayRange R_csr_0(31, 20);csr+=R_csr_0.read(ba)<< 0;std::stringstream ss;ss<< "csrrwi"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | zimm="+std::to_string(zimm)+" | csr="+std::to_string(csr)+"]");return ss.str();}    )

static