ETISS 0.11.2
ExtendableTranslatingInstructionSetSimulator(version0.11.2)
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RV32IMACFD_RV32IInstr.cpp File Reference
#include "RV32IMACFDArch.h"
#include "RV32IMACFDFuncs.h"
Include dependency graph for RV32IMACFD_RV32IInstr.cpp:

Go to the source code of this file.

Variables

static InstructionDefinition lui_rd_imm (ISA32_RV32IMACFD, "lui",(uint64_t) 0x000037,(uint64_t) 0x00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LUI\n");cp.code()+="etiss_coverage_count(1, 0);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1190);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1196, 1193, 1191, 1194, 1195);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string((etiss_uint32)(((etiss_int32)(imm))))+"ULL;\n";cp.code()+="etiss_coverage_count(8, 1207, 1201, 1200, 1198, 1206, 1203, 1202, 1204);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "lui"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition auipc_rd_imm (ISA32_RV32IMACFD, "auipc",(uint64_t) 0x000017,(uint64_t) 0x00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//AUIPC\n");cp.code()+="etiss_coverage_count(1, 1);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1208);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1214, 1211, 1209, 1212, 1213);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string(ic.current_address_+(etiss_int32)(imm))+"LL;\n";cp.code()+="etiss_coverage_count(8, 1224, 1219, 1218, 1216, 1223, 1220, 1222, 1221);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "auipc"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition jal_rd_imm (ISA32_RV32IMACFD, "jal",(uint64_t) 0x00006f,(uint64_t) 0x00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(19, 12);imm+=R_imm_12.read(ba)<< 12;static BitArrayRange R_imm_11(20, 20);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(30, 21);imm+=R_imm_1.read(ba)<< 1;static BitArrayRange R_imm_20(31, 31);imm+=R_imm_20.read(ba)<< 20;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//JAL\n");cp.code()+="etiss_coverage_count(1, 2);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1256);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1225);\n";if(imm % 2ULL) { cp.code()+="etiss_coverage_count(2, 1228, 1226);\n";{ cp.code()+="etiss_coverage_count(1, 1232);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1231, 1229);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 1255);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1233);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1239, 1236, 1234, 1237, 1238);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string(ic.current_address_+4ULL)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1248, 1244, 1243, 1241, 1247, 1245, 1246);\n";} cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int32)(((etiss_int32) imm)<<(11)) > >(11)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 1254, 1249, 1253, 1250, 1252, 1251);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//JAL\n");cp.code()+="return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(19, 12);imm+=R_imm_12.read(ba)<< 12;static BitArrayRange R_imm_11(20, 20);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(30, 21);imm+=R_imm_1.read(ba)<< 1;static BitArrayRange R_imm_20(31, 31);imm+=R_imm_20.read(ba)<< 20;std::stringstream ss;ss<< "jal"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition jalr_rd_rs1_imm (ISA32_RV32IMACFD, "jalr",(uint64_t) 0x000067,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//JALR\n");cp.code()+="etiss_coverage_count(1, 3);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1302);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 new_pc = (*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL) & -2LL;\n";cp.code()+="etiss_coverage_count(9, 1270, 1269, 1265, 1262, 1261, 1259, 1264, 1263, 1266);\n";cp.code()+="etiss_coverage_count(1, 1271);\n";cp.code()+="if (new_pc % 2ULL) { // conditional\n";cp.code()+="etiss_coverage_count(2, 1274, 1272);\n";{ cp.code()+="etiss_coverage_count(1, 1278);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1277, 1275);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="else { // conditional\n";{ cp.code()+="etiss_coverage_count(1, 1301);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1279);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1285, 1282, 1280, 1283, 1284);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string(ic.current_address_+4ULL)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1294, 1290, 1289, 1287, 1293, 1291, 1292);\n";} cp.code()+="cpu->nextPc = new_pc & -2LL;\n";cp.code()+="etiss_coverage_count(4, 1300, 1295, 1299, 1296);\n";cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//JALR\n");cp.code()+="return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "jalr"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition beq_imm_rs1_rs2 (ISA32_RV32IMACFD, "beq",(uint64_t) 0x000063,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BEQ\n");cp.code()+="etiss_coverage_count(1, 4);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1331);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1303);\n";cp.code()+="if (*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] == *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";cp.code()+="etiss_coverage_count(7, 1314, 1308, 1307, 1305, 1313, 1312, 1310);\n";{ cp.code()+="etiss_coverage_count(1, 1330);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1315);\n";if(imm % 2ULL) { cp.code()+="etiss_coverage_count(2, 1318, 1316);\n";{ cp.code()+="etiss_coverage_count(1, 1322);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1321, 1319);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 1329);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) > >(3)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 1328, 1323, 1327, 1324, 1326, 1325);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BEQ\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "beq"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition bne_imm_rs1_rs2 (ISA32_RV32IMACFD, "bne",(uint64_t) 0x001063,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BNE\n");cp.code()+="etiss_coverage_count(1, 5);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1360);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1332);\n";cp.code()+="if (*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] != *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";cp.code()+="etiss_coverage_count(7, 1343, 1337, 1336, 1334, 1342, 1341, 1339);\n";{ cp.code()+="etiss_coverage_count(1, 1359);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1344);\n";if(imm % 2ULL) { cp.code()+="etiss_coverage_count(2, 1347, 1345);\n";{ cp.code()+="etiss_coverage_count(1, 1351);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1350, 1348);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 1358);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) > >(3)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 1357, 1352, 1356, 1353, 1355, 1354);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BNE\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "bne"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition blt_imm_rs1_rs2 (ISA32_RV32IMACFD, "blt",(uint64_t) 0x004063,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BLT\n");cp.code()+="etiss_coverage_count(1, 6);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1393);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1361);\n";cp.code()+="if ((etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) < (etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) { // conditional\n";cp.code()+="etiss_coverage_count(9, 1376, 1368, 1366, 1365, 1363, 1375, 1373, 1372, 1370);\n";{ cp.code()+="etiss_coverage_count(1, 1392);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1377);\n";if(imm % 2ULL) { cp.code()+="etiss_coverage_count(2, 1380, 1378);\n";{ cp.code()+="etiss_coverage_count(1, 1384);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1383, 1381);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 1391);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) > >(3)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 1390, 1385, 1389, 1386, 1388, 1387);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BLT\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "blt"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition bge_imm_rs1_rs2 (ISA32_RV32IMACFD, "bge",(uint64_t) 0x005063,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BGE\n");cp.code()+="etiss_coverage_count(1, 7);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1426);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1394);\n";cp.code()+="if ((etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) >= (etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) { // conditional\n";cp.code()+="etiss_coverage_count(9, 1409, 1401, 1399, 1398, 1396, 1408, 1406, 1405, 1403);\n";{ cp.code()+="etiss_coverage_count(1, 1425);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1410);\n";if(imm % 2ULL) { cp.code()+="etiss_coverage_count(2, 1413, 1411);\n";{ cp.code()+="etiss_coverage_count(1, 1417);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1416, 1414);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 1424);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) > >(3)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 1423, 1418, 1422, 1419, 1421, 1420);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BGE\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "bge"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition bltu_imm_rs1_rs2 (ISA32_RV32IMACFD, "bltu",(uint64_t) 0x006063,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BLTU\n");cp.code()+="etiss_coverage_count(1, 8);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1455);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1427);\n";cp.code()+="if (*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] < *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";cp.code()+="etiss_coverage_count(7, 1438, 1432, 1431, 1429, 1437, 1436, 1434);\n";{ cp.code()+="etiss_coverage_count(1, 1454);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1439);\n";if(imm % 2ULL) { cp.code()+="etiss_coverage_count(2, 1442, 1440);\n";{ cp.code()+="etiss_coverage_count(1, 1446);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1445, 1443);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 1453);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) > >(3)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 1452, 1447, 1451, 1448, 1450, 1449);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BLTU\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "bltu"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition bgeu_imm_rs1_rs2 (ISA32_RV32IMACFD, "bgeu",(uint64_t) 0x007063,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BGEU\n");cp.code()+="etiss_coverage_count(1, 9);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1484);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1456);\n";cp.code()+="if (*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] >= *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";cp.code()+="etiss_coverage_count(7, 1467, 1461, 1460, 1458, 1466, 1465, 1463);\n";{ cp.code()+="etiss_coverage_count(1, 1483);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1468);\n";if(imm % 2ULL) { cp.code()+="etiss_coverage_count(2, 1471, 1469);\n";{ cp.code()+="etiss_coverage_count(1, 1475);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1474, 1472);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 1482);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) > >(3)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 1481, 1476, 1480, 1477, 1479, 1478);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BGEU\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "bgeu"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition lb_rd_rs1_imm (ISA32_RV32IMACFD, "lb",(uint64_t) 0x000003,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LB\n");cp.code()+="etiss_coverage_count(1, 10);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1518);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 load_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1494, 1493, 1490, 1489, 1487, 1492, 1491);\n";cp.code()+="etiss_uint8 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 1);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int8 res = (etiss_int8)(mem_val_0);\n";cp.code()+="etiss_coverage_count(4, 1501, 1500, 1498, 1497);\n";cp.code()+="etiss_coverage_count(1, 1502);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1508, 1505, 1503, 1506, 1507);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint32)(res);\n";cp.code()+="etiss_coverage_count(6, 1517, 1513, 1512, 1510, 1516, 1514);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LB\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "lb"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition lh_rd_rs1_imm (ISA32_RV32IMACFD, "lh",(uint64_t) 0x001003,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LH\n");cp.code()+="etiss_coverage_count(1, 11);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1555);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 load_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1528, 1527, 1524, 1523, 1521, 1526, 1525);\n";cp.code()+="etiss_uint16 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 2);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int16 res = (etiss_int16)(mem_val_0);\n";cp.code()+="etiss_coverage_count(6, 1538, 1537, 1535, 1533, 1531, 1532);\n";cp.code()+="etiss_coverage_count(1, 1539);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1545, 1542, 1540, 1543, 1544);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint32)(res);\n";cp.code()+="etiss_coverage_count(6, 1554, 1550, 1549, 1547, 1553, 1551);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LH\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "lh"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition lw_rd_rs1_imm (ISA32_RV32IMACFD, "lw",(uint64_t) 0x002003,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LW\n");cp.code()+="etiss_coverage_count(1, 12);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1592);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 load_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1565, 1564, 1561, 1560, 1558, 1563, 1562);\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int32 res = (etiss_int32)(mem_val_0);\n";cp.code()+="etiss_coverage_count(6, 1575, 1574, 1572, 1570, 1568, 1569);\n";cp.code()+="etiss_coverage_count(1, 1576);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1582, 1579, 1577, 1580, 1581);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint32)(res);\n";cp.code()+="etiss_coverage_count(6, 1591, 1587, 1586, 1584, 1590, 1588);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LW\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "lw"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition lbu_rd_rs1_imm (ISA32_RV32IMACFD, "lbu",(uint64_t) 0x004003,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LBU\n");cp.code()+="etiss_coverage_count(1, 13);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1626);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 load_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1602, 1601, 1598, 1597, 1595, 1600, 1599);\n";cp.code()+="etiss_uint8 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 1);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_uint8 res = (etiss_uint8)(mem_val_0);\n";cp.code()+="etiss_coverage_count(4, 1609, 1608, 1606, 1605);\n";cp.code()+="etiss_coverage_count(1, 1610);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1616, 1613, 1611, 1614, 1615);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint32)(res);\n";cp.code()+="etiss_coverage_count(6, 1625, 1621, 1620, 1618, 1624, 1622);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LBU\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "lbu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition lhu_rd_rs1_imm (ISA32_RV32IMACFD, "lhu",(uint64_t) 0x005003,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LHU\n");cp.code()+="etiss_coverage_count(1, 14);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1663);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 load_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1636, 1635, 1632, 1631, 1629, 1634, 1633);\n";cp.code()+="etiss_uint16 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 2);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_uint16 res = (etiss_uint16)(mem_val_0);\n";cp.code()+="etiss_coverage_count(6, 1646, 1645, 1643, 1641, 1639, 1640);\n";cp.code()+="etiss_coverage_count(1, 1647);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1653, 1650, 1648, 1651, 1652);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint32)(res);\n";cp.code()+="etiss_coverage_count(6, 1662, 1658, 1657, 1655, 1661, 1659);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LHU\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "lhu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition sb_imm_rs1_rs2 (ISA32_RV32IMACFD, "sb",(uint64_t) 0x000023,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SB\n");cp.code()+="etiss_coverage_count(1, 15);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1685);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 store_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1673, 1672, 1669, 1668, 1666, 1671, 1670);\n";cp.code()+="etiss_uint8 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_int8)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(7, 1684, 1676, 1675, 1683, 1681, 1680, 1678);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, store_address, (etiss_uint8*)&mem_val_0, 1);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SB\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;std::stringstream ss;ss<< "sb"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition sh_imm_rs1_rs2 (ISA32_RV32IMACFD, "sh",(uint64_t) 0x001023,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SH\n");cp.code()+="etiss_coverage_count(1, 16);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1710);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 store_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1695, 1694, 1691, 1690, 1688, 1693, 1692);\n";cp.code()+="etiss_uint16 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_int16)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(9, 1709, 1701, 1699, 1697, 1698, 1708, 1706, 1705, 1703);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, store_address, (etiss_uint8*)&mem_val_0, 2);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SH\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;std::stringstream ss;ss<< "sh"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition sw_imm_rs1_rs2 (ISA32_RV32IMACFD, "sw",(uint64_t) 0x002023,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SW\n");cp.code()+="etiss_coverage_count(1, 17);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1735);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 store_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1720, 1719, 1716, 1715, 1713, 1718, 1717);\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(9, 1734, 1726, 1724, 1722, 1723, 1733, 1731, 1730, 1728);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, store_address, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SW\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;std::stringstream ss;ss<< "sw"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition addi_rd_rs1_imm (ISA32_RV32IMACFD, "addi",(uint64_t) 0x000013,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ADDI\n");cp.code()+="etiss_coverage_count(1, 18);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1736);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1742, 1739, 1737, 1740, 1741);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(10, 1756, 1747, 1746, 1744, 1755, 1752, 1751, 1749, 1754, 1753);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "addi"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition slti_rd_rs1_imm (ISA32_RV32IMACFD, "slti",(uint64_t) 0x002013,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLTI\n");cp.code()+="etiss_coverage_count(1, 19);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1757);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1763, 1760, 1758, 1761, 1762);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (((etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) < "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL)) ? (1ULL) : (0LL);\n";cp.code()+="etiss_coverage_count(15, 1782, 1768, 1767, 1765, 1781, 1777, 1774, 1773, 1772, 1770, 1776, 1775, 1778, 1779, 1780);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "slti"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition sltiu_rd_rs1_imm (ISA32_RV32IMACFD, "sltiu",(uint64_t) 0x003013,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLTIU\n");cp.code()+="etiss_coverage_count(1, 20);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1783);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1789, 1786, 1784, 1787, 1788);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = ((*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] < "+std::to_string((etiss_uint32)((((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))))+"ULL)) ? (1ULL) : (0LL);\n";cp.code()+="etiss_coverage_count(16, 1810, 1794, 1793, 1791, 1809, 1805, 1799, 1798, 1796, 1804, 1801, 1800, 1802, 1806, 1807, 1808);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "sltiu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition xori_rd_rs1_imm (ISA32_RV32IMACFD, "xori",(uint64_t) 0x004013,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//XORI\n");cp.code()+="etiss_coverage_count(1, 21);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1811);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1817, 1814, 1812, 1815, 1816);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] ^ "+std::to_string((etiss_uint32)((((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))))+"ULL;\n";cp.code()+="etiss_coverage_count(12, 1834, 1822, 1821, 1819, 1833, 1827, 1826, 1824, 1832, 1829, 1828, 1830);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "xori"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition ori_rd_rs1_imm (ISA32_RV32IMACFD, "ori",(uint64_t) 0x006013,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ORI\n");cp.code()+="etiss_coverage_count(1, 22);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1835);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1841, 1838, 1836, 1839, 1840);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] | "+std::to_string((etiss_uint32)((((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))))+"ULL;\n";cp.code()+="etiss_coverage_count(12, 1858, 1846, 1845, 1843, 1857, 1851, 1850, 1848, 1856, 1853, 1852, 1854);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "ori"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition andi_rd_rs1_imm (ISA32_RV32IMACFD, "andi",(uint64_t) 0x007013,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ANDI\n");cp.code()+="etiss_coverage_count(1, 23);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1859);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1865, 1862, 1860, 1863, 1864);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] & "+std::to_string((etiss_uint32)((((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))))+"ULL;\n";cp.code()+="etiss_coverage_count(12, 1882, 1870, 1869, 1867, 1881, 1875, 1874, 1872, 1880, 1877, 1876, 1878);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "andi"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();})
 
static InstructionDefinition slli_rd_rs1_shamt (ISA32_RV32IMACFD, "slli",(uint64_t) 0x001013,(uint64_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLLI\n");cp.code()+="etiss_coverage_count(1, 24);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1886);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1892, 1889, 1887, 1890, 1891);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] << "+std::to_string(shamt)+"ULL;\n";cp.code()+="etiss_coverage_count(9, 1905, 1897, 1896, 1894, 1904, 1902, 1901, 1899, 1903);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;std::stringstream ss;ss<< "slli"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | shamt="+std::to_string(shamt)+"]");return ss.str();})
 
static InstructionDefinition srli_rd_rs1_shamt (ISA32_RV32IMACFD, "srli",(uint64_t) 0x005013,(uint64_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRLI\n");cp.code()+="etiss_coverage_count(1, 25);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1909);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1915, 1912, 1910, 1913, 1914);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] >> "+std::to_string(shamt)+"ULL;\n";cp.code()+="etiss_coverage_count(9, 1928, 1920, 1919, 1917, 1927, 1925, 1924, 1922, 1926);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;std::stringstream ss;ss<< "srli"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | shamt="+std::to_string(shamt)+"]");return ss.str();})
 
static InstructionDefinition srai_rd_rs1_shamt (ISA32_RV32IMACFD, "srai",(uint64_t) 0x40005013,(uint64_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRAI\n");cp.code()+="etiss_coverage_count(1, 26);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1932);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1938, 1935, 1933, 1936, 1937);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) >> "+std::to_string(shamt)+"ULL;\n";cp.code()+="etiss_coverage_count(10, 1953, 1943, 1942, 1940, 1952, 1950, 1948, 1947, 1945, 1951);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;std::stringstream ss;ss<< "srai"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | shamt="+std::to_string(shamt)+"]");return ss.str();})
 
static InstructionDefinition add_rd_rs1_rs2 (ISA32_RV32IMACFD, "add",(uint64_t) 0x000033,(uint64_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ADD\n");cp.code()+="etiss_coverage_count(1, 27);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1954);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1960, 1957, 1955, 1958, 1959);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(11, 1977, 1965, 1964, 1962, 1976, 1970, 1969, 1967, 1975, 1974, 1972);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "add"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition sub_rd_rs1_rs2 (ISA32_RV32IMACFD, "sub",(uint64_t) 0x40000033,(uint64_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SUB\n");cp.code()+="etiss_coverage_count(1, 28);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1978);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1984, 1981, 1979, 1982, 1983);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] - *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(11, 2001, 1989, 1988, 1986, 2000, 1994, 1993, 1991, 1999, 1998, 1996);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "sub"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition sll_rd_rs1_rs2 (ISA32_RV32IMACFD, "sll",(uint64_t) 0x001033,(uint64_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLL\n");cp.code()+="etiss_coverage_count(1, 29);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2002);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2008, 2005, 2003, 2006, 2007);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] << (*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL] & 31ULL);\n";cp.code()+="etiss_coverage_count(13, 2031, 2013, 2012, 2010, 2030, 2018, 2017, 2015, 2028, 2023, 2022, 2020, 2029);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "sll"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition slt_rd_rs1_rs2 (ISA32_RV32IMACFD, "slt",(uint64_t) 0x002033,(uint64_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLT\n");cp.code()+="etiss_coverage_count(1, 30);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2032);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2038, 2035, 2033, 2036, 2037);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = ((etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) < (etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) ? (1ULL) : (0LL);\n";cp.code()+="etiss_coverage_count(16, 2060, 2043, 2042, 2040, 2059, 2056, 2049, 2048, 2047, 2045, 2055, 2054, 2053, 2051, 2057, 2058);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "slt"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition sltu_rd_rs1_rs2 (ISA32_RV32IMACFD, "sltu",(uint64_t) 0x003033,(uint64_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLTU\n");cp.code()+="etiss_coverage_count(1, 31);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2061);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2067, 2064, 2062, 2065, 2066);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] < *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) ? (1ULL) : (0LL);\n";cp.code()+="etiss_coverage_count(14, 2087, 2072, 2071, 2069, 2086, 2083, 2077, 2076, 2074, 2082, 2081, 2079, 2084, 2085);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "sltu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition xor_rd_rs1_rs2 (ISA32_RV32IMACFD, "xor",(uint64_t) 0x004033,(uint64_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//XOR\n");cp.code()+="etiss_coverage_count(1, 32);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2088);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2094, 2091, 2089, 2092, 2093);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] ^ *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(11, 2111, 2099, 2098, 2096, 2110, 2104, 2103, 2101, 2109, 2108, 2106);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "xor"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition srl_rd_rs1_rs2 (ISA32_RV32IMACFD, "srl",(uint64_t) 0x005033,(uint64_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRL\n");cp.code()+="etiss_coverage_count(1, 33);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2112);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2118, 2115, 2113, 2116, 2117);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] >> (*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL] & 31ULL);\n";cp.code()+="etiss_coverage_count(13, 2141, 2123, 2122, 2120, 2140, 2128, 2127, 2125, 2138, 2133, 2132, 2130, 2139);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "srl"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition sra_rd_rs1_rs2 (ISA32_RV32IMACFD, "sra",(uint64_t) 0x40005033,(uint64_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRA\n");cp.code()+="etiss_coverage_count(1, 34);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2142);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2148, 2145, 2143, 2146, 2147);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) >> (*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL] & 31ULL);\n";cp.code()+="etiss_coverage_count(14, 2172, 2153, 2152, 2150, 2171, 2159, 2158, 2157, 2155, 2169, 2164, 2163, 2161, 2170);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "sra"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition or_rd_rs1_rs2 (ISA32_RV32IMACFD, "or",(uint64_t) 0x006033,(uint64_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//OR\n");cp.code()+="etiss_coverage_count(1, 35);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2173);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2179, 2176, 2174, 2177, 2178);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] | *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(11, 2196, 2184, 2183, 2181, 2195, 2189, 2188, 2186, 2194, 2193, 2191);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "or"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition and_rd_rs1_rs2 (ISA32_RV32IMACFD, "and",(uint64_t) 0x007033,(uint64_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//AND\n");cp.code()+="etiss_coverage_count(1, 36);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2197);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2203, 2200, 2198, 2201, 2202);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] & *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(11, 2220, 2208, 2207, 2205, 2219, 2213, 2212, 2210, 2218, 2217, 2215);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "and"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();})
 
static InstructionDefinition fence_rd_rs1_succ_pred_fm (ISA32_RV32IMACFD, "fence",(uint64_t) 0x00000f,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 succ=0;static BitArrayRange R_succ_0(23, 20);succ+=R_succ_0.read(ba)<< 0;etiss_uint8 pred=0;static BitArrayRange R_pred_0(27, 24);pred+=R_pred_0.read(ba)<< 0;etiss_uint8 fm=0;static BitArrayRange R_fm_0(31, 28);fm+=R_fm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FENCE\n");cp.code()+="etiss_coverage_count(1, 37);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="((RV32IMACFD*)cpu)->FENCE[0ULL] = "+std::to_string(pred<< 4ULL|succ)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 2229, 2223, 2228, 2226, 2224, 2225, 2227);\n";cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 succ=0;static BitArrayRange R_succ_0(23, 20);succ+=R_succ_0.read(ba)<< 0;etiss_uint8 pred=0;static BitArrayRange R_pred_0(27, 24);pred+=R_pred_0.read(ba)<< 0;etiss_uint8 fm=0;static BitArrayRange R_fm_0(31, 28);fm+=R_fm_0.read(ba)<< 0;std::stringstream ss;ss<< "fence"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | succ="+std::to_string(succ)+" | pred="+std::to_string(pred)+" | fm="+std::to_string(fm)+"]");return ss.str();})
 

Variable Documentation

◆ add_rd_rs1_rs2

InstructionDefinition add_rd_rs1_rs2(ISA32_RV32IMACFD, "add",(uint64_t) 0x000033,(uint64_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ADD\n"); cp.code()+="etiss_coverage_count(1, 27);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1954);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1960, 1957, 1955, 1958, 1959);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(11, 1977, 1965, 1964, 1962, 1976, 1970, 1969, 1967, 1975, 1974, 1972);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; std::stringstream ss; ss<< "add"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"add"  ,
(uint64_t)  0x000033,
(uint64_t)  0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ADD\n");cp.code()+="etiss_coverage_count(1, 27);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1954);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1960, 1957, 1955, 1958, 1959);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(11, 1977, 1965, 1964, 1962, 1976, 1970, 1969, 1967, 1975, 1974, 1972);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "add"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ addi_rd_rs1_imm

InstructionDefinition addi_rd_rs1_imm(ISA32_RV32IMACFD, "addi",(uint64_t) 0x000013,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ADDI\n"); cp.code()+="etiss_coverage_count(1, 18);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1736);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1742, 1739, 1737, 1740, 1741);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(10, 1756, 1747, 1746, 1744, 1755, 1752, 1751, 1749, 1754, 1753);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "addi"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"addi"  ,
(uint64_t)  0x000013,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ADDI\n");cp.code()+="etiss_coverage_count(1, 18);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1736);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1742, 1739, 1737, 1740, 1741);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(10, 1756, 1747, 1746, 1744, 1755, 1752, 1751, 1749, 1754, 1753);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "addi"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ and_rd_rs1_rs2

InstructionDefinition and_rd_rs1_rs2(ISA32_RV32IMACFD, "and",(uint64_t) 0x007033,(uint64_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//AND\n"); cp.code()+="etiss_coverage_count(1, 36);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2197);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2203, 2200, 2198, 2201, 2202);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] & *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(11, 2220, 2208, 2207, 2205, 2219, 2213, 2212, 2210, 2218, 2217, 2215);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; std::stringstream ss; ss<< "and"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"and"  ,
(uint64_t)  0x007033,
(uint64_t)  0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//AND\n");cp.code()+="etiss_coverage_count(1, 36);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2197);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2203, 2200, 2198, 2201, 2202);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] & *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(11, 2220, 2208, 2207, 2205, 2219, 2213, 2212, 2210, 2218, 2217, 2215);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "and"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ andi_rd_rs1_imm

InstructionDefinition andi_rd_rs1_imm(ISA32_RV32IMACFD, "andi",(uint64_t) 0x007013,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ANDI\n"); cp.code()+="etiss_coverage_count(1, 23);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1859);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1865, 1862, 1860, 1863, 1864);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] & "+std::to_string((etiss_uint32)((((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))))+"ULL;\n";cp.code()+="etiss_coverage_count(12, 1882, 1870, 1869, 1867, 1881, 1875, 1874, 1872, 1880, 1877, 1876, 1878);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "andi"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"andi"  ,
(uint64_t)  0x007013,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ANDI\n");cp.code()+="etiss_coverage_count(1, 23);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1859);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1865, 1862, 1860, 1863, 1864);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] & "+std::to_string((etiss_uint32)((((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))))+"ULL;\n";cp.code()+="etiss_coverage_count(12, 1882, 1870, 1869, 1867, 1881, 1875, 1874, 1872, 1880, 1877, 1876, 1878);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "andi"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ auipc_rd_imm

InstructionDefinition auipc_rd_imm(ISA32_RV32IMACFD, "auipc",(uint64_t) 0x000017,(uint64_t) 0x00007f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//AUIPC\n"); cp.code()+="etiss_coverage_count(1, 1);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1208);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1214, 1211, 1209, 1212, 1213);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string(ic.current_address_+(etiss_int32)(imm))+"LL;\n";cp.code()+="etiss_coverage_count(8, 1224, 1219, 1218, 1216, 1223, 1220, 1222, 1221);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12; std::stringstream ss; ss<< "auipc"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"auipc"  ,
(uint64_t)  0x000017,
(uint64_t)  0x00007f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//AUIPC\n");cp.code()+="etiss_coverage_count(1, 1);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1208);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1214, 1211, 1209, 1212, 1213);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string(ic.current_address_+(etiss_int32)(imm))+"LL;\n";cp.code()+="etiss_coverage_count(8, 1224, 1219, 1218, 1216, 1223, 1220, 1222, 1221);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "auipc"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ beq_imm_rs1_rs2

InstructionDefinition beq_imm_rs1_rs2(ISA32_RV32IMACFD, "beq",(uint64_t) 0x000063,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BEQ\n"); cp.code()+="etiss_coverage_count(1, 4);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1331);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1303);\n";cp.code()+="if (*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] == *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";cp.code()+="etiss_coverage_count(7, 1314, 1308, 1307, 1305, 1313, 1312, 1310);\n";{ cp.code()+="etiss_coverage_count(1, 1330);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1315);\n";if(imm % 2ULL) { cp.code()+="etiss_coverage_count(2, 1318, 1316);\n";{ cp.code()+="etiss_coverage_count(1, 1322);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1321, 1319);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 1329);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) > >(3)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 1328, 1323, 1327, 1324, 1326, 1325);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BEQ\n"); cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; std::stringstream ss; ss<< "beq"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"beq"  ,
(uint64_t)  0x000063,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BEQ\n");cp.code()+="etiss_coverage_count(1, 4);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1331);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1303);\n";cp.code()+="if (*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] == *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";cp.code()+="etiss_coverage_count(7, 1314, 1308, 1307, 1305, 1313, 1312, 1310);\n";{ cp.code()+="etiss_coverage_count(1, 1330);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1315);\n";if(imm % 2ULL) { cp.code()+="etiss_coverage_count(2, 1318, 1316);\n";{ cp.code()+="etiss_coverage_count(1, 1322);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1321, 1319);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 1329);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) > >(3)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 1328, 1323, 1327, 1324, 1326, 1325);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BEQ\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "beq"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ bge_imm_rs1_rs2

InstructionDefinition bge_imm_rs1_rs2(ISA32_RV32IMACFD, "bge",(uint64_t) 0x005063,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BGE\n"); cp.code()+="etiss_coverage_count(1, 7);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1426);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1394);\n";cp.code()+="if ((etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) >= (etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) { // conditional\n";cp.code()+="etiss_coverage_count(9, 1409, 1401, 1399, 1398, 1396, 1408, 1406, 1405, 1403);\n";{ cp.code()+="etiss_coverage_count(1, 1425);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1410);\n";if(imm % 2ULL) { cp.code()+="etiss_coverage_count(2, 1413, 1411);\n";{ cp.code()+="etiss_coverage_count(1, 1417);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1416, 1414);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 1424);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) > >(3)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 1423, 1418, 1422, 1419, 1421, 1420);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BGE\n"); cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; std::stringstream ss; ss<< "bge"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"bge"  ,
(uint64_t)  0x005063,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BGE\n");cp.code()+="etiss_coverage_count(1, 7);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1426);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1394);\n";cp.code()+="if ((etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) >= (etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) { // conditional\n";cp.code()+="etiss_coverage_count(9, 1409, 1401, 1399, 1398, 1396, 1408, 1406, 1405, 1403);\n";{ cp.code()+="etiss_coverage_count(1, 1425);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1410);\n";if(imm % 2ULL) { cp.code()+="etiss_coverage_count(2, 1413, 1411);\n";{ cp.code()+="etiss_coverage_count(1, 1417);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1416, 1414);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 1424);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) > >(3)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 1423, 1418, 1422, 1419, 1421, 1420);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BGE\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "bge"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ bgeu_imm_rs1_rs2

InstructionDefinition bgeu_imm_rs1_rs2(ISA32_RV32IMACFD, "bgeu",(uint64_t) 0x007063,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BGEU\n"); cp.code()+="etiss_coverage_count(1, 9);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1484);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1456);\n";cp.code()+="if (*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] >= *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";cp.code()+="etiss_coverage_count(7, 1467, 1461, 1460, 1458, 1466, 1465, 1463);\n";{ cp.code()+="etiss_coverage_count(1, 1483);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1468);\n";if(imm % 2ULL) { cp.code()+="etiss_coverage_count(2, 1471, 1469);\n";{ cp.code()+="etiss_coverage_count(1, 1475);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1474, 1472);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 1482);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) > >(3)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 1481, 1476, 1480, 1477, 1479, 1478);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BGEU\n"); cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; std::stringstream ss; ss<< "bgeu"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"bgeu"  ,
(uint64_t)  0x007063,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BGEU\n");cp.code()+="etiss_coverage_count(1, 9);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1484);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1456);\n";cp.code()+="if (*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] >= *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";cp.code()+="etiss_coverage_count(7, 1467, 1461, 1460, 1458, 1466, 1465, 1463);\n";{ cp.code()+="etiss_coverage_count(1, 1483);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1468);\n";if(imm % 2ULL) { cp.code()+="etiss_coverage_count(2, 1471, 1469);\n";{ cp.code()+="etiss_coverage_count(1, 1475);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1474, 1472);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 1482);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) > >(3)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 1481, 1476, 1480, 1477, 1479, 1478);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BGEU\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "bgeu"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ blt_imm_rs1_rs2

InstructionDefinition blt_imm_rs1_rs2(ISA32_RV32IMACFD, "blt",(uint64_t) 0x004063,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BLT\n"); cp.code()+="etiss_coverage_count(1, 6);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1393);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1361);\n";cp.code()+="if ((etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) < (etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) { // conditional\n";cp.code()+="etiss_coverage_count(9, 1376, 1368, 1366, 1365, 1363, 1375, 1373, 1372, 1370);\n";{ cp.code()+="etiss_coverage_count(1, 1392);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1377);\n";if(imm % 2ULL) { cp.code()+="etiss_coverage_count(2, 1380, 1378);\n";{ cp.code()+="etiss_coverage_count(1, 1384);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1383, 1381);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 1391);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) > >(3)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 1390, 1385, 1389, 1386, 1388, 1387);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BLT\n"); cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; std::stringstream ss; ss<< "blt"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"blt"  ,
(uint64_t)  0x004063,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BLT\n");cp.code()+="etiss_coverage_count(1, 6);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1393);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1361);\n";cp.code()+="if ((etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) < (etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) { // conditional\n";cp.code()+="etiss_coverage_count(9, 1376, 1368, 1366, 1365, 1363, 1375, 1373, 1372, 1370);\n";{ cp.code()+="etiss_coverage_count(1, 1392);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1377);\n";if(imm % 2ULL) { cp.code()+="etiss_coverage_count(2, 1380, 1378);\n";{ cp.code()+="etiss_coverage_count(1, 1384);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1383, 1381);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 1391);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) > >(3)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 1390, 1385, 1389, 1386, 1388, 1387);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BLT\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "blt"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ bltu_imm_rs1_rs2

InstructionDefinition bltu_imm_rs1_rs2(ISA32_RV32IMACFD, "bltu",(uint64_t) 0x006063,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BLTU\n"); cp.code()+="etiss_coverage_count(1, 8);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1455);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1427);\n";cp.code()+="if (*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] < *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";cp.code()+="etiss_coverage_count(7, 1438, 1432, 1431, 1429, 1437, 1436, 1434);\n";{ cp.code()+="etiss_coverage_count(1, 1454);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1439);\n";if(imm % 2ULL) { cp.code()+="etiss_coverage_count(2, 1442, 1440);\n";{ cp.code()+="etiss_coverage_count(1, 1446);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1445, 1443);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 1453);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) > >(3)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 1452, 1447, 1451, 1448, 1450, 1449);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BLTU\n"); cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; std::stringstream ss; ss<< "bltu"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"bltu"  ,
(uint64_t)  0x006063,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BLTU\n");cp.code()+="etiss_coverage_count(1, 8);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1455);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1427);\n";cp.code()+="if (*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] < *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";cp.code()+="etiss_coverage_count(7, 1438, 1432, 1431, 1429, 1437, 1436, 1434);\n";{ cp.code()+="etiss_coverage_count(1, 1454);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1439);\n";if(imm % 2ULL) { cp.code()+="etiss_coverage_count(2, 1442, 1440);\n";{ cp.code()+="etiss_coverage_count(1, 1446);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1445, 1443);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 1453);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) > >(3)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 1452, 1447, 1451, 1448, 1450, 1449);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BLTU\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "bltu"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ bne_imm_rs1_rs2

InstructionDefinition bne_imm_rs1_rs2(ISA32_RV32IMACFD, "bne",(uint64_t) 0x001063,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BNE\n"); cp.code()+="etiss_coverage_count(1, 5);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1360);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1332);\n";cp.code()+="if (*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] != *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";cp.code()+="etiss_coverage_count(7, 1343, 1337, 1336, 1334, 1342, 1341, 1339);\n";{ cp.code()+="etiss_coverage_count(1, 1359);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1344);\n";if(imm % 2ULL) { cp.code()+="etiss_coverage_count(2, 1347, 1345);\n";{ cp.code()+="etiss_coverage_count(1, 1351);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1350, 1348);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 1358);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) > >(3)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 1357, 1352, 1356, 1353, 1355, 1354);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BNE\n"); cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12; std::stringstream ss; ss<< "bne"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"bne"  ,
(uint64_t)  0x001063,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//BNE\n");cp.code()+="etiss_coverage_count(1, 5);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1360);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1332);\n";cp.code()+="if (*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] != *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) { // conditional\n";cp.code()+="etiss_coverage_count(7, 1343, 1337, 1336, 1334, 1342, 1341, 1339);\n";{ cp.code()+="etiss_coverage_count(1, 1359);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1344);\n";if(imm % 2ULL) { cp.code()+="etiss_coverage_count(2, 1347, 1345);\n";{ cp.code()+="etiss_coverage_count(1, 1351);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1350, 1348);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 1358);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(3)) > >(3)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 1357, 1352, 1356, 1353, 1355, 1354);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//BNE\n");cp.code()+="if (cpu->return_pending || cpu->exception || cpu->nextPc != "+std::to_string(ic.current_address_+4)+"ULL) return cpu->exception;\n";} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_11(7, 7);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(11, 8);imm+=R_imm_1.read(ba)<< 1;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(30, 25);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_12(31, 31);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "bne"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ fence_rd_rs1_succ_pred_fm

InstructionDefinition fence_rd_rs1_succ_pred_fm(ISA32_RV32IMACFD, "fence",(uint64_t) 0x00000f,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 succ=0;static BitArrayRange R_succ_0(23, 20);succ+=R_succ_0.read(ba)<< 0;etiss_uint8 pred=0;static BitArrayRange R_pred_0(27, 24);pred+=R_pred_0.read(ba)<< 0;etiss_uint8 fm=0;static BitArrayRange R_fm_0(31, 28);fm+=R_fm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FENCE\n"); cp.code()+="etiss_coverage_count(1, 37);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="((RV32IMACFD*)cpu)->FENCE[0ULL] = "+std::to_string(pred<< 4ULL|succ)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 2229, 2223, 2228, 2226, 2224, 2225, 2227);\n";cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 succ=0;static BitArrayRange R_succ_0(23, 20);succ+=R_succ_0.read(ba)<< 0;etiss_uint8 pred=0;static BitArrayRange R_pred_0(27, 24);pred+=R_pred_0.read(ba)<< 0;etiss_uint8 fm=0;static BitArrayRange R_fm_0(31, 28);fm+=R_fm_0.read(ba)<< 0; std::stringstream ss; ss<< "fence"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | succ="+std::to_string(succ)+" | pred="+std::to_string(pred)+" | fm="+std::to_string(fm)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"fence"  ,
(uint64_t)  0x00000f,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 succ=0;static BitArrayRange R_succ_0(23, 20);succ+=R_succ_0.read(ba)<< 0;etiss_uint8 pred=0;static BitArrayRange R_pred_0(27, 24);pred+=R_pred_0.read(ba)<< 0;etiss_uint8 fm=0;static BitArrayRange R_fm_0(31, 28);fm+=R_fm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FENCE\n");cp.code()+="etiss_coverage_count(1, 37);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="((RV32IMACFD*)cpu)->FENCE[0ULL] = "+std::to_string(pred<< 4ULL|succ)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 2229, 2223, 2228, 2226, 2224, 2225, 2227);\n";cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 succ=0;static BitArrayRange R_succ_0(23, 20);succ+=R_succ_0.read(ba)<< 0;etiss_uint8 pred=0;static BitArrayRange R_pred_0(27, 24);pred+=R_pred_0.read(ba)<< 0;etiss_uint8 fm=0;static BitArrayRange R_fm_0(31, 28);fm+=R_fm_0.read(ba)<< 0;std::stringstream ss;ss<< "fence"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | succ="+std::to_string(succ)+" | pred="+std::to_string(pred)+" | fm="+std::to_string(fm)+"]");return ss.str();}   
)
static

◆ jal_rd_imm

InstructionDefinition jal_rd_imm(ISA32_RV32IMACFD, "jal",(uint64_t) 0x00006f,(uint64_t) 0x00007f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(19, 12);imm+=R_imm_12.read(ba)<< 12;static BitArrayRange R_imm_11(20, 20);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(30, 21);imm+=R_imm_1.read(ba)<< 1;static BitArrayRange R_imm_20(31, 31);imm+=R_imm_20.read(ba)<< 20; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//JAL\n"); cp.code()+="etiss_coverage_count(1, 2);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1256);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1225);\n";if(imm % 2ULL) { cp.code()+="etiss_coverage_count(2, 1228, 1226);\n";{ cp.code()+="etiss_coverage_count(1, 1232);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1231, 1229);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 1255);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1233);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1239, 1236, 1234, 1237, 1238);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string(ic.current_address_+4ULL)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1248, 1244, 1243, 1241, 1247, 1245, 1246);\n";} cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int32)(((etiss_int32) imm)<<(11)) > >(11)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 1254, 1249, 1253, 1250, 1252, 1251);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//JAL\n"); cp.code()+="return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(19, 12);imm+=R_imm_12.read(ba)<< 12;static BitArrayRange R_imm_11(20, 20);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(30, 21);imm+=R_imm_1.read(ba)<< 1;static BitArrayRange R_imm_20(31, 31);imm+=R_imm_20.read(ba)<< 20; std::stringstream ss; ss<< "jal"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"jal"  ,
(uint64_t)  0x00006f,
(uint64_t)  0x00007f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(19, 12);imm+=R_imm_12.read(ba)<< 12;static BitArrayRange R_imm_11(20, 20);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(30, 21);imm+=R_imm_1.read(ba)<< 1;static BitArrayRange R_imm_20(31, 31);imm+=R_imm_20.read(ba)<< 20;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//JAL\n");cp.code()+="etiss_coverage_count(1, 2);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1256);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1225);\n";if(imm % 2ULL) { cp.code()+="etiss_coverage_count(2, 1228, 1226);\n";{ cp.code()+="etiss_coverage_count(1, 1232);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1231, 1229);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} } else { { cp.code()+="etiss_coverage_count(1, 1255);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1233);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1239, 1236, 1234, 1237, 1238);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string(ic.current_address_+4ULL)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1248, 1244, 1243, 1241, 1247, 1245, 1246);\n";} cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int32)(((etiss_int32) imm)<<(11)) > >(11)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 1254, 1249, 1253, 1250, 1252, 1251);\n";cp.code()+="} // block\n";} } cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//JAL\n");cp.code()+="return cpu->exception;\n";} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(19, 12);imm+=R_imm_12.read(ba)<< 12;static BitArrayRange R_imm_11(20, 20);imm+=R_imm_11.read(ba)<< 11;static BitArrayRange R_imm_1(30, 21);imm+=R_imm_1.read(ba)<< 1;static BitArrayRange R_imm_20(31, 31);imm+=R_imm_20.read(ba)<< 20;std::stringstream ss;ss<< "jal"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ jalr_rd_rs1_imm

InstructionDefinition jalr_rd_rs1_imm(ISA32_RV32IMACFD, "jalr",(uint64_t) 0x000067,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//JALR\n"); cp.code()+="etiss_coverage_count(1, 3);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1302);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 new_pc = (*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL) & -2LL;\n";cp.code()+="etiss_coverage_count(9, 1270, 1269, 1265, 1262, 1261, 1259, 1264, 1263, 1266);\n";cp.code()+="etiss_coverage_count(1, 1271);\n";cp.code()+="if (new_pc % 2ULL) { // conditional\n";cp.code()+="etiss_coverage_count(2, 1274, 1272);\n";{ cp.code()+="etiss_coverage_count(1, 1278);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1277, 1275);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="else { // conditional\n";{ cp.code()+="etiss_coverage_count(1, 1301);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1279);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1285, 1282, 1280, 1283, 1284);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string(ic.current_address_+4ULL)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1294, 1290, 1289, 1287, 1293, 1291, 1292);\n";} cp.code()+="cpu->nextPc = new_pc & -2LL;\n";cp.code()+="etiss_coverage_count(4, 1300, 1295, 1299, 1296);\n";cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//JALR\n"); cp.code()+="return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "jalr"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"jalr"  ,
(uint64_t)  0x000067,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//JALR\n");cp.code()+="etiss_coverage_count(1, 3);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1302);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 new_pc = (*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL) & -2LL;\n";cp.code()+="etiss_coverage_count(9, 1270, 1269, 1265, 1262, 1261, 1259, 1264, 1263, 1266);\n";cp.code()+="etiss_coverage_count(1, 1271);\n";cp.code()+="if (new_pc % 2ULL) { // conditional\n";cp.code()+="etiss_coverage_count(2, 1274, 1272);\n";{ cp.code()+="etiss_coverage_count(1, 1278);\n";cp.code()+="{ // block\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_raise(cpu, system, plugin_pointers, 0LL, 0LL);\n";cp.code()+="etiss_coverage_count(2, 1277, 1275);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="else { // conditional\n";{ cp.code()+="etiss_coverage_count(1, 1301);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 1279);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1285, 1282, 1280, 1283, 1284);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string(ic.current_address_+4ULL)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1294, 1290, 1289, 1287, 1293, 1291, 1292);\n";} cp.code()+="cpu->nextPc = new_pc & -2LL;\n";cp.code()+="etiss_coverage_count(4, 1300, 1295, 1299, 1296);\n";cp.code()+="} // block\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//JALR\n");cp.code()+="return cpu->exception;\n";} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "jalr"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ lb_rd_rs1_imm

InstructionDefinition lb_rd_rs1_imm(ISA32_RV32IMACFD, "lb",(uint64_t) 0x000003,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LB\n"); cp.code()+="etiss_coverage_count(1, 10);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1518);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 load_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1494, 1493, 1490, 1489, 1487, 1492, 1491);\n";cp.code()+="etiss_uint8 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 1);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int8 res = (etiss_int8)(mem_val_0);\n";cp.code()+="etiss_coverage_count(4, 1501, 1500, 1498, 1497);\n";cp.code()+="etiss_coverage_count(1, 1502);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1508, 1505, 1503, 1506, 1507);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint32)(res);\n";cp.code()+="etiss_coverage_count(6, 1517, 1513, 1512, 1510, 1516, 1514);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LB\n"); cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "lb"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"lb"  ,
(uint64_t)  0x000003,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LB\n");cp.code()+="etiss_coverage_count(1, 10);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1518);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 load_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1494, 1493, 1490, 1489, 1487, 1492, 1491);\n";cp.code()+="etiss_uint8 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 1);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int8 res = (etiss_int8)(mem_val_0);\n";cp.code()+="etiss_coverage_count(4, 1501, 1500, 1498, 1497);\n";cp.code()+="etiss_coverage_count(1, 1502);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1508, 1505, 1503, 1506, 1507);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint32)(res);\n";cp.code()+="etiss_coverage_count(6, 1517, 1513, 1512, 1510, 1516, 1514);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LB\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "lb"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ lbu_rd_rs1_imm

InstructionDefinition lbu_rd_rs1_imm(ISA32_RV32IMACFD, "lbu",(uint64_t) 0x004003,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LBU\n"); cp.code()+="etiss_coverage_count(1, 13);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1626);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 load_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1602, 1601, 1598, 1597, 1595, 1600, 1599);\n";cp.code()+="etiss_uint8 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 1);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_uint8 res = (etiss_uint8)(mem_val_0);\n";cp.code()+="etiss_coverage_count(4, 1609, 1608, 1606, 1605);\n";cp.code()+="etiss_coverage_count(1, 1610);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1616, 1613, 1611, 1614, 1615);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint32)(res);\n";cp.code()+="etiss_coverage_count(6, 1625, 1621, 1620, 1618, 1624, 1622);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LBU\n"); cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "lbu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"lbu"  ,
(uint64_t)  0x004003,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LBU\n");cp.code()+="etiss_coverage_count(1, 13);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1626);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 load_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1602, 1601, 1598, 1597, 1595, 1600, 1599);\n";cp.code()+="etiss_uint8 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 1);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_uint8 res = (etiss_uint8)(mem_val_0);\n";cp.code()+="etiss_coverage_count(4, 1609, 1608, 1606, 1605);\n";cp.code()+="etiss_coverage_count(1, 1610);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1616, 1613, 1611, 1614, 1615);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint32)(res);\n";cp.code()+="etiss_coverage_count(6, 1625, 1621, 1620, 1618, 1624, 1622);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LBU\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "lbu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ lh_rd_rs1_imm

InstructionDefinition lh_rd_rs1_imm(ISA32_RV32IMACFD, "lh",(uint64_t) 0x001003,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LH\n"); cp.code()+="etiss_coverage_count(1, 11);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1555);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 load_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1528, 1527, 1524, 1523, 1521, 1526, 1525);\n";cp.code()+="etiss_uint16 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 2);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int16 res = (etiss_int16)(mem_val_0);\n";cp.code()+="etiss_coverage_count(6, 1538, 1537, 1535, 1533, 1531, 1532);\n";cp.code()+="etiss_coverage_count(1, 1539);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1545, 1542, 1540, 1543, 1544);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint32)(res);\n";cp.code()+="etiss_coverage_count(6, 1554, 1550, 1549, 1547, 1553, 1551);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LH\n"); cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "lh"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"lh"  ,
(uint64_t)  0x001003,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LH\n");cp.code()+="etiss_coverage_count(1, 11);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1555);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 load_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1528, 1527, 1524, 1523, 1521, 1526, 1525);\n";cp.code()+="etiss_uint16 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 2);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int16 res = (etiss_int16)(mem_val_0);\n";cp.code()+="etiss_coverage_count(6, 1538, 1537, 1535, 1533, 1531, 1532);\n";cp.code()+="etiss_coverage_count(1, 1539);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1545, 1542, 1540, 1543, 1544);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint32)(res);\n";cp.code()+="etiss_coverage_count(6, 1554, 1550, 1549, 1547, 1553, 1551);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LH\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "lh"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ lhu_rd_rs1_imm

InstructionDefinition lhu_rd_rs1_imm(ISA32_RV32IMACFD, "lhu",(uint64_t) 0x005003,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LHU\n"); cp.code()+="etiss_coverage_count(1, 14);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1663);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 load_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1636, 1635, 1632, 1631, 1629, 1634, 1633);\n";cp.code()+="etiss_uint16 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 2);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_uint16 res = (etiss_uint16)(mem_val_0);\n";cp.code()+="etiss_coverage_count(6, 1646, 1645, 1643, 1641, 1639, 1640);\n";cp.code()+="etiss_coverage_count(1, 1647);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1653, 1650, 1648, 1651, 1652);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint32)(res);\n";cp.code()+="etiss_coverage_count(6, 1662, 1658, 1657, 1655, 1661, 1659);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LHU\n"); cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "lhu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"lhu"  ,
(uint64_t)  0x005003,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LHU\n");cp.code()+="etiss_coverage_count(1, 14);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1663);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 load_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1636, 1635, 1632, 1631, 1629, 1634, 1633);\n";cp.code()+="etiss_uint16 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 2);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_uint16 res = (etiss_uint16)(mem_val_0);\n";cp.code()+="etiss_coverage_count(6, 1646, 1645, 1643, 1641, 1639, 1640);\n";cp.code()+="etiss_coverage_count(1, 1647);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1653, 1650, 1648, 1651, 1652);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint32)(res);\n";cp.code()+="etiss_coverage_count(6, 1662, 1658, 1657, 1655, 1661, 1659);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LHU\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "lhu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ lui_rd_imm

InstructionDefinition lui_rd_imm(ISA32_RV32IMACFD, "lui",(uint64_t) 0x000037,(uint64_t) 0x00007f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LUI\n"); cp.code()+="etiss_coverage_count(1, 0);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1190);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1196, 1193, 1191, 1194, 1195);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string((etiss_uint32)(((etiss_int32)(imm))))+"ULL;\n";cp.code()+="etiss_coverage_count(8, 1207, 1201, 1200, 1198, 1206, 1203, 1202, 1204);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12; std::stringstream ss; ss<< "lui"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"lui"  ,
(uint64_t)  0x000037,
(uint64_t)  0x00007f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LUI\n");cp.code()+="etiss_coverage_count(1, 0);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1190);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1196, 1193, 1191, 1194, 1195);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string((etiss_uint32)(((etiss_int32)(imm))))+"ULL;\n";cp.code()+="etiss_coverage_count(8, 1207, 1201, 1200, 1198, 1206, 1203, 1202, 1204);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint32 imm=0;static BitArrayRange R_imm_12(31, 12);imm+=R_imm_12.read(ba)<< 12;std::stringstream ss;ss<< "lui"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ lw_rd_rs1_imm

InstructionDefinition lw_rd_rs1_imm(ISA32_RV32IMACFD, "lw",(uint64_t) 0x002003,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LW\n"); cp.code()+="etiss_coverage_count(1, 12);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1592);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 load_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1565, 1564, 1561, 1560, 1558, 1563, 1562);\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int32 res = (etiss_int32)(mem_val_0);\n";cp.code()+="etiss_coverage_count(6, 1575, 1574, 1572, 1570, 1568, 1569);\n";cp.code()+="etiss_coverage_count(1, 1576);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1582, 1579, 1577, 1580, 1581);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint32)(res);\n";cp.code()+="etiss_coverage_count(6, 1591, 1587, 1586, 1584, 1590, 1588);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LW\n"); cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "lw"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"lw"  ,
(uint64_t)  0x002003,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//LW\n");cp.code()+="etiss_coverage_count(1, 12);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1592);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 load_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1565, 1564, 1561, 1560, 1558, 1563, 1562);\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int32 res = (etiss_int32)(mem_val_0);\n";cp.code()+="etiss_coverage_count(6, 1575, 1574, 1572, 1570, 1568, 1569);\n";cp.code()+="etiss_coverage_count(1, 1576);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1582, 1579, 1577, 1580, 1581);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint32)(res);\n";cp.code()+="etiss_coverage_count(6, 1591, 1587, 1586, 1584, 1590, 1588);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//LW\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "lw"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ or_rd_rs1_rs2

InstructionDefinition or_rd_rs1_rs2(ISA32_RV32IMACFD, "or",(uint64_t) 0x006033,(uint64_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//OR\n"); cp.code()+="etiss_coverage_count(1, 35);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2173);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2179, 2176, 2174, 2177, 2178);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] | *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(11, 2196, 2184, 2183, 2181, 2195, 2189, 2188, 2186, 2194, 2193, 2191);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; std::stringstream ss; ss<< "or"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"or"  ,
(uint64_t)  0x006033,
(uint64_t)  0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//OR\n");cp.code()+="etiss_coverage_count(1, 35);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2173);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2179, 2176, 2174, 2177, 2178);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] | *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(11, 2196, 2184, 2183, 2181, 2195, 2189, 2188, 2186, 2194, 2193, 2191);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "or"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ ori_rd_rs1_imm

InstructionDefinition ori_rd_rs1_imm(ISA32_RV32IMACFD, "ori",(uint64_t) 0x006013,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ORI\n"); cp.code()+="etiss_coverage_count(1, 22);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1835);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1841, 1838, 1836, 1839, 1840);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] | "+std::to_string((etiss_uint32)((((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))))+"ULL;\n";cp.code()+="etiss_coverage_count(12, 1858, 1846, 1845, 1843, 1857, 1851, 1850, 1848, 1856, 1853, 1852, 1854);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "ori"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"ori"  ,
(uint64_t)  0x006013,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//ORI\n");cp.code()+="etiss_coverage_count(1, 22);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1835);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1841, 1838, 1836, 1839, 1840);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] | "+std::to_string((etiss_uint32)((((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))))+"ULL;\n";cp.code()+="etiss_coverage_count(12, 1858, 1846, 1845, 1843, 1857, 1851, 1850, 1848, 1856, 1853, 1852, 1854);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "ori"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ sb_imm_rs1_rs2

InstructionDefinition sb_imm_rs1_rs2(ISA32_RV32IMACFD, "sb",(uint64_t) 0x000023,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SB\n"); cp.code()+="etiss_coverage_count(1, 15);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1685);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 store_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1673, 1672, 1669, 1668, 1666, 1671, 1670);\n";cp.code()+="etiss_uint8 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_int8)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(7, 1684, 1676, 1675, 1683, 1681, 1680, 1678);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, store_address, (etiss_uint8*)&mem_val_0, 1);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SB\n"); cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5; std::stringstream ss; ss<< "sb"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"sb"  ,
(uint64_t)  0x000023,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SB\n");cp.code()+="etiss_coverage_count(1, 15);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1685);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 store_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1673, 1672, 1669, 1668, 1666, 1671, 1670);\n";cp.code()+="etiss_uint8 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_int8)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(7, 1684, 1676, 1675, 1683, 1681, 1680, 1678);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, store_address, (etiss_uint8*)&mem_val_0, 1);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SB\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;std::stringstream ss;ss<< "sb"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ sh_imm_rs1_rs2

InstructionDefinition sh_imm_rs1_rs2(ISA32_RV32IMACFD, "sh",(uint64_t) 0x001023,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SH\n"); cp.code()+="etiss_coverage_count(1, 16);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1710);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 store_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1695, 1694, 1691, 1690, 1688, 1693, 1692);\n";cp.code()+="etiss_uint16 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_int16)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(9, 1709, 1701, 1699, 1697, 1698, 1708, 1706, 1705, 1703);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, store_address, (etiss_uint8*)&mem_val_0, 2);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SH\n"); cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5; std::stringstream ss; ss<< "sh"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"sh"  ,
(uint64_t)  0x001023,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SH\n");cp.code()+="etiss_coverage_count(1, 16);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1710);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 store_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1695, 1694, 1691, 1690, 1688, 1693, 1692);\n";cp.code()+="etiss_uint16 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_int16)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(9, 1709, 1701, 1699, 1697, 1698, 1708, 1706, 1705, 1703);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, store_address, (etiss_uint8*)&mem_val_0, 2);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SH\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;std::stringstream ss;ss<< "sh"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ sll_rd_rs1_rs2

InstructionDefinition sll_rd_rs1_rs2(ISA32_RV32IMACFD, "sll",(uint64_t) 0x001033,(uint64_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLL\n"); cp.code()+="etiss_coverage_count(1, 29);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2002);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2008, 2005, 2003, 2006, 2007);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] << (*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL] & 31ULL);\n";cp.code()+="etiss_coverage_count(13, 2031, 2013, 2012, 2010, 2030, 2018, 2017, 2015, 2028, 2023, 2022, 2020, 2029);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; std::stringstream ss; ss<< "sll"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"sll"  ,
(uint64_t)  0x001033,
(uint64_t)  0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLL\n");cp.code()+="etiss_coverage_count(1, 29);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2002);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2008, 2005, 2003, 2006, 2007);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] << (*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL] & 31ULL);\n";cp.code()+="etiss_coverage_count(13, 2031, 2013, 2012, 2010, 2030, 2018, 2017, 2015, 2028, 2023, 2022, 2020, 2029);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "sll"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ slli_rd_rs1_shamt

InstructionDefinition slli_rd_rs1_shamt(ISA32_RV32IMACFD, "slli",(uint64_t) 0x001013,(uint64_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLLI\n"); cp.code()+="etiss_coverage_count(1, 24);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1886);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1892, 1889, 1887, 1890, 1891);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] << "+std::to_string(shamt)+"ULL;\n";cp.code()+="etiss_coverage_count(9, 1905, 1897, 1896, 1894, 1904, 1902, 1901, 1899, 1903);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0; std::stringstream ss; ss<< "slli"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | shamt="+std::to_string(shamt)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"slli"  ,
(uint64_t)  0x001013,
(uint64_t)  0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLLI\n");cp.code()+="etiss_coverage_count(1, 24);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1886);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1892, 1889, 1887, 1890, 1891);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] << "+std::to_string(shamt)+"ULL;\n";cp.code()+="etiss_coverage_count(9, 1905, 1897, 1896, 1894, 1904, 1902, 1901, 1899, 1903);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;std::stringstream ss;ss<< "slli"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | shamt="+std::to_string(shamt)+"]");return ss.str();}   
)
static

◆ slt_rd_rs1_rs2

InstructionDefinition slt_rd_rs1_rs2(ISA32_RV32IMACFD, "slt",(uint64_t) 0x002033,(uint64_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLT\n"); cp.code()+="etiss_coverage_count(1, 30);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2032);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2038, 2035, 2033, 2036, 2037);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = ((etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) < (etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) ? (1ULL) : (0LL);\n";cp.code()+="etiss_coverage_count(16, 2060, 2043, 2042, 2040, 2059, 2056, 2049, 2048, 2047, 2045, 2055, 2054, 2053, 2051, 2057, 2058);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; std::stringstream ss; ss<< "slt"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"slt"  ,
(uint64_t)  0x002033,
(uint64_t)  0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLT\n");cp.code()+="etiss_coverage_count(1, 30);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2032);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2038, 2035, 2033, 2036, 2037);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = ((etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) < (etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) ? (1ULL) : (0LL);\n";cp.code()+="etiss_coverage_count(16, 2060, 2043, 2042, 2040, 2059, 2056, 2049, 2048, 2047, 2045, 2055, 2054, 2053, 2051, 2057, 2058);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "slt"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ slti_rd_rs1_imm

InstructionDefinition slti_rd_rs1_imm(ISA32_RV32IMACFD, "slti",(uint64_t) 0x002013,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLTI\n"); cp.code()+="etiss_coverage_count(1, 19);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1757);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1763, 1760, 1758, 1761, 1762);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (((etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) < "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL)) ? (1ULL) : (0LL);\n";cp.code()+="etiss_coverage_count(15, 1782, 1768, 1767, 1765, 1781, 1777, 1774, 1773, 1772, 1770, 1776, 1775, 1778, 1779, 1780);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "slti"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"slti"  ,
(uint64_t)  0x002013,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLTI\n");cp.code()+="etiss_coverage_count(1, 19);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1757);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1763, 1760, 1758, 1761, 1762);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (((etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) < "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL)) ? (1ULL) : (0LL);\n";cp.code()+="etiss_coverage_count(15, 1782, 1768, 1767, 1765, 1781, 1777, 1774, 1773, 1772, 1770, 1776, 1775, 1778, 1779, 1780);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "slti"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ sltiu_rd_rs1_imm

InstructionDefinition sltiu_rd_rs1_imm(ISA32_RV32IMACFD, "sltiu",(uint64_t) 0x003013,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLTIU\n"); cp.code()+="etiss_coverage_count(1, 20);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1783);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1789, 1786, 1784, 1787, 1788);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = ((*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] < "+std::to_string((etiss_uint32)((((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))))+"ULL)) ? (1ULL) : (0LL);\n";cp.code()+="etiss_coverage_count(16, 1810, 1794, 1793, 1791, 1809, 1805, 1799, 1798, 1796, 1804, 1801, 1800, 1802, 1806, 1807, 1808);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "sltiu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"sltiu"  ,
(uint64_t)  0x003013,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLTIU\n");cp.code()+="etiss_coverage_count(1, 20);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1783);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1789, 1786, 1784, 1787, 1788);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = ((*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] < "+std::to_string((etiss_uint32)((((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))))+"ULL)) ? (1ULL) : (0LL);\n";cp.code()+="etiss_coverage_count(16, 1810, 1794, 1793, 1791, 1809, 1805, 1799, 1798, 1796, 1804, 1801, 1800, 1802, 1806, 1807, 1808);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "sltiu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static

◆ sltu_rd_rs1_rs2

InstructionDefinition sltu_rd_rs1_rs2(ISA32_RV32IMACFD, "sltu",(uint64_t) 0x003033,(uint64_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLTU\n"); cp.code()+="etiss_coverage_count(1, 31);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2061);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2067, 2064, 2062, 2065, 2066);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] < *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) ? (1ULL) : (0LL);\n";cp.code()+="etiss_coverage_count(14, 2087, 2072, 2071, 2069, 2086, 2083, 2077, 2076, 2074, 2082, 2081, 2079, 2084, 2085);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; std::stringstream ss; ss<< "sltu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"sltu"  ,
(uint64_t)  0x003033,
(uint64_t)  0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SLTU\n");cp.code()+="etiss_coverage_count(1, 31);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2061);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2067, 2064, 2062, 2065, 2066);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] < *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) ? (1ULL) : (0LL);\n";cp.code()+="etiss_coverage_count(14, 2087, 2072, 2071, 2069, 2086, 2083, 2077, 2076, 2074, 2082, 2081, 2079, 2084, 2085);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "sltu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ sra_rd_rs1_rs2

InstructionDefinition sra_rd_rs1_rs2(ISA32_RV32IMACFD, "sra",(uint64_t) 0x40005033,(uint64_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRA\n"); cp.code()+="etiss_coverage_count(1, 34);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2142);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2148, 2145, 2143, 2146, 2147);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) >> (*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL] & 31ULL);\n";cp.code()+="etiss_coverage_count(14, 2172, 2153, 2152, 2150, 2171, 2159, 2158, 2157, 2155, 2169, 2164, 2163, 2161, 2170);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; std::stringstream ss; ss<< "sra"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"sra"  ,
(uint64_t)  0x40005033,
(uint64_t)  0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRA\n");cp.code()+="etiss_coverage_count(1, 34);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2142);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2148, 2145, 2143, 2146, 2147);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) >> (*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL] & 31ULL);\n";cp.code()+="etiss_coverage_count(14, 2172, 2153, 2152, 2150, 2171, 2159, 2158, 2157, 2155, 2169, 2164, 2163, 2161, 2170);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "sra"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ srai_rd_rs1_shamt

InstructionDefinition srai_rd_rs1_shamt(ISA32_RV32IMACFD, "srai",(uint64_t) 0x40005013,(uint64_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRAI\n"); cp.code()+="etiss_coverage_count(1, 26);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1932);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1938, 1935, 1933, 1936, 1937);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) >> "+std::to_string(shamt)+"ULL;\n";cp.code()+="etiss_coverage_count(10, 1953, 1943, 1942, 1940, 1952, 1950, 1948, 1947, 1945, 1951);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0; std::stringstream ss; ss<< "srai"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | shamt="+std::to_string(shamt)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"srai"  ,
(uint64_t)  0x40005013,
(uint64_t)  0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRAI\n");cp.code()+="etiss_coverage_count(1, 26);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1932);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1938, 1935, 1933, 1936, 1937);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]) >> "+std::to_string(shamt)+"ULL;\n";cp.code()+="etiss_coverage_count(10, 1953, 1943, 1942, 1940, 1952, 1950, 1948, 1947, 1945, 1951);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;std::stringstream ss;ss<< "srai"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | shamt="+std::to_string(shamt)+"]");return ss.str();}   
)
static

◆ srl_rd_rs1_rs2

InstructionDefinition srl_rd_rs1_rs2(ISA32_RV32IMACFD, "srl",(uint64_t) 0x005033,(uint64_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRL\n"); cp.code()+="etiss_coverage_count(1, 33);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2112);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2118, 2115, 2113, 2116, 2117);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] >> (*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL] & 31ULL);\n";cp.code()+="etiss_coverage_count(13, 2141, 2123, 2122, 2120, 2140, 2128, 2127, 2125, 2138, 2133, 2132, 2130, 2139);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; std::stringstream ss; ss<< "srl"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"srl"  ,
(uint64_t)  0x005033,
(uint64_t)  0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRL\n");cp.code()+="etiss_coverage_count(1, 33);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2112);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2118, 2115, 2113, 2116, 2117);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] >> (*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL] & 31ULL);\n";cp.code()+="etiss_coverage_count(13, 2141, 2123, 2122, 2120, 2140, 2128, 2127, 2125, 2138, 2133, 2132, 2130, 2139);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "srl"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ srli_rd_rs1_shamt

InstructionDefinition srli_rd_rs1_shamt(ISA32_RV32IMACFD, "srli",(uint64_t) 0x005013,(uint64_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRLI\n"); cp.code()+="etiss_coverage_count(1, 25);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1909);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1915, 1912, 1910, 1913, 1914);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] >> "+std::to_string(shamt)+"ULL;\n";cp.code()+="etiss_coverage_count(9, 1928, 1920, 1919, 1917, 1927, 1925, 1924, 1922, 1926);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0; std::stringstream ss; ss<< "srli"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | shamt="+std::to_string(shamt)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"srli"  ,
(uint64_t)  0x005013,
(uint64_t)  0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SRLI\n");cp.code()+="etiss_coverage_count(1, 25);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1909);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1915, 1912, 1910, 1913, 1914);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] >> "+std::to_string(shamt)+"ULL;\n";cp.code()+="etiss_coverage_count(9, 1928, 1920, 1919, 1917, 1927, 1925, 1924, 1922, 1926);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 shamt=0;static BitArrayRange R_shamt_0(24, 20);shamt+=R_shamt_0.read(ba)<< 0;std::stringstream ss;ss<< "srli"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | shamt="+std::to_string(shamt)+"]");return ss.str();}   
)
static

◆ sub_rd_rs1_rs2

InstructionDefinition sub_rd_rs1_rs2(ISA32_RV32IMACFD, "sub",(uint64_t) 0x40000033,(uint64_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SUB\n"); cp.code()+="etiss_coverage_count(1, 28);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1978);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1984, 1981, 1979, 1982, 1983);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] - *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(11, 2001, 1989, 1988, 1986, 2000, 1994, 1993, 1991, 1999, 1998, 1996);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; std::stringstream ss; ss<< "sub"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"sub"  ,
(uint64_t)  0x40000033,
(uint64_t)  0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SUB\n");cp.code()+="etiss_coverage_count(1, 28);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1978);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1984, 1981, 1979, 1982, 1983);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] - *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(11, 2001, 1989, 1988, 1986, 2000, 1994, 1993, 1991, 1999, 1998, 1996);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "sub"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ sw_imm_rs1_rs2

InstructionDefinition sw_imm_rs1_rs2(ISA32_RV32IMACFD, "sw",(uint64_t) 0x002023,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SW\n"); cp.code()+="etiss_coverage_count(1, 17);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1735);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 store_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1720, 1719, 1716, 1715, 1713, 1718, 1717);\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(9, 1734, 1726, 1724, 1722, 1723, 1733, 1731, 1730, 1728);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, store_address, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SW\n"); cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n"; } return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5; std::stringstream ss; ss<< "sw"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"sw"  ,
(uint64_t)  0x002023,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//SW\n");cp.code()+="etiss_coverage_count(1, 17);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 1735);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 store_address = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 1720, 1719, 1716, 1715, 1713, 1718, 1717);\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_int32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(9, 1734, 1726, 1724, 1722, 1723, 1733, 1731, 1730, 1728);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, store_address, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//SW\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;std::stringstream ss;ss<< "sw"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ xor_rd_rs1_rs2

InstructionDefinition xor_rd_rs1_rs2(ISA32_RV32IMACFD, "xor",(uint64_t) 0x004033,(uint64_t) 0xfe00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//XOR\n"); cp.code()+="etiss_coverage_count(1, 32);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2088);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2094, 2091, 2089, 2092, 2093);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] ^ *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(11, 2111, 2099, 2098, 2096, 2110, 2104, 2103, 2101, 2109, 2108, 2106);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0; std::stringstream ss; ss<< "xor"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"xor"  ,
(uint64_t)  0x004033,
(uint64_t)  0xfe00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//XOR\n");cp.code()+="etiss_coverage_count(1, 32);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2088);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2094, 2091, 2089, 2092, 2093);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] ^ *((RV32IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(11, 2111, 2099, 2098, 2096, 2110, 2104, 2103, 2101, 2109, 2108, 2106);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "xor"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}   
)
static

◆ xori_rd_rs1_imm

InstructionDefinition xori_rd_rs1_imm(ISA32_RV32IMACFD, "xori",(uint64_t) 0x004013,(uint64_t) 0x00707f,[](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//XORI\n"); cp.code()+="etiss_coverage_count(1, 21);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1811);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1817, 1814, 1812, 1815, 1816);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] ^ "+std::to_string((etiss_uint32)((((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))))+"ULL;\n";cp.code()+="etiss_coverage_count(12, 1834, 1822, 1821, 1819, 1833, 1827, 1826, 1824, 1832, 1829, 1828, 1830);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n"; cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0,[](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0; std::stringstream ss; ss<< "xori"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]"); return ss.str();}) ( ISA32_RV32IMACFD  ,
"xori"  ,
(uint64_t)  0x004013,
(uint64_t)  0x00707f,
[] (BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//XORI\n");cp.code()+="etiss_coverage_count(1, 21);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 1811);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 1817, 1814, 1812, 1815, 1816);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] ^ "+std::to_string((etiss_uint32)((((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))))+"ULL;\n";cp.code()+="etiss_coverage_count(12, 1834, 1822, 1821, 1819, 1833, 1827, 1826, 1824, 1832, 1829, 1828, 1830);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}  ,
0  ,
[] (BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "xori"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}   
)
static
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