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| static InstructionDefinition | fld_rd_rs1_imm (ISA32_RV32IMACFD, "fld",(uint64_t) 0x003007,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FLD\n");cp.code()+="etiss_coverage_count(1, 118);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 5048);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 offs = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 5016, 5015, 5011, 5010, 5008, 5014, 5012);\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_uint64 res = (etiss_uint64)(mem_val_0);\n";cp.code()+="etiss_coverage_count(6, 5026, 5025, 5023, 5021, 5019, 5020);\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(4, 5035, 5033, 5032, 5034);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//FLD\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_0(31, 20);imm+=R_imm_0.read(ba)<< 0;std::stringstream ss;ss<< "fld"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | imm="+std::to_string(imm)+"]");return ss.str();}) |
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| static InstructionDefinition | fsd_imm_rs1_rs2 (ISA32_RV32IMACFD, "fsd",(uint64_t) 0x003027,(uint64_t) 0x00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FSD\n");cp.code()+="etiss_coverage_count(1, 119);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 5072);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 offs = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(7, 5059, 5058, 5054, 5053, 5051, 5057, 5055);\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs2)+"ULL]);\n";cp.code()+="etiss_coverage_count(8, 5071, 5065, 5063, 5061, 5062, 5070, 5068, 5067);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//FSD\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_0(11, 7);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;static BitArrayRange R_imm_5(31, 25);imm+=R_imm_5.read(ba)<< 5;std::stringstream ss;ss<< "fsd"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}) |
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| static InstructionDefinition | fmadd_d_rd_rm_rs1_rs2_rs3 (ISA32_RV32IMACFD, "fmadd_d",(uint64_t) 0x2000043,(uint64_t) 0x600007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rs3=0;static BitArrayRange R_rs3_0(31, 27);rs3+=R_rs3_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FMADD_D\n");cp.code()+="etiss_coverage_count(1, 120);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 5130);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = fmadd_d((etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]), (etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs2)+"ULL]), (etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs3)+"ULL]), 0LL, RV32IMACFD_get_rm(cpu, system, plugin_pointers, "+std::to_string(rm)+"ULL));\n";cp.code()+="etiss_coverage_count(14, 5093, 5092, 5078, 5076, 5075, 5083, 5081, 5080, 5088, 5086, 5085, 5089, 5091, 5090);\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(4, 5102, 5100, 5099, 5101);\n";cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="etiss_coverage_count(2, 5117, 5116);\n";cp.code()+="((RV32IMACFD*)cpu)->FCSR = (((RV32IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="etiss_coverage_count(9, 5129, 5118, 5128, 5122, 5119, 5123, 5126, 5124, 5127);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rs3=0;static BitArrayRange R_rs3_0(31, 27);rs3+=R_rs3_0.read(ba)<< 0;std::stringstream ss;ss<< "fmadd_d"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+" | rs3="+std::to_string(rs3)+"]");return ss.str();}) |
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| static InstructionDefinition | fmsub_d_rd_rm_rs1_rs2_rs3 (ISA32_RV32IMACFD, "fmsub_d",(uint64_t) 0x2000047,(uint64_t) 0x600007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rs3=0;static BitArrayRange R_rs3_0(31, 27);rs3+=R_rs3_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FMSUB_D\n");cp.code()+="etiss_coverage_count(1, 121);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 5188);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = fmadd_d((etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]), (etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs2)+"ULL]), (etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs3)+"ULL]), 1ULL, RV32IMACFD_get_rm(cpu, system, plugin_pointers, "+std::to_string(rm)+"ULL));\n";cp.code()+="etiss_coverage_count(14, 5151, 5150, 5136, 5134, 5133, 5141, 5139, 5138, 5146, 5144, 5143, 5147, 5149, 5148);\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(4, 5160, 5158, 5157, 5159);\n";cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="etiss_coverage_count(2, 5175, 5174);\n";cp.code()+="((RV32IMACFD*)cpu)->FCSR = (((RV32IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="etiss_coverage_count(9, 5187, 5176, 5186, 5180, 5177, 5181, 5184, 5182, 5185);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rs3=0;static BitArrayRange R_rs3_0(31, 27);rs3+=R_rs3_0.read(ba)<< 0;std::stringstream ss;ss<< "fmsub_d"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+" | rs3="+std::to_string(rs3)+"]");return ss.str();}) |
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| static InstructionDefinition | fnmadd_d_rd_rm_rs1_rs2_rs3 (ISA32_RV32IMACFD, "fnmadd_d",(uint64_t) 0x200004f,(uint64_t) 0x600007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rs3=0;static BitArrayRange R_rs3_0(31, 27);rs3+=R_rs3_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FNMADD_D\n");cp.code()+="etiss_coverage_count(1, 122);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 5246);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = fmadd_d((etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]), (etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs2)+"ULL]), (etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs3)+"ULL]), 2ULL, RV32IMACFD_get_rm(cpu, system, plugin_pointers, "+std::to_string(rm)+"ULL));\n";cp.code()+="etiss_coverage_count(14, 5209, 5208, 5194, 5192, 5191, 5199, 5197, 5196, 5204, 5202, 5201, 5205, 5207, 5206);\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(4, 5218, 5216, 5215, 5217);\n";cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="etiss_coverage_count(2, 5233, 5232);\n";cp.code()+="((RV32IMACFD*)cpu)->FCSR = (((RV32IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="etiss_coverage_count(9, 5245, 5234, 5244, 5238, 5235, 5239, 5242, 5240, 5243);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rs3=0;static BitArrayRange R_rs3_0(31, 27);rs3+=R_rs3_0.read(ba)<< 0;std::stringstream ss;ss<< "fnmadd_d"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+" | rs3="+std::to_string(rs3)+"]");return ss.str();}) |
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| static InstructionDefinition | fnmsub_d_rd_rm_rs1_rs2_rs3 (ISA32_RV32IMACFD, "fnmsub_d",(uint64_t) 0x200004b,(uint64_t) 0x600007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rs3=0;static BitArrayRange R_rs3_0(31, 27);rs3+=R_rs3_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FNMSUB_D\n");cp.code()+="etiss_coverage_count(1, 123);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 5304);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = fmadd_d((etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]), (etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs2)+"ULL]), (etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs3)+"ULL]), 3ULL, RV32IMACFD_get_rm(cpu, system, plugin_pointers, "+std::to_string(rm)+"ULL));\n";cp.code()+="etiss_coverage_count(14, 5267, 5266, 5252, 5250, 5249, 5257, 5255, 5254, 5262, 5260, 5259, 5263, 5265, 5264);\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(4, 5276, 5274, 5273, 5275);\n";cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="etiss_coverage_count(2, 5291, 5290);\n";cp.code()+="((RV32IMACFD*)cpu)->FCSR = (((RV32IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="etiss_coverage_count(9, 5303, 5292, 5302, 5296, 5293, 5297, 5300, 5298, 5301);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rs3=0;static BitArrayRange R_rs3_0(31, 27);rs3+=R_rs3_0.read(ba)<< 0;std::stringstream ss;ss<< "fnmsub_d"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+" | rs3="+std::to_string(rs3)+"]");return ss.str();}) |
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| static InstructionDefinition | fadd_d_rd_rm_rs1_rs2 (ISA32_RV32IMACFD, "fadd_d",(uint64_t) 0x2000053,(uint64_t) 0xfe00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FADD_D\n");cp.code()+="etiss_coverage_count(1, 124);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 5356);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = fadd_d((etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]), (etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs2)+"ULL]), RV32IMACFD_get_rm(cpu, system, plugin_pointers, "+std::to_string(rm)+"ULL));\n";cp.code()+="etiss_coverage_count(10, 5319, 5318, 5310, 5308, 5307, 5315, 5313, 5312, 5317, 5316);\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(4, 5328, 5326, 5325, 5327);\n";cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="etiss_coverage_count(2, 5343, 5342);\n";cp.code()+="((RV32IMACFD*)cpu)->FCSR = (((RV32IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="etiss_coverage_count(9, 5355, 5344, 5354, 5348, 5345, 5349, 5352, 5350, 5353);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "fadd_d"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}) |
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| static InstructionDefinition | fsub_d_rd_rm_rs1_rs2 (ISA32_RV32IMACFD, "fsub_d",(uint64_t) 0xa000053,(uint64_t) 0xfe00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FSUB_D\n");cp.code()+="etiss_coverage_count(1, 125);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 5408);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = fsub_d((etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]), (etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs2)+"ULL]), RV32IMACFD_get_rm(cpu, system, plugin_pointers, "+std::to_string(rm)+"ULL));\n";cp.code()+="etiss_coverage_count(10, 5371, 5370, 5362, 5360, 5359, 5367, 5365, 5364, 5369, 5368);\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(4, 5380, 5378, 5377, 5379);\n";cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="etiss_coverage_count(2, 5395, 5394);\n";cp.code()+="((RV32IMACFD*)cpu)->FCSR = (((RV32IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="etiss_coverage_count(9, 5407, 5396, 5406, 5400, 5397, 5401, 5404, 5402, 5405);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "fsub_d"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}) |
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| static InstructionDefinition | fmul_d_rd_rm_rs1_rs2 (ISA32_RV32IMACFD, "fmul_d",(uint64_t) 0x12000053,(uint64_t) 0xfe00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FMUL_D\n");cp.code()+="etiss_coverage_count(1, 126);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 5460);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = fmul_d((etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]), (etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs2)+"ULL]), RV32IMACFD_get_rm(cpu, system, plugin_pointers, "+std::to_string(rm)+"ULL));\n";cp.code()+="etiss_coverage_count(10, 5423, 5422, 5414, 5412, 5411, 5419, 5417, 5416, 5421, 5420);\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(4, 5432, 5430, 5429, 5431);\n";cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="etiss_coverage_count(2, 5447, 5446);\n";cp.code()+="((RV32IMACFD*)cpu)->FCSR = (((RV32IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="etiss_coverage_count(9, 5459, 5448, 5458, 5452, 5449, 5453, 5456, 5454, 5457);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "fmul_d"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}) |
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| static InstructionDefinition | fdiv_d_rd_rm_rs1_rs2 (ISA32_RV32IMACFD, "fdiv_d",(uint64_t) 0x1a000053,(uint64_t) 0xfe00007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FDIV_D\n");cp.code()+="etiss_coverage_count(1, 127);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 5512);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = fdiv_d((etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]), (etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs2)+"ULL]), RV32IMACFD_get_rm(cpu, system, plugin_pointers, "+std::to_string(rm)+"ULL));\n";cp.code()+="etiss_coverage_count(10, 5475, 5474, 5466, 5464, 5463, 5471, 5469, 5468, 5473, 5472);\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(4, 5484, 5482, 5481, 5483);\n";cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="etiss_coverage_count(2, 5499, 5498);\n";cp.code()+="((RV32IMACFD*)cpu)->FCSR = (((RV32IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="etiss_coverage_count(9, 5511, 5500, 5510, 5504, 5501, 5505, 5508, 5506, 5509);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "fdiv_d"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}) |
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| static InstructionDefinition | fsqrt_d_rd_rm_rs1 (ISA32_RV32IMACFD, "fsqrt_d",(uint64_t) 0x5a000053,(uint64_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FSQRT_D\n");cp.code()+="etiss_coverage_count(1, 128);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 5559);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = fsqrt_d((etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]), RV32IMACFD_get_rm(cpu, system, plugin_pointers, "+std::to_string(rm)+"ULL));\n";cp.code()+="etiss_coverage_count(7, 5522, 5521, 5518, 5516, 5515, 5520, 5519);\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(4, 5531, 5529, 5528, 5530);\n";cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="etiss_coverage_count(2, 5546, 5545);\n";cp.code()+="((RV32IMACFD*)cpu)->FCSR = (((RV32IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="etiss_coverage_count(9, 5558, 5547, 5557, 5551, 5548, 5552, 5555, 5553, 5556);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;std::stringstream ss;ss<< "fsqrt_d"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();}) |
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| static InstructionDefinition | fsgnj_d_rd_rs1_rs2 (ISA32_RV32IMACFD, "fsgnj_d",(uint64_t) 0x22000053,(uint64_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FSGNJ_D\n");cp.code()+="etiss_coverage_count(1, 129);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 5596);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = ((((((((RV32IMACFD*)cpu)->F["+std::to_string(rs2)+"ULL]) >> (63ULL)) & 0x1ULL)) << 63) | (((((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]) & 0x7fffffffffffffffULL)));\n";cp.code()+="etiss_coverage_count(12, 5574, 5573, 5566, 5563, 5562, 5564, 5565, 5572, 5569, 5568, 5570, 5571);\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(4, 5583, 5581, 5580, 5582);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "fsgnj_d"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}) |
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| static InstructionDefinition | fsgnjn_d_rd_rs1_rs2 (ISA32_RV32IMACFD, "fsgnjn_d",(uint64_t) 0x22001053,(uint64_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FSGNJN_D\n");cp.code()+="etiss_coverage_count(1, 130);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 5634);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = (((~((((((RV32IMACFD*)cpu)->F["+std::to_string(rs2)+"ULL]) >> (63ULL)) & 0x1ULL))) << 63) | (((((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]) & 0x7fffffffffffffffULL)));\n";cp.code()+="etiss_coverage_count(13, 5612, 5611, 5604, 5603, 5600, 5599, 5601, 5602, 5610, 5607, 5606, 5608, 5609);\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(4, 5621, 5619, 5618, 5620);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "fsgnjn_d"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}) |
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| static InstructionDefinition | fsgnjx_d_rd_rs1_rs2 (ISA32_RV32IMACFD, "fsgnjx_d",(uint64_t) 0x22002053,(uint64_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FSGNJX_D\n");cp.code()+="etiss_coverage_count(1, 131);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 5675);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = (etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]) ^ ((etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs2)+"ULL]) & 9223372036854775808ULL);\n";cp.code()+="etiss_coverage_count(10, 5653, 5652, 5640, 5638, 5637, 5650, 5645, 5643, 5642, 5651);\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(4, 5662, 5660, 5659, 5661);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "fsgnjx_d"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}) |
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| static InstructionDefinition | fmin_d_rd_rs1_rs2 (ISA32_RV32IMACFD, "fmin_d",(uint64_t) 0x2a000053,(uint64_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FMIN_D\n");cp.code()+="etiss_coverage_count(1, 132);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 5726);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = fsel_d((etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]), (etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs2)+"ULL]), 0LL);\n";cp.code()+="etiss_coverage_count(9, 5689, 5688, 5681, 5679, 5678, 5686, 5684, 5683, 5687);\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(4, 5698, 5696, 5695, 5697);\n";cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="etiss_coverage_count(2, 5713, 5712);\n";cp.code()+="((RV32IMACFD*)cpu)->FCSR = (((RV32IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="etiss_coverage_count(9, 5725, 5714, 5724, 5718, 5715, 5719, 5722, 5720, 5723);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "fmin_d"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}) |
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| static InstructionDefinition | fmax_d_rd_rs1_rs2 (ISA32_RV32IMACFD, "fmax_d",(uint64_t) 0x2a001053,(uint64_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FMAX_D\n");cp.code()+="etiss_coverage_count(1, 133);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 5777);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = fsel_d((etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]), (etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs2)+"ULL]), 1ULL);\n";cp.code()+="etiss_coverage_count(9, 5740, 5739, 5732, 5730, 5729, 5737, 5735, 5734, 5738);\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(4, 5749, 5747, 5746, 5748);\n";cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="etiss_coverage_count(2, 5764, 5763);\n";cp.code()+="((RV32IMACFD*)cpu)->FCSR = (((RV32IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="etiss_coverage_count(9, 5776, 5765, 5775, 5769, 5766, 5770, 5773, 5771, 5774);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "fmax_d"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}) |
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| static InstructionDefinition | fcvt_s_d_rd_rm_rs1 (ISA32_RV32IMACFD, "fcvt_s_d",(uint64_t) 0x40100053,(uint64_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FCVT_S_D\n");cp.code()+="etiss_coverage_count(1, 134);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 5796);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 res = fconv_d2f(((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL], "+std::to_string(rm)+"ULL);\n";cp.code()+="etiss_coverage_count(5, 5784, 5783, 5781, 5780, 5782);\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = -4294967296LL + res;\n";cp.code()+="etiss_coverage_count(5, 5795, 5787, 5786, 5794, 5793);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;std::stringstream ss;ss<< "fcvt_s_d"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();}) |
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| static InstructionDefinition | fcvt_d_s_rd_rm_rs1 (ISA32_RV32IMACFD, "fcvt_d_s",(uint64_t) 0x42000053,(uint64_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FCVT_D_S\n");cp.code()+="etiss_coverage_count(1, 135);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 5827);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = fconv_f2d((etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]), "+std::to_string(rm)+"ULL);\n";cp.code()+="etiss_coverage_count(6, 5804, 5803, 5801, 5800, 5799, 5802);\n";{ cp.code()+="etiss_coverage_count(1, 5814);\n";cp.code()+="{ // block\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(4, 5813, 5811, 5810, 5812);\n";cp.code()+="} // block\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;std::stringstream ss;ss<< "fcvt_d_s"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();}) |
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| static InstructionDefinition | feq_d_rd_rs1_rs2 (ISA32_RV32IMACFD, "feq_d",(uint64_t) 0xa2002053,(uint64_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FEQ_D\n");cp.code()+="etiss_coverage_count(1, 136);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 5893);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = 0LL;\n";cp.code()+="etiss_coverage_count(2, 5830, 5829);\n";cp.code()+="res = fcmp_d(((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL], ((RV32IMACFD*)cpu)->F["+std::to_string(rs2)+"ULL], 0LL);\n";cp.code()+="etiss_coverage_count(8, 5844, 5835, 5843, 5838, 5837, 5841, 5840, 5842);\n";cp.code()+="etiss_coverage_count(1, 5864);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 5870, 5867, 5865, 5868, 5869);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(5, 5877, 5875, 5874, 5872, 5876);\n";} cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="etiss_coverage_count(2, 5880, 5879);\n";cp.code()+="((RV32IMACFD*)cpu)->FCSR = (((RV32IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="etiss_coverage_count(9, 5892, 5881, 5891, 5885, 5882, 5886, 5889, 5887, 5890);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "feq_d"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}) |
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| static InstructionDefinition | flt_d_rd_rs1_rs2 (ISA32_RV32IMACFD, "flt_d",(uint64_t) 0xa2001053,(uint64_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FLT_D\n");cp.code()+="etiss_coverage_count(1, 137);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 5959);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = 0LL;\n";cp.code()+="etiss_coverage_count(2, 5896, 5895);\n";cp.code()+="res = fcmp_d(((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL], ((RV32IMACFD*)cpu)->F["+std::to_string(rs2)+"ULL], 2ULL);\n";cp.code()+="etiss_coverage_count(8, 5910, 5901, 5909, 5904, 5903, 5907, 5906, 5908);\n";cp.code()+="etiss_coverage_count(1, 5930);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 5936, 5933, 5931, 5934, 5935);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(5, 5943, 5941, 5940, 5938, 5942);\n";} cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="etiss_coverage_count(2, 5946, 5945);\n";cp.code()+="((RV32IMACFD*)cpu)->FCSR = (((RV32IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="etiss_coverage_count(9, 5958, 5947, 5957, 5951, 5948, 5952, 5955, 5953, 5956);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "flt_d"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}) |
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| static InstructionDefinition | fle_d_rd_rs1_rs2 (ISA32_RV32IMACFD, "fle_d",(uint64_t) 0xa2000053,(uint64_t) 0xfe00707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FLE_D\n");cp.code()+="etiss_coverage_count(1, 138);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6025);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = 0LL;\n";cp.code()+="etiss_coverage_count(2, 5962, 5961);\n";cp.code()+="res = fcmp_d(((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL], ((RV32IMACFD*)cpu)->F["+std::to_string(rs2)+"ULL], 1ULL);\n";cp.code()+="etiss_coverage_count(8, 5976, 5967, 5975, 5970, 5969, 5973, 5972, 5974);\n";cp.code()+="etiss_coverage_count(1, 5996);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 6002, 5999, 5997, 6000, 6001);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(5, 6009, 6007, 6006, 6004, 6008);\n";} cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="etiss_coverage_count(2, 6012, 6011);\n";cp.code()+="((RV32IMACFD*)cpu)->FCSR = (((RV32IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="etiss_coverage_count(9, 6024, 6013, 6023, 6017, 6014, 6018, 6021, 6019, 6022);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;std::stringstream ss;ss<< "fle_d"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+"]");return ss.str();}) |
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| static InstructionDefinition | fclass_d_rd_rs1 (ISA32_RV32IMACFD, "fclass_d",(uint64_t) 0xe2001053,(uint64_t) 0xfff0707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FCLASS_D\n");cp.code()+="etiss_coverage_count(1, 139);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6038);\n";cp.code()+="{ // block\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = fclass_d((etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL]));\n";cp.code()+="etiss_coverage_count(8, 6037, 6030, 6029, 6027, 6036, 6035, 6033, 6032);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;std::stringstream ss;ss<< "fclass_d"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+"]");return ss.str();}) |
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| static InstructionDefinition | fcvt_w_d_rd_rm_rs1 (ISA32_RV32IMACFD, "fcvt_w_d",(uint64_t) 0xc2000053,(uint64_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FCVT_W_D\n");cp.code()+="etiss_coverage_count(1, 140);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6096);\n";cp.code()+="{ // block\n";cp.code()+="etiss_int32 res = 0LL;\n";cp.code()+="etiss_coverage_count(2, 6041, 6040);\n";cp.code()+="res = fcvt_64_32(((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL], 0LL, "+std::to_string(rm)+"ULL);\n";cp.code()+="etiss_coverage_count(7, 6053, 6046, 6052, 6049, 6048, 6050, 6051);\n";cp.code()+="etiss_coverage_count(1, 6067);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 6073, 6070, 6068, 6071, 6072);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(5, 6080, 6078, 6077, 6075, 6079);\n";} cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="etiss_coverage_count(2, 6083, 6082);\n";cp.code()+="((RV32IMACFD*)cpu)->FCSR = (((RV32IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="etiss_coverage_count(9, 6095, 6084, 6094, 6088, 6085, 6089, 6092, 6090, 6093);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;std::stringstream ss;ss<< "fcvt_w_d"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();}) |
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| static InstructionDefinition | fcvt_wu_d_rd_rm_rs1 (ISA32_RV32IMACFD, "fcvt_wu_d",(uint64_t) 0xc2100053,(uint64_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FCVT_WU_D\n");cp.code()+="etiss_coverage_count(1, 141);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6157);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 res = 0LL;\n";cp.code()+="etiss_coverage_count(2, 6099, 6098);\n";cp.code()+="res = fcvt_64_32(((RV32IMACFD*)cpu)->F["+std::to_string(rs1)+"ULL], 1ULL, "+std::to_string(rm)+"ULL);\n";cp.code()+="etiss_coverage_count(7, 6111, 6104, 6110, 6107, 6106, 6108, 6109);\n";cp.code()+="etiss_coverage_count(1, 6125);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 6131, 6128, 6126, 6129, 6130);\n";cp.code()+="*((RV32IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_uint64)((etiss_int32)(res));\n";cp.code()+="etiss_coverage_count(7, 6141, 6136, 6135, 6133, 6140, 6138, 6137);\n";} cp.code()+="etiss_uint32 flags = fget_flags();\n";cp.code()+="etiss_coverage_count(2, 6144, 6143);\n";cp.code()+="((RV32IMACFD*)cpu)->FCSR = (((RV32IMACFD*)cpu)->FCSR & -32LL) | (flags & 31ULL);\n";cp.code()+="etiss_coverage_count(9, 6156, 6145, 6155, 6149, 6146, 6150, 6153, 6151, 6154);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;std::stringstream ss;ss<< "fcvt_wu_d"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();}) |
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| static InstructionDefinition | fcvt_d_w_rd_rm_rs1 (ISA32_RV32IMACFD, "fcvt_d_w",(uint64_t) 0xd2000053,(uint64_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FCVT_D_W\n");cp.code()+="etiss_coverage_count(1, 142);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6190);\n";cp.code()+="{ // block\n";cp.code()+="etiss_int64 res = fcvt_32_64((etiss_uint32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]), 2ULL, "+std::to_string(rm)+"ULL);\n";cp.code()+="etiss_coverage_count(8, 6168, 6167, 6164, 6163, 6162, 6160, 6165, 6166);\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(4, 6177, 6175, 6174, 6176);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;std::stringstream ss;ss<< "fcvt_d_w"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();}) |
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| static InstructionDefinition | fcvt_d_wu_rd_rm_rs1 (ISA32_RV32IMACFD, "fcvt_d_wu",(uint64_t) 0xd2100053,(uint64_t) 0xfff0007f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//FCVT_D_WU\n");cp.code()+="etiss_coverage_count(1, 143);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint32)((ic.current_address_+4)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6223);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 res = fcvt_32_64((etiss_uint32)(*((RV32IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL]), 3ULL, "+std::to_string(rm)+"ULL);\n";cp.code()+="etiss_coverage_count(8, 6201, 6200, 6197, 6196, 6195, 6193, 6198, 6199);\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(4, 6210, 6208, 6207, 6209);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rm=0;static BitArrayRange R_rm_0(14, 12);rm+=R_rm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;std::stringstream ss;ss<< "fcvt_d_wu"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rm="+std::to_string(rm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();}) |
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