ETISS 0.8.0
Extendable Translating Instruction Set Simulator (version 0.8.0)
CPUStateCopyHelper.h
Go to the documentation of this file.
1 /*
2 
3  @copyright
4 
5  <pre>
6 
7  Copyright 2018 Infineon Technologies AG
8 
9  This file is part of ETISS tool, see <https://github.com/tum-ei-eda/etiss>.
10 
11  The initial version of this software has been created with the funding support by the German Federal
12  Ministry of Education and Research (BMBF) in the project EffektiV under grant 01IS13022.
13 
14  Redistribution and use in source and binary forms, with or without modification, are permitted
15  provided that the following conditions are met:
16 
17  1. Redistributions of source code must retain the above copyright notice, this list of conditions and
18  the following disclaimer.
19 
20  2. Redistributions in binary form must reproduce the above copyright notice, this list of conditions
21  and the following disclaimer in the documentation and/or other materials provided with the distribution.
22 
23  3. Neither the name of the copyright holder nor the names of its contributors may be used to endorse
24  or promote products derived from this software without specific prior written permission.
25 
26  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
27  WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
28  PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY
29  DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
30  PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31  HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
32  NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33  POSSIBILITY OF SUCH DAMAGE.
34 
35  </pre>
36 
37  @author Chair of Electronic Design Automation, TUM
38 
39  @version 0.1
40 
41 */
42 
43 #include <vector>
44 
45 #include "etiss/Misc.h"
46 
47 namespace etiss
48 {
49 namespace fault
50 {
51 
53 {
54  public:
55  etiss_del_como(CPUStateCopyHelper) private : std::list<std::pair<uint8_t *, size_t>> instructions_;
56  std::map<std::string, std::function<std::pair<uint8_t *, size_t>(std::string, ETISS_CPU *)>>
58  public:
59  void registerAllocator(std::string type,
60  std::function<std::pair<uint8_t *, size_t>(std::string, ETISS_CPU *)> allocator);
61  void
62 };
63 
64 } // namespace fault
65 } // namespace etiss
general configuration and logging
#define etiss_del_como(CLASS)
Definition: Misc.h:94
void registerAllocator(std::string type, std::function< std::pair< uint8_t *, size_t >(std::string, ETISS_CPU *)> allocator)
etiss_del_como(CPUStateCopyHelper) private std::map< std::string, std::function< std::pair< uint8_t *, size_t >std::string, ETISS_CPU *)> > allocatorMap_
type -> std::pair<uint8_t*,size_t>(*func)(std::string registername,ETISS_CPU * cpu)
Page Table Entry (PTE) defines the composition of Page Frame Number (PFN) and relavant flags.
Definition: Benchmark.h:53
basic cpu state structure needed for execution of any cpu architecture.
Definition: CPU.h:89