ETISS 0.11.2
ExtendableTranslatingInstructionSetSimulator(version0.11.2)
Loading...
Searching...
No Matches
RV32IMACFD.h
Go to the documentation of this file.
1
7#ifndef ETISS_RV32IMACFDArch_RV32IMACFD_H_
8#define ETISS_RV32IMACFDArch_RV32IMACFD_H_
9#include <stdio.h>
10#include "etiss/jit/CPU.h"
11
12#ifdef __cplusplus
13extern "C"
14{
15#endif
16#pragma pack(push, 1)
17 struct RV32IMACFD
18 {
19 ETISS_CPU cpu; // original cpu struct must be defined as the first field of the new structure.
20 // This allows to cast X * to ETISS_CPU * and vice versa
53 etiss_uint32 *X[32];
88 etiss_uint32 *CSR[4096];
122 etiss_uint64 *F[32];
125 };
126
127#pragma pack(pop) // undo changes
128 // convenient use of X instead of struct X in generated C code
129 typedef struct RV32IMACFD RV32IMACFD;
130#ifdef __cplusplus
131} // extern "C"
132#endif
133#endif
uint64_t etiss_uint64
Definition types.h:58
uint32_t etiss_uint32
Definition types.h:55
uint8_t etiss_uint8
Definition types.h:49
basic cpu state structure needed for execution of any cpu architecture.
Definition CPU.h:51
Generated on Fri, 19 Jun 2026 08:11:15 +0000.
Definition RV32IMACFD.h:18
etiss_uint32 MTVEC
Definition RV32IMACFD.h:82
etiss_uint32 MIP
Definition RV32IMACFD.h:64
etiss_uint64 FT5
Definition RV32IMACFD.h:95
etiss_uint32 MISA
Definition RV32IMACFD.h:79
etiss_uint64 FS3
Definition RV32IMACFD.h:109
etiss_uint32 MSTATUS
Definition RV32IMACFD.h:62
etiss_uint64 FT11
Definition RV32IMACFD.h:121
etiss_uint64 FS0
Definition RV32IMACFD.h:98
etiss_uint32 MCYCLEH
Definition RV32IMACFD.h:68
etiss_uint64 FT4
Definition RV32IMACFD.h:94
etiss_uint32 RES_ADDR
Definition RV32IMACFD.h:124
etiss_uint32 S11
Definition RV32IMACFD.h:48
etiss_uint32 A5
Definition RV32IMACFD.h:36
etiss_uint64 FT2
Definition RV32IMACFD.h:92
etiss_uint32 S4
Definition RV32IMACFD.h:41
etiss_uint32 MVENDORID
Definition RV32IMACFD.h:75
etiss_uint64 FS9
Definition RV32IMACFD.h:115
etiss_uint64 FA5
Definition RV32IMACFD.h:105
etiss_uint32 MEPC
Definition RV32IMACFD.h:85
etiss_uint64 FA0
Definition RV32IMACFD.h:100
etiss_uint32 * X[32]
Definition RV32IMACFD.h:53
etiss_uint32 MARCHID
Definition RV32IMACFD.h:76
etiss_uint32 A7
Definition RV32IMACFD.h:38
etiss_uint32 T1
Definition RV32IMACFD.h:27
etiss_uint32 T4
Definition RV32IMACFD.h:50
etiss_uint32 S0
Definition RV32IMACFD.h:29
etiss_uint32 * CSR[4096]
Definition RV32IMACFD.h:88
etiss_uint32 SP
Definition RV32IMACFD.h:23
etiss_uint64 FA1
Definition RV32IMACFD.h:101
etiss_uint32 FRM
Definition RV32IMACFD.h:61
etiss_uint64 FS11
Definition RV32IMACFD.h:117
etiss_uint64 FS2
Definition RV32IMACFD.h:108
etiss_uint64 FS10
Definition RV32IMACFD.h:116
etiss_uint64 FA7
Definition RV32IMACFD.h:107
etiss_uint64 FT8
Definition RV32IMACFD.h:118
etiss_uint32 FFLAGS
Definition RV32IMACFD.h:60
etiss_uint32 CYCLE
Definition RV32IMACFD.h:65
etiss_uint32 S1
Definition RV32IMACFD.h:30
etiss_uint32 TIME
Definition RV32IMACFD.h:69
etiss_uint32 TIMEH
Definition RV32IMACFD.h:70
etiss_uint32 A3
Definition RV32IMACFD.h:34
etiss_uint64 FA2
Definition RV32IMACFD.h:102
etiss_uint32 ins_CSR[4096]
Definition RV32IMACFD.h:89
etiss_uint32 INSTRETH
Definition RV32IMACFD.h:72
etiss_uint64 FS4
Definition RV32IMACFD.h:110
etiss_uint32 A2
Definition RV32IMACFD.h:33
etiss_uint64 FT3
Definition RV32IMACFD.h:93
etiss_uint32 MCAUSE
Definition RV32IMACFD.h:86
etiss_uint32 T5
Definition RV32IMACFD.h:51
etiss_uint32 MCYCLE
Definition RV32IMACFD.h:67
etiss_uint32 S5
Definition RV32IMACFD.h:42
etiss_uint32 ZERO
Definition RV32IMACFD.h:21
etiss_uint32 S8
Definition RV32IMACFD.h:45
etiss_uint64 FT7
Definition RV32IMACFD.h:97
etiss_uint32 TP
Definition RV32IMACFD.h:25
etiss_uint32 MSCRATCH
Definition RV32IMACFD.h:84
etiss_uint32 A1
Definition RV32IMACFD.h:32
ETISS_CPU cpu
Definition RV32IMACFD.h:19
etiss_uint32 ins_X[32]
Definition RV32IMACFD.h:54
etiss_uint64 ins_F[32]
Definition RV32IMACFD.h:123
etiss_uint32 MINSTRETH
Definition RV32IMACFD.h:74
etiss_uint8 PRIV
Definition RV32IMACFD.h:57
etiss_uint32 A4
Definition RV32IMACFD.h:35
etiss_uint64 FS5
Definition RV32IMACFD.h:111
etiss_uint32 MIE
Definition RV32IMACFD.h:63
etiss_uint32 T3
Definition RV32IMACFD.h:49
etiss_uint64 FT1
Definition RV32IMACFD.h:91
etiss_uint32 S10
Definition RV32IMACFD.h:47
etiss_uint64 FS8
Definition RV32IMACFD.h:114
etiss_uint64 FT10
Definition RV32IMACFD.h:120
etiss_uint32 S7
Definition RV32IMACFD.h:44
etiss_uint32 FCSR
Definition RV32IMACFD.h:59
etiss_uint32 CYCLEH
Definition RV32IMACFD.h:66
etiss_uint32 T6
Definition RV32IMACFD.h:52
etiss_uint32 S3
Definition RV32IMACFD.h:40
etiss_uint32 S6
Definition RV32IMACFD.h:43
etiss_uint32 MHARTID
Definition RV32IMACFD.h:78
etiss_uint64 FA6
Definition RV32IMACFD.h:106
etiss_uint64 FA4
Definition RV32IMACFD.h:104
etiss_uint32 MINSTRET
Definition RV32IMACFD.h:73
etiss_uint32 MEDELEG
Definition RV32IMACFD.h:80
etiss_uint32 DPC
Definition RV32IMACFD.h:58
etiss_uint32 S9
Definition RV32IMACFD.h:46
etiss_uint64 FT6
Definition RV32IMACFD.h:96
etiss_uint32 T0
Definition RV32IMACFD.h:26
etiss_uint32 RA
Definition RV32IMACFD.h:22
etiss_uint8 RES[8]
Definition RV32IMACFD.h:56
etiss_uint32 GP
Definition RV32IMACFD.h:24
etiss_uint32 MCOUNTEREN
Definition RV32IMACFD.h:83
etiss_uint64 FS1
Definition RV32IMACFD.h:99
etiss_uint32 T2
Definition RV32IMACFD.h:28
etiss_uint32 A0
Definition RV32IMACFD.h:31
etiss_uint32 MIMPID
Definition RV32IMACFD.h:77
etiss_uint32 A6
Definition RV32IMACFD.h:37
etiss_uint32 MIDELEG
Definition RV32IMACFD.h:81
etiss_uint32 MTVAL
Definition RV32IMACFD.h:87
etiss_uint32 INSTRET
Definition RV32IMACFD.h:71
etiss_uint64 FT9
Definition RV32IMACFD.h:119
etiss_uint64 FT0
Definition RV32IMACFD.h:90
etiss_uint64 FS7
Definition RV32IMACFD.h:113
etiss_uint32 FENCE[8]
Definition RV32IMACFD.h:55
etiss_uint64 FA3
Definition RV32IMACFD.h:103
etiss_uint64 FS6
Definition RV32IMACFD.h:112
etiss_uint64 * F[32]
Definition RV32IMACFD.h:122
etiss_uint32 S2
Definition RV32IMACFD.h:39