RV64IMACFD_RV64IInstr.cpp

Go to the documentation of this file.

// clang-format off
#include "RV64IMACFDArch.h"
#include "RV64IMACFDFuncs.h"
 
using namespace etiss;
using namespace etiss::instr;
 
// LWU -------------------------------------------------------------------------
static InstructionDefinition lwu_rd_rs1_imm (
        ISA32_RV64IMACFD,
        "lwu",
        (uint64_t) 0x006003,
        (uint64_t) 0x00707f,
        [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
        {
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint16 imm = 0;
static BitArrayRange R_imm_0(31, 20);
imm += R_imm_0.read(ba) << 0;
 
// NOLINTEND(clang-diagnostic-unused-but-set-variable)
// -----------------------------------------------------------------------------
 
        {
                CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
 
                cp.code() = std::string("//LWU\n");
 
// -----------------------------------------------------------------------------
cp.code() += "etiss_coverage_count(1, 184);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 1189);\n";
cp.code() += "{ // block\n";
cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 4))) + "ULL;\n";
cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
cp.code() += "} // block\n";
} // block
{ // block
cp.code() += "etiss_coverage_count(1, 7507);\n";
cp.code() += "{ // block\n";
cp.code() += "etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL] + " + std::to_string(((etiss_int16)(((etiss_int16)imm) << (4)) >> (4))) + "LL;\n";
cp.code() += "etiss_coverage_count(7, 7480, 7479, 7475, 7474, 7472, 7478, 7476);\n";
cp.code() += "etiss_uint32 mem_val_0;\n";
cp.code() += "cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";
cp.code() += "if (cpu->exception) { // conditional\n";
{ // procedure
cp.code() += "{ // procedure\n";
cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
cp.code() += "} // procedure\n";
} // procedure
cp.code() += "} // conditional\n";
cp.code() += "etiss_uint32 res = (etiss_uint32)(mem_val_0);\n";
cp.code() += "etiss_coverage_count(6, 7490, 7489, 7487, 7485, 7483, 7484);\n";
cp.code() += "etiss_coverage_count(1, 7491);\n";
if ((rd % 32ULL) != 0LL) { // conditional
cp.code() += "etiss_coverage_count(5, 7497, 7494, 7492, 7495, 7496);\n";
cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = (etiss_uint64)(res);\n";
cp.code() += "etiss_coverage_count(6, 7506, 7502, 7501, 7499, 7505, 7503);\n";
} // conditional
cp.code() += "} // block\n";
} // block
cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
// -----------------------------------------------------------------------------
                cp.getAffectedRegisters().add("instructionPointer", 32);
        }
        {
                CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
 
                cp.code() = std::string("//LWU\n");
 
// -----------------------------------------------------------------------------
cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
// -----------------------------------------------------------------------------
        }
 
                return true;
        },
        0,
        [] (BitArray & ba, Instruction & instr)
        {
// -----------------------------------------------------------------------------
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint16 imm = 0;
static BitArrayRange R_imm_0(31, 20);
imm += R_imm_0.read(ba) << 0;
 
// -----------------------------------------------------------------------------
 
                std::stringstream ss;
// -----------------------------------------------------------------------------
ss << "lwu" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | imm=" + std::to_string(imm) + "]");
// -----------------------------------------------------------------------------
                return ss.str();
        }
);
 
// LD --------------------------------------------------------------------------
static InstructionDefinition ld_rd_rs1_imm (
        ISA32_RV64IMACFD,
        "ld",
        (uint64_t) 0x003003,
        (uint64_t) 0x00707f,
        [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
        {
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint16 imm = 0;
static BitArrayRange R_imm_0(31, 20);
imm += R_imm_0.read(ba) << 0;
 
// NOLINTEND(clang-diagnostic-unused-but-set-variable)
// -----------------------------------------------------------------------------
 
        {
                CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
 
                cp.code() = std::string("//LD\n");
 
// -----------------------------------------------------------------------------
cp.code() += "etiss_coverage_count(1, 185);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 1189);\n";
cp.code() += "{ // block\n";
cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 4))) + "ULL;\n";
cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
cp.code() += "} // block\n";
} // block
{ // block
cp.code() += "etiss_coverage_count(1, 7544);\n";
cp.code() += "{ // block\n";
cp.code() += "etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL] + " + std::to_string(((etiss_int16)(((etiss_int16)imm) << (4)) >> (4))) + "LL;\n";
cp.code() += "etiss_coverage_count(7, 7517, 7516, 7513, 7512, 7510, 7515, 7514);\n";
cp.code() += "etiss_uint64 mem_val_0;\n";
cp.code() += "cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";
cp.code() += "if (cpu->exception) { // conditional\n";
{ // procedure
cp.code() += "{ // procedure\n";
cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
cp.code() += "} // procedure\n";
} // procedure
cp.code() += "} // conditional\n";
cp.code() += "etiss_int64 res = (etiss_int64)(mem_val_0);\n";
cp.code() += "etiss_coverage_count(6, 7527, 7526, 7524, 7522, 7520, 7521);\n";
cp.code() += "etiss_coverage_count(1, 7528);\n";
if ((rd % 32ULL) != 0LL) { // conditional
cp.code() += "etiss_coverage_count(5, 7534, 7531, 7529, 7532, 7533);\n";
cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = (etiss_uint64)(res);\n";
cp.code() += "etiss_coverage_count(6, 7543, 7539, 7538, 7536, 7542, 7540);\n";
} // conditional
cp.code() += "} // block\n";
} // block
cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
// -----------------------------------------------------------------------------
                cp.getAffectedRegisters().add("instructionPointer", 32);
        }
        {
                CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
 
                cp.code() = std::string("//LD\n");
 
// -----------------------------------------------------------------------------
cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
// -----------------------------------------------------------------------------
        }
 
                return true;
        },
        0,
        [] (BitArray & ba, Instruction & instr)
        {
// -----------------------------------------------------------------------------
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint16 imm = 0;
static BitArrayRange R_imm_0(31, 20);
imm += R_imm_0.read(ba) << 0;
 
// -----------------------------------------------------------------------------
 
                std::stringstream ss;
// -----------------------------------------------------------------------------
ss << "ld" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | imm=" + std::to_string(imm) + "]");
// -----------------------------------------------------------------------------
                return ss.str();
        }
);
 
// SD --------------------------------------------------------------------------
static InstructionDefinition sd_imm_rs1_rs2 (
        ISA32_RV64IMACFD,
        "sd",
        (uint64_t) 0x003023,
        (uint64_t) 0x00707f,
        [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
        {
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
etiss_uint16 imm = 0;
static BitArrayRange R_imm_0(11, 7);
imm += R_imm_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 rs2 = 0;
static BitArrayRange R_rs2_0(24, 20);
rs2 += R_rs2_0.read(ba) << 0;
static BitArrayRange R_imm_5(31, 25);
imm += R_imm_5.read(ba) << 5;
 
// NOLINTEND(clang-diagnostic-unused-but-set-variable)
// -----------------------------------------------------------------------------
 
        {
                CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
 
                cp.code() = std::string("//SD\n");
 
// -----------------------------------------------------------------------------
cp.code() += "etiss_coverage_count(1, 186);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 1189);\n";
cp.code() += "{ // block\n";
cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 4))) + "ULL;\n";
cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
cp.code() += "} // block\n";
} // block
{ // block
cp.code() += "etiss_coverage_count(1, 7569);\n";
cp.code() += "{ // block\n";
cp.code() += "etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL] + " + std::to_string(((etiss_int16)(((etiss_int16)imm) << (4)) >> (4))) + "LL;\n";
cp.code() += "etiss_coverage_count(7, 7554, 7553, 7550, 7549, 7547, 7552, 7551);\n";
cp.code() += "etiss_uint64 mem_val_0;\n";
cp.code() += "mem_val_0 = (etiss_uint64)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL]);\n";
cp.code() += "etiss_coverage_count(9, 7568, 7560, 7558, 7556, 7557, 7567, 7565, 7564, 7562);\n";
cp.code() += "cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";
cp.code() += "if (cpu->exception) { // conditional\n";
{ // procedure
cp.code() += "{ // procedure\n";
cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
cp.code() += "} // procedure\n";
} // procedure
cp.code() += "} // conditional\n";
cp.code() += "} // block\n";
} // block
cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
// -----------------------------------------------------------------------------
                cp.getAffectedRegisters().add("instructionPointer", 32);
        }
        {
                CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
 
                cp.code() = std::string("//SD\n");
 
// -----------------------------------------------------------------------------
cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
// -----------------------------------------------------------------------------
        }
 
                return true;
        },
        0,
        [] (BitArray & ba, Instruction & instr)
        {
// -----------------------------------------------------------------------------
etiss_uint16 imm = 0;
static BitArrayRange R_imm_0(11, 7);
imm += R_imm_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 rs2 = 0;
static BitArrayRange R_rs2_0(24, 20);
rs2 += R_rs2_0.read(ba) << 0;
static BitArrayRange R_imm_5(31, 25);
imm += R_imm_5.read(ba) << 5;
 
// -----------------------------------------------------------------------------
 
                std::stringstream ss;
// -----------------------------------------------------------------------------
ss << "sd" << " # " << ba << (" [imm=" + std::to_string(imm) + " | rs1=" + std::to_string(rs1) + " | rs2=" + std::to_string(rs2) + "]");
// -----------------------------------------------------------------------------
                return ss.str();
        }
);
 
// SLLI ------------------------------------------------------------------------
static InstructionDefinition slli_rd_rs1_shamt (
        ISA32_RV64IMACFD,
        "slli",
        (uint64_t) 0x001013,
        (uint64_t) 0xfc00707f,
        [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
        {
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 shamt = 0;
static BitArrayRange R_shamt_0(25, 20);
shamt += R_shamt_0.read(ba) << 0;
 
// NOLINTEND(clang-diagnostic-unused-but-set-variable)
// -----------------------------------------------------------------------------
 
        {
                CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
 
                cp.code() = std::string("//SLLI\n");
 
// -----------------------------------------------------------------------------
cp.code() += "etiss_coverage_count(1, 187);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 1189);\n";
cp.code() += "{ // block\n";
cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 4))) + "ULL;\n";
cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
cp.code() += "} // block\n";
} // block
cp.code() += "etiss_coverage_count(1, 7570);\n";
if ((rd % 32ULL) != 0LL) { // conditional
cp.code() += "etiss_coverage_count(5, 7576, 7573, 7571, 7574, 7575);\n";
cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL] << " + std::to_string(shamt) + "ULL;\n";
cp.code() += "etiss_coverage_count(9, 7589, 7581, 7580, 7578, 7588, 7586, 7585, 7583, 7587);\n";
} // conditional
cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
// -----------------------------------------------------------------------------
                cp.getAffectedRegisters().add("instructionPointer", 32);
        }
 
                return true;
        },
        0,
        [] (BitArray & ba, Instruction & instr)
        {
// -----------------------------------------------------------------------------
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 shamt = 0;
static BitArrayRange R_shamt_0(25, 20);
shamt += R_shamt_0.read(ba) << 0;
 
// -----------------------------------------------------------------------------
 
                std::stringstream ss;
// -----------------------------------------------------------------------------
ss << "slli" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | shamt=" + std::to_string(shamt) + "]");
// -----------------------------------------------------------------------------
                return ss.str();
        }
);
 
// SRLI ------------------------------------------------------------------------
static InstructionDefinition srli_rd_rs1_shamt (
        ISA32_RV64IMACFD,
        "srli",
        (uint64_t) 0x005013,
        (uint64_t) 0xfc00707f,
        [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
        {
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 shamt = 0;
static BitArrayRange R_shamt_0(25, 20);
shamt += R_shamt_0.read(ba) << 0;
 
// NOLINTEND(clang-diagnostic-unused-but-set-variable)
// -----------------------------------------------------------------------------
 
        {
                CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
 
                cp.code() = std::string("//SRLI\n");
 
// -----------------------------------------------------------------------------
cp.code() += "etiss_coverage_count(1, 188);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 1189);\n";
cp.code() += "{ // block\n";
cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 4))) + "ULL;\n";
cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
cp.code() += "} // block\n";
} // block
cp.code() += "etiss_coverage_count(1, 7590);\n";
if ((rd % 32ULL) != 0LL) { // conditional
cp.code() += "etiss_coverage_count(5, 7596, 7593, 7591, 7594, 7595);\n";
cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL] >> " + std::to_string(shamt) + "ULL;\n";
cp.code() += "etiss_coverage_count(9, 7609, 7601, 7600, 7598, 7608, 7606, 7605, 7603, 7607);\n";
} // conditional
cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
// -----------------------------------------------------------------------------
                cp.getAffectedRegisters().add("instructionPointer", 32);
        }
 
                return true;
        },
        0,
        [] (BitArray & ba, Instruction & instr)
        {
// -----------------------------------------------------------------------------
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 shamt = 0;
static BitArrayRange R_shamt_0(25, 20);
shamt += R_shamt_0.read(ba) << 0;
 
// -----------------------------------------------------------------------------
 
                std::stringstream ss;
// -----------------------------------------------------------------------------
ss << "srli" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | shamt=" + std::to_string(shamt) + "]");
// -----------------------------------------------------------------------------
                return ss.str();
        }
);
 
// SRAI ------------------------------------------------------------------------
static InstructionDefinition srai_rd_rs1_shamt (
        ISA32_RV64IMACFD,
        "srai",
        (uint64_t) 0x40005013,
        (uint64_t) 0xfc00707f,
        [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
        {
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 shamt = 0;
static BitArrayRange R_shamt_0(25, 20);
shamt += R_shamt_0.read(ba) << 0;
 
// NOLINTEND(clang-diagnostic-unused-but-set-variable)
// -----------------------------------------------------------------------------
 
        {
                CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
 
                cp.code() = std::string("//SRAI\n");
 
// -----------------------------------------------------------------------------
cp.code() += "etiss_coverage_count(1, 189);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 1189);\n";
cp.code() += "{ // block\n";
cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 4))) + "ULL;\n";
cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
cp.code() += "} // block\n";
} // block
cp.code() += "etiss_coverage_count(1, 7610);\n";
if ((rd % 32ULL) != 0LL) { // conditional
cp.code() += "etiss_coverage_count(5, 7616, 7613, 7611, 7614, 7615);\n";
cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = ((etiss_int64)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL])) >> " + std::to_string(shamt) + "ULL;\n";
cp.code() += "etiss_coverage_count(11, 7631, 7621, 7620, 7618, 7630, 7627, 7626, 7625, 7623, 7628, 7629);\n";
} // conditional
cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
// -----------------------------------------------------------------------------
                cp.getAffectedRegisters().add("instructionPointer", 32);
        }
 
                return true;
        },
        0,
        [] (BitArray & ba, Instruction & instr)
        {
// -----------------------------------------------------------------------------
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 shamt = 0;
static BitArrayRange R_shamt_0(25, 20);
shamt += R_shamt_0.read(ba) << 0;
 
// -----------------------------------------------------------------------------
 
                std::stringstream ss;
// -----------------------------------------------------------------------------
ss << "srai" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | shamt=" + std::to_string(shamt) + "]");
// -----------------------------------------------------------------------------
                return ss.str();
        }
);
 
// ADDIW -----------------------------------------------------------------------
static InstructionDefinition addiw_rd_rs1_imm (
        ISA32_RV64IMACFD,
        "addiw",
        (uint64_t) 0x00001b,
        (uint64_t) 0x00707f,
        [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
        {
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint16 imm = 0;
static BitArrayRange R_imm_0(31, 20);
imm += R_imm_0.read(ba) << 0;
 
// NOLINTEND(clang-diagnostic-unused-but-set-variable)
// -----------------------------------------------------------------------------
 
        {
                CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
 
                cp.code() = std::string("//ADDIW\n");
 
// -----------------------------------------------------------------------------
cp.code() += "etiss_coverage_count(1, 190);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 1189);\n";
cp.code() += "{ // block\n";
cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 4))) + "ULL;\n";
cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
cp.code() += "} // block\n";
} // block
{ // block
cp.code() += "etiss_coverage_count(1, 7659);\n";
cp.code() += "{ // block\n";
cp.code() += "etiss_coverage_count(1, 7632);\n";
if ((rd % 32ULL) != 0LL) { // conditional
cp.code() += "etiss_coverage_count(5, 7638, 7635, 7633, 7636, 7637);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 7658);\n";
cp.code() += "{ // block\n";
cp.code() += "etiss_int32 res = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL] + " + std::to_string(((etiss_int16)(((etiss_int16)imm) << (4)) >> (4))) + "LL;\n";
cp.code() += "etiss_coverage_count(7, 7648, 7647, 7644, 7643, 7641, 7646, 7645);\n";
cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = (etiss_int64)(res);\n";
cp.code() += "etiss_coverage_count(6, 7657, 7653, 7652, 7650, 7656, 7654);\n";
cp.code() += "} // block\n";
} // block
} // conditional
cp.code() += "} // block\n";
} // block
cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
// -----------------------------------------------------------------------------
                cp.getAffectedRegisters().add("instructionPointer", 32);
        }
 
                return true;
        },
        0,
        [] (BitArray & ba, Instruction & instr)
        {
// -----------------------------------------------------------------------------
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint16 imm = 0;
static BitArrayRange R_imm_0(31, 20);
imm += R_imm_0.read(ba) << 0;
 
// -----------------------------------------------------------------------------
 
                std::stringstream ss;
// -----------------------------------------------------------------------------
ss << "addiw" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | imm=" + std::to_string(imm) + "]");
// -----------------------------------------------------------------------------
                return ss.str();
        }
);
 
// SLLIW -----------------------------------------------------------------------
static InstructionDefinition slliw_rd_rs1_shamt (
        ISA32_RV64IMACFD,
        "slliw",
        (uint64_t) 0x00101b,
        (uint64_t) 0xfe00707f,
        [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
        {
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 shamt = 0;
static BitArrayRange R_shamt_0(24, 20);
shamt += R_shamt_0.read(ba) << 0;
 
// NOLINTEND(clang-diagnostic-unused-but-set-variable)
// -----------------------------------------------------------------------------
 
        {
                CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
 
                cp.code() = std::string("//SLLIW\n");
 
// -----------------------------------------------------------------------------
cp.code() += "etiss_coverage_count(1, 191);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 1189);\n";
cp.code() += "{ // block\n";
cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 4))) + "ULL;\n";
cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
cp.code() += "} // block\n";
} // block
{ // block
cp.code() += "etiss_coverage_count(1, 7690);\n";
cp.code() += "{ // block\n";
cp.code() += "etiss_coverage_count(1, 7660);\n";
if ((rd % 32ULL) != 0LL) { // conditional
cp.code() += "etiss_coverage_count(5, 7666, 7663, 7661, 7664, 7665);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 7689);\n";
cp.code() += "{ // block\n";
cp.code() += "etiss_uint32 sh_val = ((etiss_uint32)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL])) << " + std::to_string(shamt) + "ULL;\n";
cp.code() += "etiss_coverage_count(8, 7678, 7677, 7674, 7672, 7671, 7669, 7675, 7676);\n";
cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = (etiss_uint64)((etiss_int32)(sh_val));\n";
cp.code() += "etiss_coverage_count(7, 7688, 7683, 7682, 7680, 7687, 7685, 7684);\n";
cp.code() += "} // block\n";
} // block
} // conditional
cp.code() += "} // block\n";
} // block
cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
// -----------------------------------------------------------------------------
                cp.getAffectedRegisters().add("instructionPointer", 32);
        }
 
                return true;
        },
        0,
        [] (BitArray & ba, Instruction & instr)
        {
// -----------------------------------------------------------------------------
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 shamt = 0;
static BitArrayRange R_shamt_0(24, 20);
shamt += R_shamt_0.read(ba) << 0;
 
// -----------------------------------------------------------------------------
 
                std::stringstream ss;
// -----------------------------------------------------------------------------
ss << "slliw" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | shamt=" + std::to_string(shamt) + "]");
// -----------------------------------------------------------------------------
                return ss.str();
        }
);
 
// SRLIW -----------------------------------------------------------------------
static InstructionDefinition srliw_rd_rs1_shamt (
        ISA32_RV64IMACFD,
        "srliw",
        (uint64_t) 0x00501b,
        (uint64_t) 0xfe00707f,
        [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
        {
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 shamt = 0;
static BitArrayRange R_shamt_0(24, 20);
shamt += R_shamt_0.read(ba) << 0;
 
// NOLINTEND(clang-diagnostic-unused-but-set-variable)
// -----------------------------------------------------------------------------
 
        {
                CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
 
                cp.code() = std::string("//SRLIW\n");
 
// -----------------------------------------------------------------------------
cp.code() += "etiss_coverage_count(1, 192);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 1189);\n";
cp.code() += "{ // block\n";
cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 4))) + "ULL;\n";
cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
cp.code() += "} // block\n";
} // block
{ // block
cp.code() += "etiss_coverage_count(1, 7721);\n";
cp.code() += "{ // block\n";
cp.code() += "etiss_coverage_count(1, 7691);\n";
if ((rd % 32ULL) != 0LL) { // conditional
cp.code() += "etiss_coverage_count(5, 7697, 7694, 7692, 7695, 7696);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 7720);\n";
cp.code() += "{ // block\n";
cp.code() += "etiss_uint32 sh_val = ((etiss_uint32)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL])) >> " + std::to_string(shamt) + "ULL;\n";
cp.code() += "etiss_coverage_count(8, 7709, 7708, 7705, 7703, 7702, 7700, 7706, 7707);\n";
cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = (etiss_uint64)((etiss_int32)(sh_val));\n";
cp.code() += "etiss_coverage_count(7, 7719, 7714, 7713, 7711, 7718, 7716, 7715);\n";
cp.code() += "} // block\n";
} // block
} // conditional
cp.code() += "} // block\n";
} // block
cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
// -----------------------------------------------------------------------------
                cp.getAffectedRegisters().add("instructionPointer", 32);
        }
 
                return true;
        },
        0,
        [] (BitArray & ba, Instruction & instr)
        {
// -----------------------------------------------------------------------------
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 shamt = 0;
static BitArrayRange R_shamt_0(24, 20);
shamt += R_shamt_0.read(ba) << 0;
 
// -----------------------------------------------------------------------------
 
                std::stringstream ss;
// -----------------------------------------------------------------------------
ss << "srliw" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | shamt=" + std::to_string(shamt) + "]");
// -----------------------------------------------------------------------------
                return ss.str();
        }
);
 
// SRAIW -----------------------------------------------------------------------
static InstructionDefinition sraiw_rd_rs1_shamt (
        ISA32_RV64IMACFD,
        "sraiw",
        (uint64_t) 0x4000501b,
        (uint64_t) 0xfe00707f,
        [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
        {
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 shamt = 0;
static BitArrayRange R_shamt_0(24, 20);
shamt += R_shamt_0.read(ba) << 0;
 
// NOLINTEND(clang-diagnostic-unused-but-set-variable)
// -----------------------------------------------------------------------------
 
        {
                CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
 
                cp.code() = std::string("//SRAIW\n");
 
// -----------------------------------------------------------------------------
cp.code() += "etiss_coverage_count(1, 193);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 1189);\n";
cp.code() += "{ // block\n";
cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 4))) + "ULL;\n";
cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
cp.code() += "} // block\n";
} // block
{ // block
cp.code() += "etiss_coverage_count(1, 7751);\n";
cp.code() += "{ // block\n";
cp.code() += "etiss_coverage_count(1, 7722);\n";
if ((rd % 32ULL) != 0LL) { // conditional
cp.code() += "etiss_coverage_count(5, 7728, 7725, 7723, 7726, 7727);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 7750);\n";
cp.code() += "{ // block\n";
cp.code() += "etiss_int32 sh_val = ((etiss_int32)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL])) >> " + std::to_string(shamt) + "ULL;\n";
cp.code() += "etiss_coverage_count(8, 7740, 7739, 7736, 7734, 7733, 7731, 7737, 7738);\n";
cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = (etiss_uint64)(sh_val);\n";
cp.code() += "etiss_coverage_count(6, 7749, 7745, 7744, 7742, 7748, 7746);\n";
cp.code() += "} // block\n";
} // block
} // conditional
cp.code() += "} // block\n";
} // block
cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
// -----------------------------------------------------------------------------
                cp.getAffectedRegisters().add("instructionPointer", 32);
        }
 
                return true;
        },
        0,
        [] (BitArray & ba, Instruction & instr)
        {
// -----------------------------------------------------------------------------
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 shamt = 0;
static BitArrayRange R_shamt_0(24, 20);
shamt += R_shamt_0.read(ba) << 0;
 
// -----------------------------------------------------------------------------
 
                std::stringstream ss;
// -----------------------------------------------------------------------------
ss << "sraiw" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | shamt=" + std::to_string(shamt) + "]");
// -----------------------------------------------------------------------------
                return ss.str();
        }
);
 
// ADDW ------------------------------------------------------------------------
static InstructionDefinition addw_rd_rs1_rs2 (
        ISA32_RV64IMACFD,
        "addw",
        (uint64_t) 0x00003b,
        (uint64_t) 0xfe00707f,
        [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
        {
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 rs2 = 0;
static BitArrayRange R_rs2_0(24, 20);
rs2 += R_rs2_0.read(ba) << 0;
 
// NOLINTEND(clang-diagnostic-unused-but-set-variable)
// -----------------------------------------------------------------------------
 
        {
                CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
 
                cp.code() = std::string("//ADDW\n");
 
// -----------------------------------------------------------------------------
cp.code() += "etiss_coverage_count(1, 194);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 1189);\n";
cp.code() += "{ // block\n";
cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 4))) + "ULL;\n";
cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
cp.code() += "} // block\n";
} // block
{ // block
cp.code() += "etiss_coverage_count(1, 7786);\n";
cp.code() += "{ // block\n";
cp.code() += "etiss_coverage_count(1, 7752);\n";
if ((rd % 32ULL) != 0LL) { // conditional
cp.code() += "etiss_coverage_count(5, 7758, 7755, 7753, 7756, 7757);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 7785);\n";
cp.code() += "{ // block\n";
cp.code() += "etiss_int32 res = (etiss_int32)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL]) + (etiss_int32)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL]);\n";
cp.code() += "etiss_coverage_count(10, 7775, 7774, 7766, 7764, 7763, 7761, 7773, 7771, 7770, 7768);\n";
cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = (etiss_int64)(res);\n";
cp.code() += "etiss_coverage_count(6, 7784, 7780, 7779, 7777, 7783, 7781);\n";
cp.code() += "} // block\n";
} // block
} // conditional
cp.code() += "} // block\n";
} // block
cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
// -----------------------------------------------------------------------------
                cp.getAffectedRegisters().add("instructionPointer", 32);
        }
 
                return true;
        },
        0,
        [] (BitArray & ba, Instruction & instr)
        {
// -----------------------------------------------------------------------------
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 rs2 = 0;
static BitArrayRange R_rs2_0(24, 20);
rs2 += R_rs2_0.read(ba) << 0;
 
// -----------------------------------------------------------------------------
 
                std::stringstream ss;
// -----------------------------------------------------------------------------
ss << "addw" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | rs2=" + std::to_string(rs2) + "]");
// -----------------------------------------------------------------------------
                return ss.str();
        }
);
 
// SUBW ------------------------------------------------------------------------
static InstructionDefinition subw_rd_rs1_rs2 (
        ISA32_RV64IMACFD,
        "subw",
        (uint64_t) 0x4000003b,
        (uint64_t) 0xfe00707f,
        [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
        {
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 rs2 = 0;
static BitArrayRange R_rs2_0(24, 20);
rs2 += R_rs2_0.read(ba) << 0;
 
// NOLINTEND(clang-diagnostic-unused-but-set-variable)
// -----------------------------------------------------------------------------
 
        {
                CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
 
                cp.code() = std::string("//SUBW\n");
 
// -----------------------------------------------------------------------------
cp.code() += "etiss_coverage_count(1, 195);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 1189);\n";
cp.code() += "{ // block\n";
cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 4))) + "ULL;\n";
cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
cp.code() += "} // block\n";
} // block
{ // block
cp.code() += "etiss_coverage_count(1, 7821);\n";
cp.code() += "{ // block\n";
cp.code() += "etiss_coverage_count(1, 7787);\n";
if ((rd % 32ULL) != 0LL) { // conditional
cp.code() += "etiss_coverage_count(5, 7793, 7790, 7788, 7791, 7792);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 7820);\n";
cp.code() += "{ // block\n";
cp.code() += "etiss_int32 res = (etiss_int32)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL]) - (etiss_int32)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL]);\n";
cp.code() += "etiss_coverage_count(10, 7810, 7809, 7801, 7799, 7798, 7796, 7808, 7806, 7805, 7803);\n";
cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = (etiss_int64)(res);\n";
cp.code() += "etiss_coverage_count(6, 7819, 7815, 7814, 7812, 7818, 7816);\n";
cp.code() += "} // block\n";
} // block
} // conditional
cp.code() += "} // block\n";
} // block
cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
// -----------------------------------------------------------------------------
                cp.getAffectedRegisters().add("instructionPointer", 32);
        }
 
                return true;
        },
        0,
        [] (BitArray & ba, Instruction & instr)
        {
// -----------------------------------------------------------------------------
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 rs2 = 0;
static BitArrayRange R_rs2_0(24, 20);
rs2 += R_rs2_0.read(ba) << 0;
 
// -----------------------------------------------------------------------------
 
                std::stringstream ss;
// -----------------------------------------------------------------------------
ss << "subw" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | rs2=" + std::to_string(rs2) + "]");
// -----------------------------------------------------------------------------
                return ss.str();
        }
);
 
// SLLW ------------------------------------------------------------------------
static InstructionDefinition sllw_rd_rs1_rs2 (
        ISA32_RV64IMACFD,
        "sllw",
        (uint64_t) 0x00103b,
        (uint64_t) 0xfe00707f,
        [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
        {
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 rs2 = 0;
static BitArrayRange R_rs2_0(24, 20);
rs2 += R_rs2_0.read(ba) << 0;
 
// NOLINTEND(clang-diagnostic-unused-but-set-variable)
// -----------------------------------------------------------------------------
 
        {
                CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
 
                cp.code() = std::string("//SLLW\n");
 
// -----------------------------------------------------------------------------
cp.code() += "etiss_coverage_count(1, 196);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 1189);\n";
cp.code() += "{ // block\n";
cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 4))) + "ULL;\n";
cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
cp.code() += "} // block\n";
} // block
{ // block
cp.code() += "etiss_coverage_count(1, 7862);\n";
cp.code() += "{ // block\n";
cp.code() += "etiss_coverage_count(1, 7822);\n";
if ((rd % 32ULL) != 0LL) { // conditional
cp.code() += "etiss_coverage_count(5, 7828, 7825, 7823, 7826, 7827);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 7861);\n";
cp.code() += "{ // block\n";
cp.code() += "etiss_uint32 count = (etiss_uint64)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL]) & 31ULL;\n";
cp.code() += "etiss_coverage_count(7, 7838, 7837, 7835, 7834, 7833, 7831, 7836);\n";
cp.code() += "etiss_uint32 sh_val = ((etiss_uint32)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL])) << count;\n";
cp.code() += "etiss_coverage_count(8, 7850, 7849, 7846, 7844, 7843, 7841, 7847, 7848);\n";
cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = (etiss_uint64)((etiss_int32)(sh_val));\n";
cp.code() += "etiss_coverage_count(7, 7860, 7855, 7854, 7852, 7859, 7857, 7856);\n";
cp.code() += "} // block\n";
} // block
} // conditional
cp.code() += "} // block\n";
} // block
cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
// -----------------------------------------------------------------------------
                cp.getAffectedRegisters().add("instructionPointer", 32);
        }
 
                return true;
        },
        0,
        [] (BitArray & ba, Instruction & instr)
        {
// -----------------------------------------------------------------------------
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 rs2 = 0;
static BitArrayRange R_rs2_0(24, 20);
rs2 += R_rs2_0.read(ba) << 0;
 
// -----------------------------------------------------------------------------
 
                std::stringstream ss;
// -----------------------------------------------------------------------------
ss << "sllw" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | rs2=" + std::to_string(rs2) + "]");
// -----------------------------------------------------------------------------
                return ss.str();
        }
);
 
// SRLW ------------------------------------------------------------------------
static InstructionDefinition srlw_rd_rs1_rs2 (
        ISA32_RV64IMACFD,
        "srlw",
        (uint64_t) 0x00503b,
        (uint64_t) 0xfe00707f,
        [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
        {
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 rs2 = 0;
static BitArrayRange R_rs2_0(24, 20);
rs2 += R_rs2_0.read(ba) << 0;
 
// NOLINTEND(clang-diagnostic-unused-but-set-variable)
// -----------------------------------------------------------------------------
 
        {
                CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
 
                cp.code() = std::string("//SRLW\n");
 
// -----------------------------------------------------------------------------
cp.code() += "etiss_coverage_count(1, 197);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 1189);\n";
cp.code() += "{ // block\n";
cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 4))) + "ULL;\n";
cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
cp.code() += "} // block\n";
} // block
{ // block
cp.code() += "etiss_coverage_count(1, 7903);\n";
cp.code() += "{ // block\n";
cp.code() += "etiss_coverage_count(1, 7863);\n";
if ((rd % 32ULL) != 0LL) { // conditional
cp.code() += "etiss_coverage_count(5, 7869, 7866, 7864, 7867, 7868);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 7902);\n";
cp.code() += "{ // block\n";
cp.code() += "etiss_uint32 count = (etiss_uint64)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL]) & 31ULL;\n";
cp.code() += "etiss_coverage_count(7, 7879, 7878, 7876, 7875, 7874, 7872, 7877);\n";
cp.code() += "etiss_uint32 sh_val = ((etiss_uint32)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL])) >> count;\n";
cp.code() += "etiss_coverage_count(8, 7891, 7890, 7887, 7885, 7884, 7882, 7888, 7889);\n";
cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = (etiss_uint64)((etiss_int32)(sh_val));\n";
cp.code() += "etiss_coverage_count(7, 7901, 7896, 7895, 7893, 7900, 7898, 7897);\n";
cp.code() += "} // block\n";
} // block
} // conditional
cp.code() += "} // block\n";
} // block
cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
// -----------------------------------------------------------------------------
                cp.getAffectedRegisters().add("instructionPointer", 32);
        }
 
                return true;
        },
        0,
        [] (BitArray & ba, Instruction & instr)
        {
// -----------------------------------------------------------------------------
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 rs2 = 0;
static BitArrayRange R_rs2_0(24, 20);
rs2 += R_rs2_0.read(ba) << 0;
 
// -----------------------------------------------------------------------------
 
                std::stringstream ss;
// -----------------------------------------------------------------------------
ss << "srlw" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | rs2=" + std::to_string(rs2) + "]");
// -----------------------------------------------------------------------------
                return ss.str();
        }
);
 
// SRAW ------------------------------------------------------------------------
static InstructionDefinition sraw_rd_rs1_rs2 (
        ISA32_RV64IMACFD,
        "sraw",
        (uint64_t) 0x4000503b,
        (uint64_t) 0xfe00707f,
        [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
        {
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
 
// -----------------------------------------------------------------------------
// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 rs2 = 0;
static BitArrayRange R_rs2_0(24, 20);
rs2 += R_rs2_0.read(ba) << 0;
 
// NOLINTEND(clang-diagnostic-unused-but-set-variable)
// -----------------------------------------------------------------------------
 
        {
                CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
 
                cp.code() = std::string("//SRAW\n");
 
// -----------------------------------------------------------------------------
cp.code() += "etiss_coverage_count(1, 198);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 1189);\n";
cp.code() += "{ // block\n";
cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 4))) + "ULL;\n";
cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
cp.code() += "} // block\n";
} // block
{ // block
cp.code() += "etiss_coverage_count(1, 7943);\n";
cp.code() += "{ // block\n";
cp.code() += "etiss_coverage_count(1, 7904);\n";
if ((rd % 32ULL) != 0LL) { // conditional
cp.code() += "etiss_coverage_count(5, 7910, 7907, 7905, 7908, 7909);\n";
{ // block
cp.code() += "etiss_coverage_count(1, 7942);\n";
cp.code() += "{ // block\n";
cp.code() += "etiss_uint32 count = (etiss_uint64)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL]) & 31ULL;\n";
cp.code() += "etiss_coverage_count(7, 7920, 7919, 7917, 7916, 7915, 7913, 7918);\n";
cp.code() += "etiss_int32 sh_val = ((etiss_int32)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL])) >> count;\n";
cp.code() += "etiss_coverage_count(8, 7932, 7931, 7928, 7926, 7925, 7923, 7929, 7930);\n";
cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = (etiss_int64)(sh_val);\n";
cp.code() += "etiss_coverage_count(6, 7941, 7937, 7936, 7934, 7940, 7938);\n";
cp.code() += "} // block\n";
} // block
} // conditional
cp.code() += "} // block\n";
} // block
cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
// -----------------------------------------------------------------------------
                cp.getAffectedRegisters().add("instructionPointer", 32);
        }
 
                return true;
        },
        0,
        [] (BitArray & ba, Instruction & instr)
        {
// -----------------------------------------------------------------------------
etiss_uint8 rd = 0;
static BitArrayRange R_rd_0(11, 7);
rd += R_rd_0.read(ba) << 0;
etiss_uint8 rs1 = 0;
static BitArrayRange R_rs1_0(19, 15);
rs1 += R_rs1_0.read(ba) << 0;
etiss_uint8 rs2 = 0;
static BitArrayRange R_rs2_0(24, 20);
rs2 += R_rs2_0.read(ba) << 0;
 
// -----------------------------------------------------------------------------
 
                std::stringstream ss;
// -----------------------------------------------------------------------------
ss << "sraw" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | rs2=" + std::to_string(rs2) + "]");
// -----------------------------------------------------------------------------
                return ss.str();
        }
);
// clang-format on