ETISS 0.11.2
ExtendableTranslatingInstructionSetSimulator(version0.11.2)
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RV64IMACFD_RV32ICInstr.cpp
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1// clang-format off
9#include "RV64IMACFDArch.h"
10#include "RV64IMACFDFuncs.h"
11
12using namespace etiss;
13using namespace etiss::instr;
14
15// CADDI4SPN -------------------------------------------------------------------
16static InstructionDefinition caddi4spn_rd_imm (
17 ISA16_RV64IMACFD,
18 "caddi4spn",
19 (uint64_t) 0x00,
20 (uint64_t) 0xe003,
21 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
22 {
23
24// -----------------------------------------------------------------------------
25
26// -----------------------------------------------------------------------------
27
28// -----------------------------------------------------------------------------
29// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
30etiss_uint8 rd = 0;
31static BitArrayRange R_rd_0(4, 2);
32rd += R_rd_0.read(ba) << 0;
33etiss_uint16 imm = 0;
34static BitArrayRange R_imm_3(5, 5);
35imm += R_imm_3.read(ba) << 3;
36static BitArrayRange R_imm_2(6, 6);
37imm += R_imm_2.read(ba) << 2;
38static BitArrayRange R_imm_6(10, 7);
39imm += R_imm_6.read(ba) << 6;
40static BitArrayRange R_imm_4(12, 11);
41imm += R_imm_4.read(ba) << 4;
42
43// NOLINTEND(clang-diagnostic-unused-but-set-variable)
44// -----------------------------------------------------------------------------
45
46 {
47 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
48
49 cp.code() = std::string("//CADDI4SPN\n");
50
51// -----------------------------------------------------------------------------
52cp.code() += "etiss_coverage_count(1, 42);\n";
53{ // block
54cp.code() += "etiss_coverage_count(1, 1189);\n";
55cp.code() += "{ // block\n";
56cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
57cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
58cp.code() += "} // block\n";
59} // block
60cp.code() += "etiss_coverage_count(1, 2240);\n";
61if (imm) { // conditional
62cp.code() += "etiss_coverage_count(1, 2241);\n";
63cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd + 8ULL) + "ULL] = *((RV64IMACFD*)cpu)->X[2ULL] + " + std::to_string(imm) + "ULL;\n";
64cp.code() += "etiss_coverage_count(9, 2252, 2246, 2245, 2243, 2244, 2251, 2249, 2248, 2250);\n";
65} // conditional
66else { // conditional
67{ // procedure
68cp.code() += "{ // procedure\n";
69cp.code() += "RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";
70cp.code() += "etiss_coverage_count(2, 2255, 2253);\n";
71cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
72cp.code() += "} // procedure\n";
73} // procedure
74} // conditional
75cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
76cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
77// -----------------------------------------------------------------------------
78 cp.getAffectedRegisters().add("instructionPointer", 32);
79 }
80 {
81 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
82
83 cp.code() = std::string("//CADDI4SPN\n");
84
85// -----------------------------------------------------------------------------
86cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
87// -----------------------------------------------------------------------------
88 }
89
90 return true;
91 },
92 0,
93 [] (BitArray & ba, Instruction & instr)
94 {
95// -----------------------------------------------------------------------------
96etiss_uint8 rd = 0;
97static BitArrayRange R_rd_0(4, 2);
98rd += R_rd_0.read(ba) << 0;
99etiss_uint16 imm = 0;
100static BitArrayRange R_imm_3(5, 5);
101imm += R_imm_3.read(ba) << 3;
102static BitArrayRange R_imm_2(6, 6);
103imm += R_imm_2.read(ba) << 2;
104static BitArrayRange R_imm_6(10, 7);
105imm += R_imm_6.read(ba) << 6;
106static BitArrayRange R_imm_4(12, 11);
107imm += R_imm_4.read(ba) << 4;
108
109// -----------------------------------------------------------------------------
110
111 std::stringstream ss;
112// -----------------------------------------------------------------------------
113ss << "caddi4spn" << " # " << ba << (" [rd=" + std::to_string(rd) + " | imm=" + std::to_string(imm) + "]");
114// -----------------------------------------------------------------------------
115 return ss.str();
116 }
117);
118
119// CLW -------------------------------------------------------------------------
120static InstructionDefinition clw_rd_uimm_rs1 (
121 ISA16_RV64IMACFD,
122 "clw",
123 (uint64_t) 0x4000,
124 (uint64_t) 0xe003,
125 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
126 {
127
128// -----------------------------------------------------------------------------
129
130// -----------------------------------------------------------------------------
131
132// -----------------------------------------------------------------------------
133// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
134etiss_uint8 rd = 0;
135static BitArrayRange R_rd_0(4, 2);
136rd += R_rd_0.read(ba) << 0;
137etiss_uint8 uimm = 0;
138static BitArrayRange R_uimm_6(5, 5);
139uimm += R_uimm_6.read(ba) << 6;
140static BitArrayRange R_uimm_2(6, 6);
141uimm += R_uimm_2.read(ba) << 2;
142etiss_uint8 rs1 = 0;
143static BitArrayRange R_rs1_0(9, 7);
144rs1 += R_rs1_0.read(ba) << 0;
145static BitArrayRange R_uimm_3(12, 10);
146uimm += R_uimm_3.read(ba) << 3;
147
148// NOLINTEND(clang-diagnostic-unused-but-set-variable)
149// -----------------------------------------------------------------------------
150
151 {
152 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
153
154 cp.code() = std::string("//CLW\n");
155
156// -----------------------------------------------------------------------------
157cp.code() += "etiss_coverage_count(1, 43);\n";
158{ // block
159cp.code() += "etiss_coverage_count(1, 1189);\n";
160cp.code() += "{ // block\n";
161cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
162cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
163cp.code() += "} // block\n";
164} // block
165{ // block
166cp.code() += "etiss_coverage_count(1, 2279);\n";
167cp.code() += "{ // block\n";
168cp.code() += "etiss_uint64 load_address = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 + 8ULL) + "ULL] + " + std::to_string(uimm) + "ULL;\n";
169cp.code() += "etiss_coverage_count(7, 2264, 2263, 2261, 2260, 2258, 2259, 2262);\n";
170cp.code() += "etiss_uint32 mem_val_0;\n";
171cp.code() += "cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 4);\n";
172cp.code() += "if (cpu->exception) { // conditional\n";
173{ // procedure
174cp.code() += "{ // procedure\n";
175cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
176cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
177cp.code() += "} // procedure\n";
178} // procedure
179cp.code() += "} // conditional\n";
180cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd + 8ULL) + "ULL] = (etiss_int32)(mem_val_0);\n";
181cp.code() += "etiss_coverage_count(10, 2278, 2269, 2268, 2266, 2267, 2277, 2275, 2273, 2271, 2272);\n";
182cp.code() += "} // block\n";
183} // block
184cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
185cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
186// -----------------------------------------------------------------------------
187 cp.getAffectedRegisters().add("instructionPointer", 32);
188 }
189 {
190 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
191
192 cp.code() = std::string("//CLW\n");
193
194// -----------------------------------------------------------------------------
195cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
196// -----------------------------------------------------------------------------
197 }
198
199 return true;
200 },
201 0,
202 [] (BitArray & ba, Instruction & instr)
203 {
204// -----------------------------------------------------------------------------
205etiss_uint8 rd = 0;
206static BitArrayRange R_rd_0(4, 2);
207rd += R_rd_0.read(ba) << 0;
208etiss_uint8 uimm = 0;
209static BitArrayRange R_uimm_6(5, 5);
210uimm += R_uimm_6.read(ba) << 6;
211static BitArrayRange R_uimm_2(6, 6);
212uimm += R_uimm_2.read(ba) << 2;
213etiss_uint8 rs1 = 0;
214static BitArrayRange R_rs1_0(9, 7);
215rs1 += R_rs1_0.read(ba) << 0;
216static BitArrayRange R_uimm_3(12, 10);
217uimm += R_uimm_3.read(ba) << 3;
218
219// -----------------------------------------------------------------------------
220
221 std::stringstream ss;
222// -----------------------------------------------------------------------------
223ss << "clw" << " # " << ba << (" [rd=" + std::to_string(rd) + " | uimm=" + std::to_string(uimm) + " | rs1=" + std::to_string(rs1) + "]");
224// -----------------------------------------------------------------------------
225 return ss.str();
226 }
227);
228
229// CSW -------------------------------------------------------------------------
230static InstructionDefinition csw_rs2_uimm_rs1 (
231 ISA16_RV64IMACFD,
232 "csw",
233 (uint64_t) 0xc000,
234 (uint64_t) 0xe003,
235 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
236 {
237
238// -----------------------------------------------------------------------------
239
240// -----------------------------------------------------------------------------
241
242// -----------------------------------------------------------------------------
243// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
244etiss_uint8 rs2 = 0;
245static BitArrayRange R_rs2_0(4, 2);
246rs2 += R_rs2_0.read(ba) << 0;
247etiss_uint8 uimm = 0;
248static BitArrayRange R_uimm_6(5, 5);
249uimm += R_uimm_6.read(ba) << 6;
250static BitArrayRange R_uimm_2(6, 6);
251uimm += R_uimm_2.read(ba) << 2;
252etiss_uint8 rs1 = 0;
253static BitArrayRange R_rs1_0(9, 7);
254rs1 += R_rs1_0.read(ba) << 0;
255static BitArrayRange R_uimm_3(12, 10);
256uimm += R_uimm_3.read(ba) << 3;
257
258// NOLINTEND(clang-diagnostic-unused-but-set-variable)
259// -----------------------------------------------------------------------------
260
261 {
262 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
263
264 cp.code() = std::string("//CSW\n");
265
266// -----------------------------------------------------------------------------
267cp.code() += "etiss_coverage_count(1, 44);\n";
268{ // block
269cp.code() += "etiss_coverage_count(1, 1189);\n";
270cp.code() += "{ // block\n";
271cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
272cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
273cp.code() += "} // block\n";
274} // block
275{ // block
276cp.code() += "etiss_coverage_count(1, 2303);\n";
277cp.code() += "{ // block\n";
278cp.code() += "etiss_uint64 load_address = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 + 8ULL) + "ULL] + " + std::to_string(uimm) + "ULL;\n";
279cp.code() += "etiss_coverage_count(7, 2288, 2287, 2285, 2284, 2282, 2283, 2286);\n";
280cp.code() += "etiss_uint32 mem_val_0;\n";
281cp.code() += "mem_val_0 = (etiss_int32)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 + 8ULL) + "ULL]);\n";
282cp.code() += "etiss_coverage_count(10, 2302, 2294, 2292, 2290, 2291, 2301, 2299, 2298, 2296, 2297);\n";
283cp.code() += "cpu->exception |= (*(system->dwrite))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 4);\n";
284cp.code() += "if (cpu->exception) { // conditional\n";
285{ // procedure
286cp.code() += "{ // procedure\n";
287cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
288cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
289cp.code() += "} // procedure\n";
290} // procedure
291cp.code() += "} // conditional\n";
292cp.code() += "} // block\n";
293} // block
294cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
295cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
296// -----------------------------------------------------------------------------
297 cp.getAffectedRegisters().add("instructionPointer", 32);
298 }
299 {
300 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
301
302 cp.code() = std::string("//CSW\n");
303
304// -----------------------------------------------------------------------------
305cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
306// -----------------------------------------------------------------------------
307 }
308
309 return true;
310 },
311 0,
312 [] (BitArray & ba, Instruction & instr)
313 {
314// -----------------------------------------------------------------------------
315etiss_uint8 rs2 = 0;
316static BitArrayRange R_rs2_0(4, 2);
317rs2 += R_rs2_0.read(ba) << 0;
318etiss_uint8 uimm = 0;
319static BitArrayRange R_uimm_6(5, 5);
320uimm += R_uimm_6.read(ba) << 6;
321static BitArrayRange R_uimm_2(6, 6);
322uimm += R_uimm_2.read(ba) << 2;
323etiss_uint8 rs1 = 0;
324static BitArrayRange R_rs1_0(9, 7);
325rs1 += R_rs1_0.read(ba) << 0;
326static BitArrayRange R_uimm_3(12, 10);
327uimm += R_uimm_3.read(ba) << 3;
328
329// -----------------------------------------------------------------------------
330
331 std::stringstream ss;
332// -----------------------------------------------------------------------------
333ss << "csw" << " # " << ba << (" [rs2=" + std::to_string(rs2) + " | uimm=" + std::to_string(uimm) + " | rs1=" + std::to_string(rs1) + "]");
334// -----------------------------------------------------------------------------
335 return ss.str();
336 }
337);
338
339// CADDI -----------------------------------------------------------------------
340static InstructionDefinition caddi_imm_rs1 (
341 ISA16_RV64IMACFD,
342 "caddi",
343 (uint64_t) 0x01,
344 (uint64_t) 0xe003,
345 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
346 {
347
348// -----------------------------------------------------------------------------
349
350// -----------------------------------------------------------------------------
351
352// -----------------------------------------------------------------------------
353// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
354etiss_uint8 imm = 0;
355static BitArrayRange R_imm_0(6, 2);
356imm += R_imm_0.read(ba) << 0;
357etiss_uint8 rs1 = 0;
358static BitArrayRange R_rs1_0(11, 7);
359rs1 += R_rs1_0.read(ba) << 0;
360static BitArrayRange R_imm_5(12, 12);
361imm += R_imm_5.read(ba) << 5;
362
363// NOLINTEND(clang-diagnostic-unused-but-set-variable)
364// -----------------------------------------------------------------------------
365
366 {
367 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
368
369 cp.code() = std::string("//CADDI\n");
370
371// -----------------------------------------------------------------------------
372cp.code() += "etiss_coverage_count(1, 45);\n";
373{ // block
374cp.code() += "etiss_coverage_count(1, 1189);\n";
375cp.code() += "{ // block\n";
376cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
377cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
378cp.code() += "} // block\n";
379} // block
380cp.code() += "etiss_coverage_count(1, 2304);\n";
381if ((rs1 % 32ULL) != 0LL) { // conditional
382cp.code() += "etiss_coverage_count(5, 2310, 2307, 2305, 2308, 2309);\n";
383cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL] = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL] + " + std::to_string(((etiss_int8)(((etiss_int8)imm) << (2)) >> (2))) + "LL;\n";
384cp.code() += "etiss_coverage_count(10, 2325, 2315, 2314, 2312, 2324, 2320, 2319, 2317, 2323, 2321);\n";
385} // conditional
386cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
387cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
388// -----------------------------------------------------------------------------
389 cp.getAffectedRegisters().add("instructionPointer", 32);
390 }
391
392 return true;
393 },
394 0,
395 [] (BitArray & ba, Instruction & instr)
396 {
397// -----------------------------------------------------------------------------
398etiss_uint8 imm = 0;
399static BitArrayRange R_imm_0(6, 2);
400imm += R_imm_0.read(ba) << 0;
401etiss_uint8 rs1 = 0;
402static BitArrayRange R_rs1_0(11, 7);
403rs1 += R_rs1_0.read(ba) << 0;
404static BitArrayRange R_imm_5(12, 12);
405imm += R_imm_5.read(ba) << 5;
406
407// -----------------------------------------------------------------------------
408
409 std::stringstream ss;
410// -----------------------------------------------------------------------------
411ss << "caddi" << " # " << ba << (" [imm=" + std::to_string(imm) + " | rs1=" + std::to_string(rs1) + "]");
412// -----------------------------------------------------------------------------
413 return ss.str();
414 }
415);
416
417// CNOP ------------------------------------------------------------------------
418static InstructionDefinition cnop_nzimm (
419 ISA16_RV64IMACFD,
420 "cnop",
421 (uint64_t) 0x01,
422 (uint64_t) 0xef83,
423 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
424 {
425
426// -----------------------------------------------------------------------------
427
428// -----------------------------------------------------------------------------
429
430// -----------------------------------------------------------------------------
431// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
432etiss_uint8 nzimm = 0;
433static BitArrayRange R_nzimm_0(6, 2);
434nzimm += R_nzimm_0.read(ba) << 0;
435static BitArrayRange R_nzimm_5(12, 12);
436nzimm += R_nzimm_5.read(ba) << 5;
437
438// NOLINTEND(clang-diagnostic-unused-but-set-variable)
439// -----------------------------------------------------------------------------
440
441 {
442 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
443
444 cp.code() = std::string("//CNOP\n");
445
446// -----------------------------------------------------------------------------
447cp.code() += "etiss_coverage_count(1, 46);\n";
448{ // block
449cp.code() += "etiss_coverage_count(1, 1189);\n";
450cp.code() += "{ // block\n";
451cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
452cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
453cp.code() += "} // block\n";
454} // block
455{ // block
456cp.code() += "etiss_coverage_count(1, 2326);\n";
457cp.code() += "{ // block\n";
458cp.code() += "} // block\n";
459} // block
460cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
461cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
462// -----------------------------------------------------------------------------
463 cp.getAffectedRegisters().add("instructionPointer", 32);
464 }
465
466 return true;
467 },
468 0,
469 [] (BitArray & ba, Instruction & instr)
470 {
471// -----------------------------------------------------------------------------
472etiss_uint8 nzimm = 0;
473static BitArrayRange R_nzimm_0(6, 2);
474nzimm += R_nzimm_0.read(ba) << 0;
475static BitArrayRange R_nzimm_5(12, 12);
476nzimm += R_nzimm_5.read(ba) << 5;
477
478// -----------------------------------------------------------------------------
479
480 std::stringstream ss;
481// -----------------------------------------------------------------------------
482ss << "cnop" << " # " << ba << (" [nzimm=" + std::to_string(nzimm) + "]");
483// -----------------------------------------------------------------------------
484 return ss.str();
485 }
486);
487
488// CLI -------------------------------------------------------------------------
489static InstructionDefinition cli_imm_rd (
490 ISA16_RV64IMACFD,
491 "cli",
492 (uint64_t) 0x4001,
493 (uint64_t) 0xe003,
494 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
495 {
496
497// -----------------------------------------------------------------------------
498
499// -----------------------------------------------------------------------------
500
501// -----------------------------------------------------------------------------
502// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
503etiss_uint8 imm = 0;
504static BitArrayRange R_imm_0(6, 2);
505imm += R_imm_0.read(ba) << 0;
506etiss_uint8 rd = 0;
507static BitArrayRange R_rd_0(11, 7);
508rd += R_rd_0.read(ba) << 0;
509static BitArrayRange R_imm_5(12, 12);
510imm += R_imm_5.read(ba) << 5;
511
512// NOLINTEND(clang-diagnostic-unused-but-set-variable)
513// -----------------------------------------------------------------------------
514
515 {
516 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
517
518 cp.code() = std::string("//CLI\n");
519
520// -----------------------------------------------------------------------------
521cp.code() += "etiss_coverage_count(1, 48);\n";
522{ // block
523cp.code() += "etiss_coverage_count(1, 1189);\n";
524cp.code() += "{ // block\n";
525cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
526cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
527cp.code() += "} // block\n";
528} // block
529{ // block
530cp.code() += "etiss_coverage_count(1, 2358);\n";
531cp.code() += "{ // block\n";
532cp.code() += "etiss_coverage_count(1, 2342);\n";
533if ((rd % 32ULL) != 0LL) { // conditional
534cp.code() += "etiss_coverage_count(5, 2348, 2345, 2343, 2346, 2347);\n";
535cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = " + std::to_string(((etiss_int8)(((etiss_int8)imm) << (2)) >> (2))) + "LL;\n";
536cp.code() += "etiss_coverage_count(6, 2357, 2353, 2352, 2350, 2356, 2354);\n";
537} // conditional
538cp.code() += "} // block\n";
539} // block
540cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
541cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
542// -----------------------------------------------------------------------------
543 cp.getAffectedRegisters().add("instructionPointer", 32);
544 }
545
546 return true;
547 },
548 0,
549 [] (BitArray & ba, Instruction & instr)
550 {
551// -----------------------------------------------------------------------------
552etiss_uint8 imm = 0;
553static BitArrayRange R_imm_0(6, 2);
554imm += R_imm_0.read(ba) << 0;
555etiss_uint8 rd = 0;
556static BitArrayRange R_rd_0(11, 7);
557rd += R_rd_0.read(ba) << 0;
558static BitArrayRange R_imm_5(12, 12);
559imm += R_imm_5.read(ba) << 5;
560
561// -----------------------------------------------------------------------------
562
563 std::stringstream ss;
564// -----------------------------------------------------------------------------
565ss << "cli" << " # " << ba << (" [imm=" + std::to_string(imm) + " | rd=" + std::to_string(rd) + "]");
566// -----------------------------------------------------------------------------
567 return ss.str();
568 }
569);
570
571// CLUI ------------------------------------------------------------------------
572static InstructionDefinition clui_imm_rd (
573 ISA16_RV64IMACFD,
574 "clui",
575 (uint64_t) 0x6001,
576 (uint64_t) 0xe003,
577 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
578 {
579
580// -----------------------------------------------------------------------------
581
582// -----------------------------------------------------------------------------
583
584// -----------------------------------------------------------------------------
585// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
586etiss_uint32 imm = 0;
587static BitArrayRange R_imm_12(6, 2);
588imm += R_imm_12.read(ba) << 12;
589etiss_uint8 rd = 0;
590static BitArrayRange R_rd_0(11, 7);
591rd += R_rd_0.read(ba) << 0;
592static BitArrayRange R_imm_17(12, 12);
593imm += R_imm_17.read(ba) << 17;
594
595// NOLINTEND(clang-diagnostic-unused-but-set-variable)
596// -----------------------------------------------------------------------------
597
598 {
599 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
600
601 cp.code() = std::string("//CLUI\n");
602
603// -----------------------------------------------------------------------------
604cp.code() += "etiss_coverage_count(1, 49);\n";
605{ // block
606cp.code() += "etiss_coverage_count(1, 1189);\n";
607cp.code() += "{ // block\n";
608cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
609cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
610cp.code() += "} // block\n";
611} // block
612{ // block
613cp.code() += "etiss_coverage_count(1, 2382);\n";
614cp.code() += "{ // block\n";
615cp.code() += "etiss_coverage_count(1, 2359);\n";
616if (imm == 0LL) { // conditional
617cp.code() += "etiss_coverage_count(3, 2362, 2360, 2361);\n";
618{ // procedure
619cp.code() += "{ // procedure\n";
620cp.code() += "RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";
621cp.code() += "etiss_coverage_count(2, 2365, 2363);\n";
622cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
623cp.code() += "} // procedure\n";
624} // procedure
625} // conditional
626cp.code() += "etiss_coverage_count(1, 2366);\n";
627if ((rd % 32ULL) != 0LL) { // conditional
628cp.code() += "etiss_coverage_count(5, 2372, 2369, 2367, 2370, 2371);\n";
629cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = " + std::to_string(((etiss_int32)(((etiss_int32)imm) << (14)) >> (14))) + "LL;\n";
630cp.code() += "etiss_coverage_count(6, 2381, 2377, 2376, 2374, 2380, 2378);\n";
631} // conditional
632cp.code() += "} // block\n";
633} // block
634cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
635cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
636// -----------------------------------------------------------------------------
637 cp.getAffectedRegisters().add("instructionPointer", 32);
638 }
639 {
640 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
641
642 cp.code() = std::string("//CLUI\n");
643
644// -----------------------------------------------------------------------------
645cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
646// -----------------------------------------------------------------------------
647 }
648
649 return true;
650 },
651 0,
652 [] (BitArray & ba, Instruction & instr)
653 {
654// -----------------------------------------------------------------------------
655etiss_uint32 imm = 0;
656static BitArrayRange R_imm_12(6, 2);
657imm += R_imm_12.read(ba) << 12;
658etiss_uint8 rd = 0;
659static BitArrayRange R_rd_0(11, 7);
660rd += R_rd_0.read(ba) << 0;
661static BitArrayRange R_imm_17(12, 12);
662imm += R_imm_17.read(ba) << 17;
663
664// -----------------------------------------------------------------------------
665
666 std::stringstream ss;
667// -----------------------------------------------------------------------------
668ss << "clui" << " # " << ba << (" [imm=" + std::to_string(imm) + " | rd=" + std::to_string(rd) + "]");
669// -----------------------------------------------------------------------------
670 return ss.str();
671 }
672);
673
674// CADDI16SP -------------------------------------------------------------------
675static InstructionDefinition caddi16sp_nzimm (
676 ISA16_RV64IMACFD,
677 "caddi16sp",
678 (uint64_t) 0x6101,
679 (uint64_t) 0xef83,
680 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
681 {
682
683// -----------------------------------------------------------------------------
684
685// -----------------------------------------------------------------------------
686
687// -----------------------------------------------------------------------------
688// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
689etiss_uint16 nzimm = 0;
690static BitArrayRange R_nzimm_5(2, 2);
691nzimm += R_nzimm_5.read(ba) << 5;
692static BitArrayRange R_nzimm_7(4, 3);
693nzimm += R_nzimm_7.read(ba) << 7;
694static BitArrayRange R_nzimm_6(5, 5);
695nzimm += R_nzimm_6.read(ba) << 6;
696static BitArrayRange R_nzimm_4(6, 6);
697nzimm += R_nzimm_4.read(ba) << 4;
698static BitArrayRange R_nzimm_9(12, 12);
699nzimm += R_nzimm_9.read(ba) << 9;
700
701// NOLINTEND(clang-diagnostic-unused-but-set-variable)
702// -----------------------------------------------------------------------------
703
704 {
705 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
706
707 cp.code() = std::string("//CADDI16SP\n");
708
709// -----------------------------------------------------------------------------
710cp.code() += "etiss_coverage_count(1, 50);\n";
711{ // block
712cp.code() += "etiss_coverage_count(1, 1189);\n";
713cp.code() += "{ // block\n";
714cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
715cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
716cp.code() += "} // block\n";
717} // block
718cp.code() += "etiss_coverage_count(1, 2383);\n";
719if (nzimm) { // conditional
720cp.code() += "etiss_coverage_count(1, 2384);\n";
721cp.code() += "*((RV64IMACFD*)cpu)->X[2ULL] = *((RV64IMACFD*)cpu)->X[2ULL] + " + std::to_string(((etiss_int16)(((etiss_int16)nzimm) << (6)) >> (6))) + "LL;\n";
722cp.code() += "etiss_coverage_count(8, 2395, 2387, 2386, 2394, 2390, 2389, 2393, 2391);\n";
723} // conditional
724else { // conditional
725{ // procedure
726cp.code() += "{ // procedure\n";
727cp.code() += "RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";
728cp.code() += "etiss_coverage_count(2, 2398, 2396);\n";
729cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
730cp.code() += "} // procedure\n";
731} // procedure
732} // conditional
733cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
734cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
735// -----------------------------------------------------------------------------
736 cp.getAffectedRegisters().add("instructionPointer", 32);
737 }
738 {
739 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
740
741 cp.code() = std::string("//CADDI16SP\n");
742
743// -----------------------------------------------------------------------------
744cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
745// -----------------------------------------------------------------------------
746 }
747
748 return true;
749 },
750 0,
751 [] (BitArray & ba, Instruction & instr)
752 {
753// -----------------------------------------------------------------------------
754etiss_uint16 nzimm = 0;
755static BitArrayRange R_nzimm_5(2, 2);
756nzimm += R_nzimm_5.read(ba) << 5;
757static BitArrayRange R_nzimm_7(4, 3);
758nzimm += R_nzimm_7.read(ba) << 7;
759static BitArrayRange R_nzimm_6(5, 5);
760nzimm += R_nzimm_6.read(ba) << 6;
761static BitArrayRange R_nzimm_4(6, 6);
762nzimm += R_nzimm_4.read(ba) << 4;
763static BitArrayRange R_nzimm_9(12, 12);
764nzimm += R_nzimm_9.read(ba) << 9;
765
766// -----------------------------------------------------------------------------
767
768 std::stringstream ss;
769// -----------------------------------------------------------------------------
770ss << "caddi16sp" << " # " << ba << (" [nzimm=" + std::to_string(nzimm) + "]");
771// -----------------------------------------------------------------------------
772 return ss.str();
773 }
774);
775
776// __reserved_clui -------------------------------------------------------------
777static InstructionDefinition __reserved_clui_rd (
778 ISA16_RV64IMACFD,
779 "__reserved_clui",
780 (uint64_t) 0x6001,
781 (uint64_t) 0xf07f,
782 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
783 {
784
785// -----------------------------------------------------------------------------
786
787// -----------------------------------------------------------------------------
788
789// -----------------------------------------------------------------------------
790// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
791etiss_uint8 rd = 0;
792static BitArrayRange R_rd_0(11, 7);
793rd += R_rd_0.read(ba) << 0;
794
795// NOLINTEND(clang-diagnostic-unused-but-set-variable)
796// -----------------------------------------------------------------------------
797
798 {
799 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
800
801 cp.code() = std::string("//__reserved_clui\n");
802
803// -----------------------------------------------------------------------------
804cp.code() += "etiss_coverage_count(1, 51);\n";
805{ // block
806cp.code() += "etiss_coverage_count(1, 1189);\n";
807cp.code() += "{ // block\n";
808cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
809cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
810cp.code() += "} // block\n";
811} // block
812{ // procedure
813cp.code() += "{ // procedure\n";
814cp.code() += "RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";
815cp.code() += "etiss_coverage_count(2, 2401, 2399);\n";
816cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
817cp.code() += "} // procedure\n";
818} // procedure
819cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
820cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
821// -----------------------------------------------------------------------------
822 cp.getAffectedRegisters().add("instructionPointer", 32);
823 }
824 {
825 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
826
827 cp.code() = std::string("//__reserved_clui\n");
828
829// -----------------------------------------------------------------------------
830cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
831// -----------------------------------------------------------------------------
832 }
833
834 return true;
835 },
836 0,
837 [] (BitArray & ba, Instruction & instr)
838 {
839// -----------------------------------------------------------------------------
840etiss_uint8 rd = 0;
841static BitArrayRange R_rd_0(11, 7);
842rd += R_rd_0.read(ba) << 0;
843
844// -----------------------------------------------------------------------------
845
846 std::stringstream ss;
847// -----------------------------------------------------------------------------
848ss << "__reserved_clui" << " # " << ba << (" [rd=" + std::to_string(rd) + "]");
849// -----------------------------------------------------------------------------
850 return ss.str();
851 }
852);
853
854// CANDI -----------------------------------------------------------------------
855static InstructionDefinition candi_imm_rs1 (
856 ISA16_RV64IMACFD,
857 "candi",
858 (uint64_t) 0x8801,
859 (uint64_t) 0xec03,
860 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
861 {
862
863// -----------------------------------------------------------------------------
864
865// -----------------------------------------------------------------------------
866
867// -----------------------------------------------------------------------------
868// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
869etiss_uint8 imm = 0;
870static BitArrayRange R_imm_0(6, 2);
871imm += R_imm_0.read(ba) << 0;
872etiss_uint8 rs1 = 0;
873static BitArrayRange R_rs1_0(9, 7);
874rs1 += R_rs1_0.read(ba) << 0;
875static BitArrayRange R_imm_5(12, 12);
876imm += R_imm_5.read(ba) << 5;
877
878// NOLINTEND(clang-diagnostic-unused-but-set-variable)
879// -----------------------------------------------------------------------------
880
881 {
882 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
883
884 cp.code() = std::string("//CANDI\n");
885
886// -----------------------------------------------------------------------------
887cp.code() += "etiss_coverage_count(1, 54);\n";
888{ // block
889cp.code() += "etiss_coverage_count(1, 1189);\n";
890cp.code() += "{ // block\n";
891cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
892cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
893cp.code() += "} // block\n";
894} // block
895{ // block
896cp.code() += "etiss_coverage_count(1, 2477);\n";
897cp.code() += "{ // block\n";
898cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 + 8ULL) + "ULL] = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 + 8ULL) + "ULL] & " + std::to_string(((etiss_int8)(((etiss_int8)imm) << (2)) >> (2))) + "LL;\n";
899cp.code() += "etiss_coverage_count(12, 2476, 2466, 2465, 2463, 2464, 2475, 2471, 2470, 2468, 2469, 2474, 2472);\n";
900cp.code() += "} // block\n";
901} // block
902cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
903cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
904// -----------------------------------------------------------------------------
905 cp.getAffectedRegisters().add("instructionPointer", 32);
906 }
907
908 return true;
909 },
910 0,
911 [] (BitArray & ba, Instruction & instr)
912 {
913// -----------------------------------------------------------------------------
914etiss_uint8 imm = 0;
915static BitArrayRange R_imm_0(6, 2);
916imm += R_imm_0.read(ba) << 0;
917etiss_uint8 rs1 = 0;
918static BitArrayRange R_rs1_0(9, 7);
919rs1 += R_rs1_0.read(ba) << 0;
920static BitArrayRange R_imm_5(12, 12);
921imm += R_imm_5.read(ba) << 5;
922
923// -----------------------------------------------------------------------------
924
925 std::stringstream ss;
926// -----------------------------------------------------------------------------
927ss << "candi" << " # " << ba << (" [imm=" + std::to_string(imm) + " | rs1=" + std::to_string(rs1) + "]");
928// -----------------------------------------------------------------------------
929 return ss.str();
930 }
931);
932
933// CSUB ------------------------------------------------------------------------
934static InstructionDefinition csub_rs2_rd (
935 ISA16_RV64IMACFD,
936 "csub",
937 (uint64_t) 0x8c01,
938 (uint64_t) 0xfc63,
939 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
940 {
941
942// -----------------------------------------------------------------------------
943
944// -----------------------------------------------------------------------------
945
946// -----------------------------------------------------------------------------
947// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
948etiss_uint8 rs2 = 0;
949static BitArrayRange R_rs2_0(4, 2);
950rs2 += R_rs2_0.read(ba) << 0;
951etiss_uint8 rd = 0;
952static BitArrayRange R_rd_0(9, 7);
953rd += R_rd_0.read(ba) << 0;
954
955// NOLINTEND(clang-diagnostic-unused-but-set-variable)
956// -----------------------------------------------------------------------------
957
958 {
959 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
960
961 cp.code() = std::string("//CSUB\n");
962
963// -----------------------------------------------------------------------------
964cp.code() += "etiss_coverage_count(1, 55);\n";
965{ // block
966cp.code() += "etiss_coverage_count(1, 1189);\n";
967cp.code() += "{ // block\n";
968cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
969cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
970cp.code() += "} // block\n";
971} // block
972{ // block
973cp.code() += "etiss_coverage_count(1, 2495);\n";
974cp.code() += "{ // block\n";
975cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd + 8ULL) + "ULL] = *((RV64IMACFD*)cpu)->X[" + std::to_string(rd + 8ULL) + "ULL] - *((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 + 8ULL) + "ULL];\n";
976cp.code() += "etiss_coverage_count(14, 2494, 2482, 2481, 2479, 2480, 2493, 2487, 2486, 2484, 2485, 2492, 2491, 2489, 2490);\n";
977cp.code() += "} // block\n";
978} // block
979cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
980cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
981// -----------------------------------------------------------------------------
982 cp.getAffectedRegisters().add("instructionPointer", 32);
983 }
984
985 return true;
986 },
987 0,
988 [] (BitArray & ba, Instruction & instr)
989 {
990// -----------------------------------------------------------------------------
991etiss_uint8 rs2 = 0;
992static BitArrayRange R_rs2_0(4, 2);
993rs2 += R_rs2_0.read(ba) << 0;
994etiss_uint8 rd = 0;
995static BitArrayRange R_rd_0(9, 7);
996rd += R_rd_0.read(ba) << 0;
997
998// -----------------------------------------------------------------------------
999
1000 std::stringstream ss;
1001// -----------------------------------------------------------------------------
1002ss << "csub" << " # " << ba << (" [rs2=" + std::to_string(rs2) + " | rd=" + std::to_string(rd) + "]");
1003// -----------------------------------------------------------------------------
1004 return ss.str();
1005 }
1006);
1007
1008// CXOR ------------------------------------------------------------------------
1009static InstructionDefinition cxor_rs2_rd (
1010 ISA16_RV64IMACFD,
1011 "cxor",
1012 (uint64_t) 0x8c21,
1013 (uint64_t) 0xfc63,
1014 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
1015 {
1016
1017// -----------------------------------------------------------------------------
1018
1019// -----------------------------------------------------------------------------
1020
1021// -----------------------------------------------------------------------------
1022// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
1023etiss_uint8 rs2 = 0;
1024static BitArrayRange R_rs2_0(4, 2);
1025rs2 += R_rs2_0.read(ba) << 0;
1026etiss_uint8 rd = 0;
1027static BitArrayRange R_rd_0(9, 7);
1028rd += R_rd_0.read(ba) << 0;
1029
1030// NOLINTEND(clang-diagnostic-unused-but-set-variable)
1031// -----------------------------------------------------------------------------
1032
1033 {
1034 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
1035
1036 cp.code() = std::string("//CXOR\n");
1037
1038// -----------------------------------------------------------------------------
1039cp.code() += "etiss_coverage_count(1, 56);\n";
1040{ // block
1041cp.code() += "etiss_coverage_count(1, 1189);\n";
1042cp.code() += "{ // block\n";
1043cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
1044cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
1045cp.code() += "} // block\n";
1046} // block
1047{ // block
1048cp.code() += "etiss_coverage_count(1, 2513);\n";
1049cp.code() += "{ // block\n";
1050cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd + 8ULL) + "ULL] = *((RV64IMACFD*)cpu)->X[" + std::to_string(rd + 8ULL) + "ULL] ^ *((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 + 8ULL) + "ULL];\n";
1051cp.code() += "etiss_coverage_count(14, 2512, 2500, 2499, 2497, 2498, 2511, 2505, 2504, 2502, 2503, 2510, 2509, 2507, 2508);\n";
1052cp.code() += "} // block\n";
1053} // block
1054cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
1055cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
1056// -----------------------------------------------------------------------------
1057 cp.getAffectedRegisters().add("instructionPointer", 32);
1058 }
1059
1060 return true;
1061 },
1062 0,
1063 [] (BitArray & ba, Instruction & instr)
1064 {
1065// -----------------------------------------------------------------------------
1066etiss_uint8 rs2 = 0;
1067static BitArrayRange R_rs2_0(4, 2);
1068rs2 += R_rs2_0.read(ba) << 0;
1069etiss_uint8 rd = 0;
1070static BitArrayRange R_rd_0(9, 7);
1071rd += R_rd_0.read(ba) << 0;
1072
1073// -----------------------------------------------------------------------------
1074
1075 std::stringstream ss;
1076// -----------------------------------------------------------------------------
1077ss << "cxor" << " # " << ba << (" [rs2=" + std::to_string(rs2) + " | rd=" + std::to_string(rd) + "]");
1078// -----------------------------------------------------------------------------
1079 return ss.str();
1080 }
1081);
1082
1083// COR -------------------------------------------------------------------------
1084static InstructionDefinition cor_rs2_rd (
1085 ISA16_RV64IMACFD,
1086 "cor",
1087 (uint64_t) 0x8c41,
1088 (uint64_t) 0xfc63,
1089 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
1090 {
1091
1092// -----------------------------------------------------------------------------
1093
1094// -----------------------------------------------------------------------------
1095
1096// -----------------------------------------------------------------------------
1097// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
1098etiss_uint8 rs2 = 0;
1099static BitArrayRange R_rs2_0(4, 2);
1100rs2 += R_rs2_0.read(ba) << 0;
1101etiss_uint8 rd = 0;
1102static BitArrayRange R_rd_0(9, 7);
1103rd += R_rd_0.read(ba) << 0;
1104
1105// NOLINTEND(clang-diagnostic-unused-but-set-variable)
1106// -----------------------------------------------------------------------------
1107
1108 {
1109 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
1110
1111 cp.code() = std::string("//COR\n");
1112
1113// -----------------------------------------------------------------------------
1114cp.code() += "etiss_coverage_count(1, 57);\n";
1115{ // block
1116cp.code() += "etiss_coverage_count(1, 1189);\n";
1117cp.code() += "{ // block\n";
1118cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
1119cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
1120cp.code() += "} // block\n";
1121} // block
1122{ // block
1123cp.code() += "etiss_coverage_count(1, 2531);\n";
1124cp.code() += "{ // block\n";
1125cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd + 8ULL) + "ULL] = *((RV64IMACFD*)cpu)->X[" + std::to_string(rd + 8ULL) + "ULL] | *((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 + 8ULL) + "ULL];\n";
1126cp.code() += "etiss_coverage_count(14, 2530, 2518, 2517, 2515, 2516, 2529, 2523, 2522, 2520, 2521, 2528, 2527, 2525, 2526);\n";
1127cp.code() += "} // block\n";
1128} // block
1129cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
1130cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
1131// -----------------------------------------------------------------------------
1132 cp.getAffectedRegisters().add("instructionPointer", 32);
1133 }
1134
1135 return true;
1136 },
1137 0,
1138 [] (BitArray & ba, Instruction & instr)
1139 {
1140// -----------------------------------------------------------------------------
1141etiss_uint8 rs2 = 0;
1142static BitArrayRange R_rs2_0(4, 2);
1143rs2 += R_rs2_0.read(ba) << 0;
1144etiss_uint8 rd = 0;
1145static BitArrayRange R_rd_0(9, 7);
1146rd += R_rd_0.read(ba) << 0;
1147
1148// -----------------------------------------------------------------------------
1149
1150 std::stringstream ss;
1151// -----------------------------------------------------------------------------
1152ss << "cor" << " # " << ba << (" [rs2=" + std::to_string(rs2) + " | rd=" + std::to_string(rd) + "]");
1153// -----------------------------------------------------------------------------
1154 return ss.str();
1155 }
1156);
1157
1158// CAND ------------------------------------------------------------------------
1159static InstructionDefinition cand_rs2_rd (
1160 ISA16_RV64IMACFD,
1161 "cand",
1162 (uint64_t) 0x8c61,
1163 (uint64_t) 0xfc63,
1164 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
1165 {
1166
1167// -----------------------------------------------------------------------------
1168
1169// -----------------------------------------------------------------------------
1170
1171// -----------------------------------------------------------------------------
1172// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
1173etiss_uint8 rs2 = 0;
1174static BitArrayRange R_rs2_0(4, 2);
1175rs2 += R_rs2_0.read(ba) << 0;
1176etiss_uint8 rd = 0;
1177static BitArrayRange R_rd_0(9, 7);
1178rd += R_rd_0.read(ba) << 0;
1179
1180// NOLINTEND(clang-diagnostic-unused-but-set-variable)
1181// -----------------------------------------------------------------------------
1182
1183 {
1184 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
1185
1186 cp.code() = std::string("//CAND\n");
1187
1188// -----------------------------------------------------------------------------
1189cp.code() += "etiss_coverage_count(1, 58);\n";
1190{ // block
1191cp.code() += "etiss_coverage_count(1, 1189);\n";
1192cp.code() += "{ // block\n";
1193cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
1194cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
1195cp.code() += "} // block\n";
1196} // block
1197{ // block
1198cp.code() += "etiss_coverage_count(1, 2549);\n";
1199cp.code() += "{ // block\n";
1200cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd + 8ULL) + "ULL] = *((RV64IMACFD*)cpu)->X[" + std::to_string(rd + 8ULL) + "ULL] & *((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 + 8ULL) + "ULL];\n";
1201cp.code() += "etiss_coverage_count(14, 2548, 2536, 2535, 2533, 2534, 2547, 2541, 2540, 2538, 2539, 2546, 2545, 2543, 2544);\n";
1202cp.code() += "} // block\n";
1203} // block
1204cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
1205cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
1206// -----------------------------------------------------------------------------
1207 cp.getAffectedRegisters().add("instructionPointer", 32);
1208 }
1209
1210 return true;
1211 },
1212 0,
1213 [] (BitArray & ba, Instruction & instr)
1214 {
1215// -----------------------------------------------------------------------------
1216etiss_uint8 rs2 = 0;
1217static BitArrayRange R_rs2_0(4, 2);
1218rs2 += R_rs2_0.read(ba) << 0;
1219etiss_uint8 rd = 0;
1220static BitArrayRange R_rd_0(9, 7);
1221rd += R_rd_0.read(ba) << 0;
1222
1223// -----------------------------------------------------------------------------
1224
1225 std::stringstream ss;
1226// -----------------------------------------------------------------------------
1227ss << "cand" << " # " << ba << (" [rs2=" + std::to_string(rs2) + " | rd=" + std::to_string(rd) + "]");
1228// -----------------------------------------------------------------------------
1229 return ss.str();
1230 }
1231);
1232
1233// CJ --------------------------------------------------------------------------
1234static InstructionDefinition cj_imm (
1235 ISA16_RV64IMACFD,
1236 "cj",
1237 (uint64_t) 0xa001,
1238 (uint64_t) 0xe003,
1239 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
1240 {
1241
1242// -----------------------------------------------------------------------------
1243
1244// -----------------------------------------------------------------------------
1245
1246// -----------------------------------------------------------------------------
1247// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
1248etiss_uint16 imm = 0;
1249static BitArrayRange R_imm_5(2, 2);
1250imm += R_imm_5.read(ba) << 5;
1251static BitArrayRange R_imm_1(5, 3);
1252imm += R_imm_1.read(ba) << 1;
1253static BitArrayRange R_imm_7(6, 6);
1254imm += R_imm_7.read(ba) << 7;
1255static BitArrayRange R_imm_6(7, 7);
1256imm += R_imm_6.read(ba) << 6;
1257static BitArrayRange R_imm_10(8, 8);
1258imm += R_imm_10.read(ba) << 10;
1259static BitArrayRange R_imm_8(10, 9);
1260imm += R_imm_8.read(ba) << 8;
1261static BitArrayRange R_imm_4(11, 11);
1262imm += R_imm_4.read(ba) << 4;
1263static BitArrayRange R_imm_11(12, 12);
1264imm += R_imm_11.read(ba) << 11;
1265
1266// NOLINTEND(clang-diagnostic-unused-but-set-variable)
1267// -----------------------------------------------------------------------------
1268
1269 {
1270 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
1271
1272 cp.code() = std::string("//CJ\n");
1273
1274// -----------------------------------------------------------------------------
1275cp.code() += "etiss_coverage_count(1, 59);\n";
1276{ // block
1277cp.code() += "etiss_coverage_count(1, 1189);\n";
1278cp.code() += "{ // block\n";
1279cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
1280cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
1281cp.code() += "} // block\n";
1282} // block
1283cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + ((etiss_int16)(((etiss_int16)imm) << (4)) >> (4))) + "LL;\n";
1284cp.code() += "etiss_coverage_count(6, 2556, 2550, 2555, 2551, 2554, 2552);\n";
1285cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
1286cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
1287// -----------------------------------------------------------------------------
1288 cp.getAffectedRegisters().add("instructionPointer", 32);
1289 }
1290 {
1291 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
1292
1293 cp.code() = std::string("//CJ\n");
1294
1295// -----------------------------------------------------------------------------
1296cp.code() += "return cpu->exception;\n";
1297// -----------------------------------------------------------------------------
1298 }
1299
1300 return true;
1301 },
1302 0,
1303 [] (BitArray & ba, Instruction & instr)
1304 {
1305// -----------------------------------------------------------------------------
1306etiss_uint16 imm = 0;
1307static BitArrayRange R_imm_5(2, 2);
1308imm += R_imm_5.read(ba) << 5;
1309static BitArrayRange R_imm_1(5, 3);
1310imm += R_imm_1.read(ba) << 1;
1311static BitArrayRange R_imm_7(6, 6);
1312imm += R_imm_7.read(ba) << 7;
1313static BitArrayRange R_imm_6(7, 7);
1314imm += R_imm_6.read(ba) << 6;
1315static BitArrayRange R_imm_10(8, 8);
1316imm += R_imm_10.read(ba) << 10;
1317static BitArrayRange R_imm_8(10, 9);
1318imm += R_imm_8.read(ba) << 8;
1319static BitArrayRange R_imm_4(11, 11);
1320imm += R_imm_4.read(ba) << 4;
1321static BitArrayRange R_imm_11(12, 12);
1322imm += R_imm_11.read(ba) << 11;
1323
1324// -----------------------------------------------------------------------------
1325
1326 std::stringstream ss;
1327// -----------------------------------------------------------------------------
1328ss << "cj" << " # " << ba << (" [imm=" + std::to_string(imm) + "]");
1329// -----------------------------------------------------------------------------
1330 return ss.str();
1331 }
1332);
1333
1334// CBEQZ -----------------------------------------------------------------------
1335static InstructionDefinition cbeqz_imm_rs1 (
1336 ISA16_RV64IMACFD,
1337 "cbeqz",
1338 (uint64_t) 0xc001,
1339 (uint64_t) 0xe003,
1340 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
1341 {
1342
1343// -----------------------------------------------------------------------------
1344
1345// -----------------------------------------------------------------------------
1346
1347// -----------------------------------------------------------------------------
1348// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
1349etiss_uint16 imm = 0;
1350static BitArrayRange R_imm_5(2, 2);
1351imm += R_imm_5.read(ba) << 5;
1352static BitArrayRange R_imm_1(4, 3);
1353imm += R_imm_1.read(ba) << 1;
1354static BitArrayRange R_imm_6(6, 5);
1355imm += R_imm_6.read(ba) << 6;
1356etiss_uint8 rs1 = 0;
1357static BitArrayRange R_rs1_0(9, 7);
1358rs1 += R_rs1_0.read(ba) << 0;
1359static BitArrayRange R_imm_3(11, 10);
1360imm += R_imm_3.read(ba) << 3;
1361static BitArrayRange R_imm_8(12, 12);
1362imm += R_imm_8.read(ba) << 8;
1363
1364// NOLINTEND(clang-diagnostic-unused-but-set-variable)
1365// -----------------------------------------------------------------------------
1366
1367 {
1368 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
1369
1370 cp.code() = std::string("//CBEQZ\n");
1371
1372// -----------------------------------------------------------------------------
1373cp.code() += "etiss_coverage_count(1, 60);\n";
1374{ // block
1375cp.code() += "etiss_coverage_count(1, 1189);\n";
1376cp.code() += "{ // block\n";
1377cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
1378cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
1379cp.code() += "} // block\n";
1380} // block
1381cp.code() += "etiss_coverage_count(1, 2557);\n";
1382cp.code() += "if (*((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 + 8ULL) + "ULL] == 0LL) { // conditional\n";
1383cp.code() += "etiss_coverage_count(6, 2564, 2562, 2561, 2559, 2560, 2563);\n";
1384cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + ((etiss_int16)(((etiss_int16)imm) << (7)) >> (7))) + "LL;\n";
1385cp.code() += "etiss_coverage_count(6, 2571, 2565, 2570, 2566, 2569, 2567);\n";
1386cp.code() += "} // conditional\n";
1387cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
1388cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
1389// -----------------------------------------------------------------------------
1390 cp.getAffectedRegisters().add("instructionPointer", 32);
1391 }
1392 {
1393 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
1394
1395 cp.code() = std::string("//CBEQZ\n");
1396
1397// -----------------------------------------------------------------------------
1398cp.code() += "if (cpu->nextPc != " + std::to_string(ic.current_address_ + 2) + "ULL) return cpu->exception;\n";
1399// -----------------------------------------------------------------------------
1400 }
1401
1402 return true;
1403 },
1404 0,
1405 [] (BitArray & ba, Instruction & instr)
1406 {
1407// -----------------------------------------------------------------------------
1408etiss_uint16 imm = 0;
1409static BitArrayRange R_imm_5(2, 2);
1410imm += R_imm_5.read(ba) << 5;
1411static BitArrayRange R_imm_1(4, 3);
1412imm += R_imm_1.read(ba) << 1;
1413static BitArrayRange R_imm_6(6, 5);
1414imm += R_imm_6.read(ba) << 6;
1415etiss_uint8 rs1 = 0;
1416static BitArrayRange R_rs1_0(9, 7);
1417rs1 += R_rs1_0.read(ba) << 0;
1418static BitArrayRange R_imm_3(11, 10);
1419imm += R_imm_3.read(ba) << 3;
1420static BitArrayRange R_imm_8(12, 12);
1421imm += R_imm_8.read(ba) << 8;
1422
1423// -----------------------------------------------------------------------------
1424
1425 std::stringstream ss;
1426// -----------------------------------------------------------------------------
1427ss << "cbeqz" << " # " << ba << (" [imm=" + std::to_string(imm) + " | rs1=" + std::to_string(rs1) + "]");
1428// -----------------------------------------------------------------------------
1429 return ss.str();
1430 }
1431);
1432
1433// CBNEZ -----------------------------------------------------------------------
1434static InstructionDefinition cbnez_imm_rs1 (
1435 ISA16_RV64IMACFD,
1436 "cbnez",
1437 (uint64_t) 0xe001,
1438 (uint64_t) 0xe003,
1439 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
1440 {
1441
1442// -----------------------------------------------------------------------------
1443
1444// -----------------------------------------------------------------------------
1445
1446// -----------------------------------------------------------------------------
1447// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
1448etiss_uint16 imm = 0;
1449static BitArrayRange R_imm_5(2, 2);
1450imm += R_imm_5.read(ba) << 5;
1451static BitArrayRange R_imm_1(4, 3);
1452imm += R_imm_1.read(ba) << 1;
1453static BitArrayRange R_imm_6(6, 5);
1454imm += R_imm_6.read(ba) << 6;
1455etiss_uint8 rs1 = 0;
1456static BitArrayRange R_rs1_0(9, 7);
1457rs1 += R_rs1_0.read(ba) << 0;
1458static BitArrayRange R_imm_3(11, 10);
1459imm += R_imm_3.read(ba) << 3;
1460static BitArrayRange R_imm_8(12, 12);
1461imm += R_imm_8.read(ba) << 8;
1462
1463// NOLINTEND(clang-diagnostic-unused-but-set-variable)
1464// -----------------------------------------------------------------------------
1465
1466 {
1467 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
1468
1469 cp.code() = std::string("//CBNEZ\n");
1470
1471// -----------------------------------------------------------------------------
1472cp.code() += "etiss_coverage_count(1, 61);\n";
1473{ // block
1474cp.code() += "etiss_coverage_count(1, 1189);\n";
1475cp.code() += "{ // block\n";
1476cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
1477cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
1478cp.code() += "} // block\n";
1479} // block
1480cp.code() += "etiss_coverage_count(1, 2572);\n";
1481cp.code() += "if (*((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 + 8ULL) + "ULL] != 0LL) { // conditional\n";
1482cp.code() += "etiss_coverage_count(6, 2579, 2577, 2576, 2574, 2575, 2578);\n";
1483cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + ((etiss_int16)(((etiss_int16)imm) << (7)) >> (7))) + "LL;\n";
1484cp.code() += "etiss_coverage_count(6, 2586, 2580, 2585, 2581, 2584, 2582);\n";
1485cp.code() += "} // conditional\n";
1486cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
1487cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
1488// -----------------------------------------------------------------------------
1489 cp.getAffectedRegisters().add("instructionPointer", 32);
1490 }
1491 {
1492 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
1493
1494 cp.code() = std::string("//CBNEZ\n");
1495
1496// -----------------------------------------------------------------------------
1497cp.code() += "if (cpu->nextPc != " + std::to_string(ic.current_address_ + 2) + "ULL) return cpu->exception;\n";
1498// -----------------------------------------------------------------------------
1499 }
1500
1501 return true;
1502 },
1503 0,
1504 [] (BitArray & ba, Instruction & instr)
1505 {
1506// -----------------------------------------------------------------------------
1507etiss_uint16 imm = 0;
1508static BitArrayRange R_imm_5(2, 2);
1509imm += R_imm_5.read(ba) << 5;
1510static BitArrayRange R_imm_1(4, 3);
1511imm += R_imm_1.read(ba) << 1;
1512static BitArrayRange R_imm_6(6, 5);
1513imm += R_imm_6.read(ba) << 6;
1514etiss_uint8 rs1 = 0;
1515static BitArrayRange R_rs1_0(9, 7);
1516rs1 += R_rs1_0.read(ba) << 0;
1517static BitArrayRange R_imm_3(11, 10);
1518imm += R_imm_3.read(ba) << 3;
1519static BitArrayRange R_imm_8(12, 12);
1520imm += R_imm_8.read(ba) << 8;
1521
1522// -----------------------------------------------------------------------------
1523
1524 std::stringstream ss;
1525// -----------------------------------------------------------------------------
1526ss << "cbnez" << " # " << ba << (" [imm=" + std::to_string(imm) + " | rs1=" + std::to_string(rs1) + "]");
1527// -----------------------------------------------------------------------------
1528 return ss.str();
1529 }
1530);
1531
1532// CLWSP -----------------------------------------------------------------------
1533static InstructionDefinition clwsp_uimm_rd (
1534 ISA16_RV64IMACFD,
1535 "clwsp",
1536 (uint64_t) 0x4002,
1537 (uint64_t) 0xe003,
1538 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
1539 {
1540
1541// -----------------------------------------------------------------------------
1542
1543// -----------------------------------------------------------------------------
1544
1545// -----------------------------------------------------------------------------
1546// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
1547etiss_uint8 uimm = 0;
1548static BitArrayRange R_uimm_6(3, 2);
1549uimm += R_uimm_6.read(ba) << 6;
1550static BitArrayRange R_uimm_2(6, 4);
1551uimm += R_uimm_2.read(ba) << 2;
1552etiss_uint8 rd = 0;
1553static BitArrayRange R_rd_0(11, 7);
1554rd += R_rd_0.read(ba) << 0;
1555static BitArrayRange R_uimm_5(12, 12);
1556uimm += R_uimm_5.read(ba) << 5;
1557
1558// NOLINTEND(clang-diagnostic-unused-but-set-variable)
1559// -----------------------------------------------------------------------------
1560
1561 {
1562 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
1563
1564 cp.code() = std::string("//CLWSP\n");
1565
1566// -----------------------------------------------------------------------------
1567cp.code() += "etiss_coverage_count(1, 63);\n";
1568{ // block
1569cp.code() += "etiss_coverage_count(1, 1189);\n";
1570cp.code() += "{ // block\n";
1571cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
1572cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
1573cp.code() += "} // block\n";
1574} // block
1575{ // block
1576cp.code() += "etiss_coverage_count(1, 2640);\n";
1577cp.code() += "{ // block\n";
1578cp.code() += "etiss_coverage_count(1, 2605);\n";
1579if (rd % 32ULL) { // conditional
1580cp.code() += "etiss_coverage_count(2, 2608, 2606);\n";
1581{ // block
1582cp.code() += "etiss_coverage_count(1, 2636);\n";
1583cp.code() += "{ // block\n";
1584cp.code() += "etiss_uint64 offs = (etiss_uint64)((*((RV64IMACFD*)cpu)->X[2ULL] + " + std::to_string(uimm) + "ULL));\n";
1585cp.code() += "etiss_coverage_count(7, 2618, 2617, 2614, 2612, 2611, 2613, 2615);\n";
1586cp.code() += "etiss_uint32 mem_val_0;\n";
1587cp.code() += "cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";
1588cp.code() += "if (cpu->exception) { // conditional\n";
1589{ // procedure
1590cp.code() += "{ // procedure\n";
1591cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
1592cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
1593cp.code() += "} // procedure\n";
1594} // procedure
1595cp.code() += "} // conditional\n";
1596cp.code() += "etiss_int32 res = mem_val_0;\n";
1597cp.code() += "etiss_coverage_count(5, 2626, 2625, 2623, 2621, 2622);\n";
1598cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = (etiss_int64)(res);\n";
1599cp.code() += "etiss_coverage_count(6, 2635, 2631, 2630, 2628, 2634, 2632);\n";
1600cp.code() += "} // block\n";
1601} // block
1602} // conditional
1603else { // conditional
1604{ // procedure
1605cp.code() += "{ // procedure\n";
1606cp.code() += "RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2ULL);\n";
1607cp.code() += "etiss_coverage_count(3, 2639, 2637, 2638);\n";
1608cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
1609cp.code() += "} // procedure\n";
1610} // procedure
1611} // conditional
1612cp.code() += "} // block\n";
1613} // block
1614cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
1615cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
1616// -----------------------------------------------------------------------------
1617 cp.getAffectedRegisters().add("instructionPointer", 32);
1618 }
1619 {
1620 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
1621
1622 cp.code() = std::string("//CLWSP\n");
1623
1624// -----------------------------------------------------------------------------
1625cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
1626// -----------------------------------------------------------------------------
1627 }
1628
1629 return true;
1630 },
1631 0,
1632 [] (BitArray & ba, Instruction & instr)
1633 {
1634// -----------------------------------------------------------------------------
1635etiss_uint8 uimm = 0;
1636static BitArrayRange R_uimm_6(3, 2);
1637uimm += R_uimm_6.read(ba) << 6;
1638static BitArrayRange R_uimm_2(6, 4);
1639uimm += R_uimm_2.read(ba) << 2;
1640etiss_uint8 rd = 0;
1641static BitArrayRange R_rd_0(11, 7);
1642rd += R_rd_0.read(ba) << 0;
1643static BitArrayRange R_uimm_5(12, 12);
1644uimm += R_uimm_5.read(ba) << 5;
1645
1646// -----------------------------------------------------------------------------
1647
1648 std::stringstream ss;
1649// -----------------------------------------------------------------------------
1650ss << "clwsp" << " # " << ba << (" [uimm=" + std::to_string(uimm) + " | rd=" + std::to_string(rd) + "]");
1651// -----------------------------------------------------------------------------
1652 return ss.str();
1653 }
1654);
1655
1656// CMV -------------------------------------------------------------------------
1657static InstructionDefinition cmv_rs2_rd (
1658 ISA16_RV64IMACFD,
1659 "cmv",
1660 (uint64_t) 0x8002,
1661 (uint64_t) 0xf003,
1662 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
1663 {
1664
1665// -----------------------------------------------------------------------------
1666
1667// -----------------------------------------------------------------------------
1668
1669// -----------------------------------------------------------------------------
1670// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
1671etiss_uint8 rs2 = 0;
1672static BitArrayRange R_rs2_0(6, 2);
1673rs2 += R_rs2_0.read(ba) << 0;
1674etiss_uint8 rd = 0;
1675static BitArrayRange R_rd_0(11, 7);
1676rd += R_rd_0.read(ba) << 0;
1677
1678// NOLINTEND(clang-diagnostic-unused-but-set-variable)
1679// -----------------------------------------------------------------------------
1680
1681 {
1682 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
1683
1684 cp.code() = std::string("//CMV\n");
1685
1686// -----------------------------------------------------------------------------
1687cp.code() += "etiss_coverage_count(1, 64);\n";
1688{ // block
1689cp.code() += "etiss_coverage_count(1, 1189);\n";
1690cp.code() += "{ // block\n";
1691cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
1692cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
1693cp.code() += "} // block\n";
1694} // block
1695cp.code() += "etiss_coverage_count(1, 2641);\n";
1696if ((rd % 32ULL) != 0LL) { // conditional
1697cp.code() += "etiss_coverage_count(5, 2647, 2644, 2642, 2645, 2646);\n";
1698cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL];\n";
1699cp.code() += "etiss_coverage_count(7, 2658, 2652, 2651, 2649, 2657, 2656, 2654);\n";
1700} // conditional
1701cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
1702cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
1703// -----------------------------------------------------------------------------
1704 cp.getAffectedRegisters().add("instructionPointer", 32);
1705 }
1706
1707 return true;
1708 },
1709 0,
1710 [] (BitArray & ba, Instruction & instr)
1711 {
1712// -----------------------------------------------------------------------------
1713etiss_uint8 rs2 = 0;
1714static BitArrayRange R_rs2_0(6, 2);
1715rs2 += R_rs2_0.read(ba) << 0;
1716etiss_uint8 rd = 0;
1717static BitArrayRange R_rd_0(11, 7);
1718rd += R_rd_0.read(ba) << 0;
1719
1720// -----------------------------------------------------------------------------
1721
1722 std::stringstream ss;
1723// -----------------------------------------------------------------------------
1724ss << "cmv" << " # " << ba << (" [rs2=" + std::to_string(rs2) + " | rd=" + std::to_string(rd) + "]");
1725// -----------------------------------------------------------------------------
1726 return ss.str();
1727 }
1728);
1729
1730// CJR -------------------------------------------------------------------------
1731static InstructionDefinition cjr_rs1 (
1732 ISA16_RV64IMACFD,
1733 "cjr",
1734 (uint64_t) 0x8002,
1735 (uint64_t) 0xf07f,
1736 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
1737 {
1738
1739// -----------------------------------------------------------------------------
1740
1741// -----------------------------------------------------------------------------
1742
1743// -----------------------------------------------------------------------------
1744// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
1745etiss_uint8 rs1 = 0;
1746static BitArrayRange R_rs1_0(11, 7);
1747rs1 += R_rs1_0.read(ba) << 0;
1748
1749// NOLINTEND(clang-diagnostic-unused-but-set-variable)
1750// -----------------------------------------------------------------------------
1751
1752 {
1753 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
1754
1755 cp.code() = std::string("//CJR\n");
1756
1757// -----------------------------------------------------------------------------
1758cp.code() += "etiss_coverage_count(1, 65);\n";
1759{ // block
1760cp.code() += "etiss_coverage_count(1, 1189);\n";
1761cp.code() += "{ // block\n";
1762cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
1763cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
1764cp.code() += "} // block\n";
1765} // block
1766cp.code() += "etiss_coverage_count(1, 2659);\n";
1767if (rs1) { // conditional
1768cp.code() += "etiss_coverage_count(1, 2660);\n";
1769cp.code() += "cpu->nextPc = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL] & -2LL;\n";
1770cp.code() += "etiss_coverage_count(6, 2670, 2661, 2669, 2666, 2665, 2663);\n";
1771} // conditional
1772else { // conditional
1773{ // procedure
1774cp.code() += "{ // procedure\n";
1775cp.code() += "RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2ULL);\n";
1776cp.code() += "etiss_coverage_count(3, 2673, 2671, 2672);\n";
1777cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
1778cp.code() += "} // procedure\n";
1779} // procedure
1780} // conditional
1781cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
1782cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
1783// -----------------------------------------------------------------------------
1784 cp.getAffectedRegisters().add("instructionPointer", 32);
1785 }
1786 {
1787 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
1788
1789 cp.code() = std::string("//CJR\n");
1790
1791// -----------------------------------------------------------------------------
1792cp.code() += "return cpu->exception;\n";
1793// -----------------------------------------------------------------------------
1794 }
1795
1796 return true;
1797 },
1798 0,
1799 [] (BitArray & ba, Instruction & instr)
1800 {
1801// -----------------------------------------------------------------------------
1802etiss_uint8 rs1 = 0;
1803static BitArrayRange R_rs1_0(11, 7);
1804rs1 += R_rs1_0.read(ba) << 0;
1805
1806// -----------------------------------------------------------------------------
1807
1808 std::stringstream ss;
1809// -----------------------------------------------------------------------------
1810ss << "cjr" << " # " << ba << (" [rs1=" + std::to_string(rs1) + "]");
1811// -----------------------------------------------------------------------------
1812 return ss.str();
1813 }
1814);
1815
1816// __reserved_cmv --------------------------------------------------------------
1817static InstructionDefinition __reserved_cmv_ (
1818 ISA16_RV64IMACFD,
1819 "__reserved_cmv",
1820 (uint64_t) 0x8002,
1821 (uint64_t) 0xffff,
1822 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
1823 {
1824
1825// -----------------------------------------------------------------------------
1826
1827// -----------------------------------------------------------------------------
1828
1829// -----------------------------------------------------------------------------
1830// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
1831
1832// NOLINTEND(clang-diagnostic-unused-but-set-variable)
1833// -----------------------------------------------------------------------------
1834
1835 {
1836 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
1837
1838 cp.code() = std::string("//__reserved_cmv\n");
1839
1840// -----------------------------------------------------------------------------
1841cp.code() += "etiss_coverage_count(1, 66);\n";
1842{ // block
1843cp.code() += "etiss_coverage_count(1, 1189);\n";
1844cp.code() += "{ // block\n";
1845cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
1846cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
1847cp.code() += "} // block\n";
1848} // block
1849{ // procedure
1850cp.code() += "{ // procedure\n";
1851cp.code() += "RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2ULL);\n";
1852cp.code() += "etiss_coverage_count(3, 2676, 2674, 2675);\n";
1853cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
1854cp.code() += "} // procedure\n";
1855} // procedure
1856cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
1857cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
1858// -----------------------------------------------------------------------------
1859 cp.getAffectedRegisters().add("instructionPointer", 32);
1860 }
1861 {
1862 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
1863
1864 cp.code() = std::string("//__reserved_cmv\n");
1865
1866// -----------------------------------------------------------------------------
1867cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
1868// -----------------------------------------------------------------------------
1869 }
1870
1871 return true;
1872 },
1873 0,
1874 [] (BitArray & ba, Instruction & instr)
1875 {
1876// -----------------------------------------------------------------------------
1877
1878// -----------------------------------------------------------------------------
1879
1880 std::stringstream ss;
1881// -----------------------------------------------------------------------------
1882ss << "__reserved_cmv" << " # " << ba << (" []");
1883// -----------------------------------------------------------------------------
1884 return ss.str();
1885 }
1886);
1887
1888// CADD ------------------------------------------------------------------------
1889static InstructionDefinition cadd_rs2_rd (
1890 ISA16_RV64IMACFD,
1891 "cadd",
1892 (uint64_t) 0x9002,
1893 (uint64_t) 0xf003,
1894 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
1895 {
1896
1897// -----------------------------------------------------------------------------
1898
1899// -----------------------------------------------------------------------------
1900
1901// -----------------------------------------------------------------------------
1902// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
1903etiss_uint8 rs2 = 0;
1904static BitArrayRange R_rs2_0(6, 2);
1905rs2 += R_rs2_0.read(ba) << 0;
1906etiss_uint8 rd = 0;
1907static BitArrayRange R_rd_0(11, 7);
1908rd += R_rd_0.read(ba) << 0;
1909
1910// NOLINTEND(clang-diagnostic-unused-but-set-variable)
1911// -----------------------------------------------------------------------------
1912
1913 {
1914 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
1915
1916 cp.code() = std::string("//CADD\n");
1917
1918// -----------------------------------------------------------------------------
1919cp.code() += "etiss_coverage_count(1, 67);\n";
1920{ // block
1921cp.code() += "etiss_coverage_count(1, 1189);\n";
1922cp.code() += "{ // block\n";
1923cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
1924cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
1925cp.code() += "} // block\n";
1926} // block
1927cp.code() += "etiss_coverage_count(1, 2677);\n";
1928if ((rd % 32ULL) != 0LL) { // conditional
1929cp.code() += "etiss_coverage_count(5, 2683, 2680, 2678, 2681, 2682);\n";
1930cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = *((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] + *((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL];\n";
1931cp.code() += "etiss_coverage_count(11, 2700, 2688, 2687, 2685, 2699, 2693, 2692, 2690, 2698, 2697, 2695);\n";
1932} // conditional
1933cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
1934cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
1935// -----------------------------------------------------------------------------
1936 cp.getAffectedRegisters().add("instructionPointer", 32);
1937 }
1938
1939 return true;
1940 },
1941 0,
1942 [] (BitArray & ba, Instruction & instr)
1943 {
1944// -----------------------------------------------------------------------------
1945etiss_uint8 rs2 = 0;
1946static BitArrayRange R_rs2_0(6, 2);
1947rs2 += R_rs2_0.read(ba) << 0;
1948etiss_uint8 rd = 0;
1949static BitArrayRange R_rd_0(11, 7);
1950rd += R_rd_0.read(ba) << 0;
1951
1952// -----------------------------------------------------------------------------
1953
1954 std::stringstream ss;
1955// -----------------------------------------------------------------------------
1956ss << "cadd" << " # " << ba << (" [rs2=" + std::to_string(rs2) + " | rd=" + std::to_string(rd) + "]");
1957// -----------------------------------------------------------------------------
1958 return ss.str();
1959 }
1960);
1961
1962// CJALR -----------------------------------------------------------------------
1963static InstructionDefinition cjalr_rs1 (
1964 ISA16_RV64IMACFD,
1965 "cjalr",
1966 (uint64_t) 0x9002,
1967 (uint64_t) 0xf07f,
1968 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
1969 {
1970
1971// -----------------------------------------------------------------------------
1972
1973// -----------------------------------------------------------------------------
1974
1975// -----------------------------------------------------------------------------
1976// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
1977etiss_uint8 rs1 = 0;
1978static BitArrayRange R_rs1_0(11, 7);
1979rs1 += R_rs1_0.read(ba) << 0;
1980
1981// NOLINTEND(clang-diagnostic-unused-but-set-variable)
1982// -----------------------------------------------------------------------------
1983
1984 {
1985 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
1986
1987 cp.code() = std::string("//CJALR\n");
1988
1989// -----------------------------------------------------------------------------
1990cp.code() += "etiss_coverage_count(1, 68);\n";
1991{ // block
1992cp.code() += "etiss_coverage_count(1, 1189);\n";
1993cp.code() += "{ // block\n";
1994cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
1995cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
1996cp.code() += "} // block\n";
1997} // block
1998{ // block
1999cp.code() += "etiss_coverage_count(1, 2721);\n";
2000cp.code() += "{ // block\n";
2001cp.code() += "etiss_uint64 new_pc = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL];\n";
2002cp.code() += "etiss_coverage_count(4, 2707, 2706, 2705, 2703);\n";
2003cp.code() += "*((RV64IMACFD*)cpu)->X[1ULL] = " + std::to_string(ic.current_address_ + 2ULL) + "ULL;\n";
2004cp.code() += "etiss_coverage_count(6, 2714, 2710, 2709, 2713, 2711, 2712);\n";
2005cp.code() += "cpu->nextPc = new_pc & -2LL;\n";
2006cp.code() += "etiss_coverage_count(4, 2720, 2715, 2719, 2716);\n";
2007cp.code() += "} // block\n";
2008} // block
2009cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
2010cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
2011// -----------------------------------------------------------------------------
2012 cp.getAffectedRegisters().add("instructionPointer", 32);
2013 }
2014 {
2015 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
2016
2017 cp.code() = std::string("//CJALR\n");
2018
2019// -----------------------------------------------------------------------------
2020cp.code() += "return cpu->exception;\n";
2021// -----------------------------------------------------------------------------
2022 }
2023
2024 return true;
2025 },
2026 0,
2027 [] (BitArray & ba, Instruction & instr)
2028 {
2029// -----------------------------------------------------------------------------
2030etiss_uint8 rs1 = 0;
2031static BitArrayRange R_rs1_0(11, 7);
2032rs1 += R_rs1_0.read(ba) << 0;
2033
2034// -----------------------------------------------------------------------------
2035
2036 std::stringstream ss;
2037// -----------------------------------------------------------------------------
2038ss << "cjalr" << " # " << ba << (" [rs1=" + std::to_string(rs1) + "]");
2039// -----------------------------------------------------------------------------
2040 return ss.str();
2041 }
2042);
2043
2044// CEBREAK ---------------------------------------------------------------------
2045static InstructionDefinition cebreak_ (
2046 ISA16_RV64IMACFD,
2047 "cebreak",
2048 (uint64_t) 0x9002,
2049 (uint64_t) 0xffff,
2050 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
2051 {
2052
2053// -----------------------------------------------------------------------------
2054
2055// -----------------------------------------------------------------------------
2056
2057// -----------------------------------------------------------------------------
2058// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
2059
2060// NOLINTEND(clang-diagnostic-unused-but-set-variable)
2061// -----------------------------------------------------------------------------
2062
2063 {
2064 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
2065
2066 cp.code() = std::string("//CEBREAK\n");
2067
2068// -----------------------------------------------------------------------------
2069cp.code() += "etiss_coverage_count(1, 69);\n";
2070{ // block
2071cp.code() += "etiss_coverage_count(1, 1189);\n";
2072cp.code() += "{ // block\n";
2073cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
2074cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
2075cp.code() += "} // block\n";
2076} // block
2077{ // procedure
2078cp.code() += "{ // procedure\n";
2079cp.code() += "RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 3LL);\n";
2080cp.code() += "etiss_coverage_count(2, 2724, 2722);\n";
2081cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
2082cp.code() += "} // procedure\n";
2083} // procedure
2084cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
2085cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
2086// -----------------------------------------------------------------------------
2087 cp.getAffectedRegisters().add("instructionPointer", 32);
2088 }
2089 {
2090 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
2091
2092 cp.code() = std::string("//CEBREAK\n");
2093
2094// -----------------------------------------------------------------------------
2095cp.code() += "return cpu->exception;\n";
2096// -----------------------------------------------------------------------------
2097 }
2098
2099 return true;
2100 },
2101 0,
2102 [] (BitArray & ba, Instruction & instr)
2103 {
2104// -----------------------------------------------------------------------------
2105
2106// -----------------------------------------------------------------------------
2107
2108 std::stringstream ss;
2109// -----------------------------------------------------------------------------
2110ss << "cebreak" << " # " << ba << (" []");
2111// -----------------------------------------------------------------------------
2112 return ss.str();
2113 }
2114);
2115
2116// CSWSP -----------------------------------------------------------------------
2117static InstructionDefinition cswsp_rs2_uimm (
2118 ISA16_RV64IMACFD,
2119 "cswsp",
2120 (uint64_t) 0xc002,
2121 (uint64_t) 0xe003,
2122 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
2123 {
2124
2125// -----------------------------------------------------------------------------
2126
2127// -----------------------------------------------------------------------------
2128
2129// -----------------------------------------------------------------------------
2130// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
2131etiss_uint8 rs2 = 0;
2132static BitArrayRange R_rs2_0(6, 2);
2133rs2 += R_rs2_0.read(ba) << 0;
2134etiss_uint8 uimm = 0;
2135static BitArrayRange R_uimm_6(8, 7);
2136uimm += R_uimm_6.read(ba) << 6;
2137static BitArrayRange R_uimm_2(12, 9);
2138uimm += R_uimm_2.read(ba) << 2;
2139
2140// NOLINTEND(clang-diagnostic-unused-but-set-variable)
2141// -----------------------------------------------------------------------------
2142
2143 {
2144 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
2145
2146 cp.code() = std::string("//CSWSP\n");
2147
2148// -----------------------------------------------------------------------------
2149cp.code() += "etiss_coverage_count(1, 70);\n";
2150{ // block
2151cp.code() += "etiss_coverage_count(1, 1189);\n";
2152cp.code() += "{ // block\n";
2153cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
2154cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
2155cp.code() += "} // block\n";
2156} // block
2157{ // block
2158cp.code() += "etiss_coverage_count(1, 2746);\n";
2159cp.code() += "{ // block\n";
2160cp.code() += "etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[2ULL] + " + std::to_string(uimm) + "ULL;\n";
2161cp.code() += "etiss_coverage_count(5, 2731, 2730, 2728, 2727, 2729);\n";
2162cp.code() += "etiss_uint32 mem_val_0;\n";
2163cp.code() += "mem_val_0 = (etiss_uint32)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL]);\n";
2164cp.code() += "etiss_coverage_count(9, 2745, 2737, 2735, 2733, 2734, 2744, 2742, 2741, 2739);\n";
2165cp.code() += "cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";
2166cp.code() += "if (cpu->exception) { // conditional\n";
2167{ // procedure
2168cp.code() += "{ // procedure\n";
2169cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
2170cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
2171cp.code() += "} // procedure\n";
2172} // procedure
2173cp.code() += "} // conditional\n";
2174cp.code() += "} // block\n";
2175} // block
2176cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
2177cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
2178// -----------------------------------------------------------------------------
2179 cp.getAffectedRegisters().add("instructionPointer", 32);
2180 }
2181 {
2182 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
2183
2184 cp.code() = std::string("//CSWSP\n");
2185
2186// -----------------------------------------------------------------------------
2187cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
2188// -----------------------------------------------------------------------------
2189 }
2190
2191 return true;
2192 },
2193 0,
2194 [] (BitArray & ba, Instruction & instr)
2195 {
2196// -----------------------------------------------------------------------------
2197etiss_uint8 rs2 = 0;
2198static BitArrayRange R_rs2_0(6, 2);
2199rs2 += R_rs2_0.read(ba) << 0;
2200etiss_uint8 uimm = 0;
2201static BitArrayRange R_uimm_6(8, 7);
2202uimm += R_uimm_6.read(ba) << 6;
2203static BitArrayRange R_uimm_2(12, 9);
2204uimm += R_uimm_2.read(ba) << 2;
2205
2206// -----------------------------------------------------------------------------
2207
2208 std::stringstream ss;
2209// -----------------------------------------------------------------------------
2210ss << "cswsp" << " # " << ba << (" [rs2=" + std::to_string(rs2) + " | uimm=" + std::to_string(uimm) + "]");
2211// -----------------------------------------------------------------------------
2212 return ss.str();
2213 }
2214);
2215
2216// DII -------------------------------------------------------------------------
2217static InstructionDefinition dii_ (
2218 ISA16_RV64IMACFD,
2219 "dii",
2220 (uint64_t) 0x00,
2221 (uint64_t) 0xffff,
2222 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
2223 {
2224
2225// -----------------------------------------------------------------------------
2226
2227// -----------------------------------------------------------------------------
2228
2229// -----------------------------------------------------------------------------
2230// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
2231
2232// NOLINTEND(clang-diagnostic-unused-but-set-variable)
2233// -----------------------------------------------------------------------------
2234
2235 {
2236 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
2237
2238 cp.code() = std::string("//DII\n");
2239
2240// -----------------------------------------------------------------------------
2241cp.code() += "etiss_coverage_count(1, 71);\n";
2242{ // block
2243cp.code() += "etiss_coverage_count(1, 1189);\n";
2244cp.code() += "{ // block\n";
2245cp.code() += "cpu->nextPc = " + std::to_string((etiss_uint64)((ic.current_address_ + 2))) + "ULL;\n";
2246cp.code() += "etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";
2247cp.code() += "} // block\n";
2248} // block
2249{ // procedure
2250cp.code() += "{ // procedure\n";
2251cp.code() += "RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";
2252cp.code() += "etiss_coverage_count(2, 2749, 2747);\n";
2253cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
2254cp.code() += "} // procedure\n";
2255} // procedure
2256cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
2257cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
2258// -----------------------------------------------------------------------------
2259 cp.getAffectedRegisters().add("instructionPointer", 32);
2260 }
2261 {
2262 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
2263
2264 cp.code() = std::string("//DII\n");
2265
2266// -----------------------------------------------------------------------------
2267cp.code() += "return cpu->exception;\n";
2268// -----------------------------------------------------------------------------
2269 }
2270
2271 return true;
2272 },
2273 0,
2274 [] (BitArray & ba, Instruction & instr)
2275 {
2276// -----------------------------------------------------------------------------
2277
2278// -----------------------------------------------------------------------------
2279
2280 std::stringstream ss;
2281// -----------------------------------------------------------------------------
2282ss << "dii" << " # " << ba << (" []");
2283// -----------------------------------------------------------------------------
2284 return ss.str();
2285 }
2286);
2287// clang-format on
ISA16_RV64IMACFD
etiss::instr::InstructionGroup ISA16_RV64IMACFD("ISA16_RV64IMACFD", 16)
__reserved_clui_rd
static InstructionDefinition __reserved_clui_rd(ISA16_RV64IMACFD, "__reserved_clui",(uint64_t) 0x6001,(uint64_t) 0xf07f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//__reserved_clui\n");cp.code()+="etiss_coverage_count(1, 51);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";cp.code()+="etiss_coverage_count(2, 2401, 2399);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//__reserved_clui\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;std::stringstream ss;ss<< "__reserved_clui"<< " # "<< ba<<(" [rd="+std::to_string(rd)+"]");return ss.str();})
cjr_rs1
static InstructionDefinition cjr_rs1(ISA16_RV64IMACFD, "cjr",(uint64_t) 0x8002,(uint64_t) 0xf07f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(11, 7);rs1+=R_rs1_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CJR\n");cp.code()+="etiss_coverage_count(1, 65);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2659);\n";if(rs1) { cp.code()+="etiss_coverage_count(1, 2660);\n";cp.code()+="cpu->nextPc = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] & -2LL;\n";cp.code()+="etiss_coverage_count(6, 2670, 2661, 2669, 2666, 2665, 2663);\n";} else { { cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2ULL);\n";cp.code()+="etiss_coverage_count(3, 2673, 2671, 2672);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} } cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CJR\n");cp.code()+="return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(11, 7);rs1+=R_rs1_0.read(ba)<< 0;std::stringstream ss;ss<< "cjr"<< " # "<< ba<<(" [rs1="+std::to_string(rs1)+"]");return ss.str();})
__reserved_cmv_
static InstructionDefinition __reserved_cmv_(ISA16_RV64IMACFD, "__reserved_cmv",(uint64_t) 0x8002,(uint64_t) 0xffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//__reserved_cmv\n");cp.code()+="etiss_coverage_count(1, 66);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2ULL);\n";cp.code()+="etiss_coverage_count(3, 2676, 2674, 2675);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//__reserved_cmv\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { std::stringstream ss;ss<< "__reserved_cmv"<< " # "<< ba<<(" []");return ss.str();})
clw_rd_uimm_rs1
static InstructionDefinition clw_rd_uimm_rs1(ISA16_RV64IMACFD, "clw",(uint64_t) 0x4000,(uint64_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(4, 2);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(5, 5);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_2(6, 6);uimm+=R_uimm_2.read(ba)<< 2;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CLW\n");cp.code()+="etiss_coverage_count(1, 43);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 2279);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 load_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 2264, 2263, 2261, 2260, 2258, 2259, 2262);\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL] = (etiss_int32)(mem_val_0);\n";cp.code()+="etiss_coverage_count(10, 2278, 2269, 2268, 2266, 2267, 2277, 2275, 2273, 2271, 2272);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CLW\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(4, 2);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(5, 5);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_2(6, 6);uimm+=R_uimm_2.read(ba)<< 2;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;std::stringstream ss;ss<< "clw"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | uimm="+std::to_string(uimm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})
cand_rs2_rd
static InstructionDefinition cand_rs2_rd(ISA16_RV64IMACFD, "cand",(uint64_t) 0x8c61,(uint64_t) 0xfc63, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(9, 7);rd+=R_rd_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CAND\n");cp.code()+="etiss_coverage_count(1, 58);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 2549);\n";cp.code()+="{ // block\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL] & *((RV64IMACFD*)cpu)->X["+std::to_string(rs2+8ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(14, 2548, 2536, 2535, 2533, 2534, 2547, 2541, 2540, 2538, 2539, 2546, 2545, 2543, 2544);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(9, 7);rd+=R_rd_0.read(ba)<< 0;std::stringstream ss;ss<< "cand"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | rd="+std::to_string(rd)+"]");return ss.str();})
cswsp_rs2_uimm
static InstructionDefinition cswsp_rs2_uimm(ISA16_RV64IMACFD, "cswsp",(uint64_t) 0xc002,(uint64_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(6, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(8, 7);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_2(12, 9);uimm+=R_uimm_2.read(ba)<< 2;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSWSP\n");cp.code()+="etiss_coverage_count(1, 70);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 2746);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[2ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 2731, 2730, 2728, 2727, 2729);\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_uint32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(9, 2745, 2737, 2735, 2733, 2734, 2744, 2742, 2741, 2739);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CSWSP\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(6, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(8, 7);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_2(12, 9);uimm+=R_uimm_2.read(ba)<< 2;std::stringstream ss;ss<< "cswsp"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | uimm="+std::to_string(uimm)+"]");return ss.str();})
cbeqz_imm_rs1
static InstructionDefinition cbeqz_imm_rs1(ISA16_RV64IMACFD, "cbeqz",(uint64_t) 0xc001,(uint64_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_5(2, 2);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_1(4, 3);imm+=R_imm_1.read(ba)<< 1;static BitArrayRange R_imm_6(6, 5);imm+=R_imm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_imm_3(11, 10);imm+=R_imm_3.read(ba)<< 3;static BitArrayRange R_imm_8(12, 12);imm+=R_imm_8.read(ba)<< 8;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CBEQZ\n");cp.code()+="etiss_coverage_count(1, 60);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2557);\n";cp.code()+="if (*((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] == 0LL) { // conditional\n";cp.code()+="etiss_coverage_count(6, 2564, 2562, 2561, 2559, 2560, 2563);\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(7)) > >(7)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 2571, 2565, 2570, 2566, 2569, 2567);\n";cp.code()+="} // conditional\n";cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CBEQZ\n");cp.code()+="if (cpu->nextPc != "+std::to_string(ic.current_address_+2)+"ULL) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_5(2, 2);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_1(4, 3);imm+=R_imm_1.read(ba)<< 1;static BitArrayRange R_imm_6(6, 5);imm+=R_imm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_imm_3(11, 10);imm+=R_imm_3.read(ba)<< 3;static BitArrayRange R_imm_8(12, 12);imm+=R_imm_8.read(ba)<< 8;std::stringstream ss;ss<< "cbeqz"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})
csub_rs2_rd
static InstructionDefinition csub_rs2_rd(ISA16_RV64IMACFD, "csub",(uint64_t) 0x8c01,(uint64_t) 0xfc63, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(9, 7);rd+=R_rd_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSUB\n");cp.code()+="etiss_coverage_count(1, 55);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 2495);\n";cp.code()+="{ // block\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL] - *((RV64IMACFD*)cpu)->X["+std::to_string(rs2+8ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(14, 2494, 2482, 2481, 2479, 2480, 2493, 2487, 2486, 2484, 2485, 2492, 2491, 2489, 2490);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(9, 7);rd+=R_rd_0.read(ba)<< 0;std::stringstream ss;ss<< "csub"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | rd="+std::to_string(rd)+"]");return ss.str();})
cbnez_imm_rs1
static InstructionDefinition cbnez_imm_rs1(ISA16_RV64IMACFD, "cbnez",(uint64_t) 0xe001,(uint64_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_5(2, 2);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_1(4, 3);imm+=R_imm_1.read(ba)<< 1;static BitArrayRange R_imm_6(6, 5);imm+=R_imm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_imm_3(11, 10);imm+=R_imm_3.read(ba)<< 3;static BitArrayRange R_imm_8(12, 12);imm+=R_imm_8.read(ba)<< 8;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CBNEZ\n");cp.code()+="etiss_coverage_count(1, 61);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2572);\n";cp.code()+="if (*((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] != 0LL) { // conditional\n";cp.code()+="etiss_coverage_count(6, 2579, 2577, 2576, 2574, 2575, 2578);\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(7)) > >(7)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 2586, 2580, 2585, 2581, 2584, 2582);\n";cp.code()+="} // conditional\n";cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CBNEZ\n");cp.code()+="if (cpu->nextPc != "+std::to_string(ic.current_address_+2)+"ULL) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_5(2, 2);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_1(4, 3);imm+=R_imm_1.read(ba)<< 1;static BitArrayRange R_imm_6(6, 5);imm+=R_imm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_imm_3(11, 10);imm+=R_imm_3.read(ba)<< 3;static BitArrayRange R_imm_8(12, 12);imm+=R_imm_8.read(ba)<< 8;std::stringstream ss;ss<< "cbnez"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})
cj_imm
static InstructionDefinition cj_imm(ISA16_RV64IMACFD, "cj",(uint64_t) 0xa001,(uint64_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 imm=0;static BitArrayRange R_imm_5(2, 2);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_1(5, 3);imm+=R_imm_1.read(ba)<< 1;static BitArrayRange R_imm_7(6, 6);imm+=R_imm_7.read(ba)<< 7;static BitArrayRange R_imm_6(7, 7);imm+=R_imm_6.read(ba)<< 6;static BitArrayRange R_imm_10(8, 8);imm+=R_imm_10.read(ba)<< 10;static BitArrayRange R_imm_8(10, 9);imm+=R_imm_8.read(ba)<< 8;static BitArrayRange R_imm_4(11, 11);imm+=R_imm_4.read(ba)<< 4;static BitArrayRange R_imm_11(12, 12);imm+=R_imm_11.read(ba)<< 11;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CJ\n");cp.code()+="etiss_coverage_count(1, 59);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+((etiss_int16)(((etiss_int16) imm)<<(4)) > >(4)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 2556, 2550, 2555, 2551, 2554, 2552);\n";cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CJ\n");cp.code()+="return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 imm=0;static BitArrayRange R_imm_5(2, 2);imm+=R_imm_5.read(ba)<< 5;static BitArrayRange R_imm_1(5, 3);imm+=R_imm_1.read(ba)<< 1;static BitArrayRange R_imm_7(6, 6);imm+=R_imm_7.read(ba)<< 7;static BitArrayRange R_imm_6(7, 7);imm+=R_imm_6.read(ba)<< 6;static BitArrayRange R_imm_10(8, 8);imm+=R_imm_10.read(ba)<< 10;static BitArrayRange R_imm_8(10, 9);imm+=R_imm_8.read(ba)<< 8;static BitArrayRange R_imm_4(11, 11);imm+=R_imm_4.read(ba)<< 4;static BitArrayRange R_imm_11(12, 12);imm+=R_imm_11.read(ba)<< 11;std::stringstream ss;ss<< "cj"<< " # "<< ba<<(" [imm="+std::to_string(imm)+"]");return ss.str();})
dii_
static InstructionDefinition dii_(ISA16_RV64IMACFD, "dii",(uint64_t) 0x00,(uint64_t) 0xffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//DII\n");cp.code()+="etiss_coverage_count(1, 71);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";cp.code()+="etiss_coverage_count(2, 2749, 2747);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//DII\n");cp.code()+="return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { std::stringstream ss;ss<< "dii"<< " # "<< ba<<(" []");return ss.str();})
clwsp_uimm_rd
static InstructionDefinition clwsp_uimm_rd(ISA16_RV64IMACFD, "clwsp",(uint64_t) 0x4002,(uint64_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(3, 2);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_2(6, 4);uimm+=R_uimm_2.read(ba)<< 2;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;static BitArrayRange R_uimm_5(12, 12);uimm+=R_uimm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CLWSP\n");cp.code()+="etiss_coverage_count(1, 63);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 2640);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 2605);\n";if(rd % 32ULL) { cp.code()+="etiss_coverage_count(2, 2608, 2606);\n";{ cp.code()+="etiss_coverage_count(1, 2636);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = (etiss_uint64)((*((RV64IMACFD*)cpu)->X[2ULL] + "+std::to_string(uimm)+"ULL));\n";cp.code()+="etiss_coverage_count(7, 2618, 2617, 2614, 2612, 2611, 2613, 2615);\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int32 res = mem_val_0;\n";cp.code()+="etiss_coverage_count(5, 2626, 2625, 2623, 2621, 2622);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_int64)(res);\n";cp.code()+="etiss_coverage_count(6, 2635, 2631, 2630, 2628, 2634, 2632);\n";cp.code()+="} // block\n";} } else { { cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2ULL);\n";cp.code()+="etiss_coverage_count(3, 2639, 2637, 2638);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} } cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CLWSP\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(3, 2);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_2(6, 4);uimm+=R_uimm_2.read(ba)<< 2;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;static BitArrayRange R_uimm_5(12, 12);uimm+=R_uimm_5.read(ba)<< 5;std::stringstream ss;ss<< "clwsp"<< " # "<< ba<<(" [uimm="+std::to_string(uimm)+" | rd="+std::to_string(rd)+"]");return ss.str();})
csw_rs2_uimm_rs1
static InstructionDefinition csw_rs2_uimm_rs1(ISA16_RV64IMACFD, "csw",(uint64_t) 0xc000,(uint64_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(5, 5);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_2(6, 6);uimm+=R_uimm_2.read(ba)<< 2;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CSW\n");cp.code()+="etiss_coverage_count(1, 44);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 2303);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 load_address = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 2288, 2287, 2285, 2284, 2282, 2283, 2286);\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_int32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2+8ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(10, 2302, 2294, 2292, 2290, 2291, 2301, 2299, 2298, 2296, 2297);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, load_address, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CSW\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(5, 5);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_2(6, 6);uimm+=R_uimm_2.read(ba)<< 2;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;std::stringstream ss;ss<< "csw"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | uimm="+std::to_string(uimm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})
cjalr_rs1
static InstructionDefinition cjalr_rs1(ISA16_RV64IMACFD, "cjalr",(uint64_t) 0x9002,(uint64_t) 0xf07f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(11, 7);rs1+=R_rs1_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CJALR\n");cp.code()+="etiss_coverage_count(1, 68);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 2721);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 new_pc = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(4, 2707, 2706, 2705, 2703);\n";cp.code()+="*((RV64IMACFD*)cpu)->X[1ULL] = "+std::to_string(ic.current_address_+2ULL)+"ULL;\n";cp.code()+="etiss_coverage_count(6, 2714, 2710, 2709, 2713, 2711, 2712);\n";cp.code()+="cpu->nextPc = new_pc & -2LL;\n";cp.code()+="etiss_coverage_count(4, 2720, 2715, 2719, 2716);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CJALR\n");cp.code()+="return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(11, 7);rs1+=R_rs1_0.read(ba)<< 0;std::stringstream ss;ss<< "cjalr"<< " # "<< ba<<(" [rs1="+std::to_string(rs1)+"]");return ss.str();})
cxor_rs2_rd
static InstructionDefinition cxor_rs2_rd(ISA16_RV64IMACFD, "cxor",(uint64_t) 0x8c21,(uint64_t) 0xfc63, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(9, 7);rd+=R_rd_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CXOR\n");cp.code()+="etiss_coverage_count(1, 56);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 2513);\n";cp.code()+="{ // block\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL] ^ *((RV64IMACFD*)cpu)->X["+std::to_string(rs2+8ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(14, 2512, 2500, 2499, 2497, 2498, 2511, 2505, 2504, 2502, 2503, 2510, 2509, 2507, 2508);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(9, 7);rd+=R_rd_0.read(ba)<< 0;std::stringstream ss;ss<< "cxor"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | rd="+std::to_string(rd)+"]");return ss.str();})
cnop_nzimm
static InstructionDefinition cnop_nzimm(ISA16_RV64IMACFD, "cnop",(uint64_t) 0x01,(uint64_t) 0xef83, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 nzimm=0;static BitArrayRange R_nzimm_0(6, 2);nzimm+=R_nzimm_0.read(ba)<< 0;static BitArrayRange R_nzimm_5(12, 12);nzimm+=R_nzimm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CNOP\n");cp.code()+="etiss_coverage_count(1, 46);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 2326);\n";cp.code()+="{ // block\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 nzimm=0;static BitArrayRange R_nzimm_0(6, 2);nzimm+=R_nzimm_0.read(ba)<< 0;static BitArrayRange R_nzimm_5(12, 12);nzimm+=R_nzimm_5.read(ba)<< 5;std::stringstream ss;ss<< "cnop"<< " # "<< ba<<(" [nzimm="+std::to_string(nzimm)+"]");return ss.str();})
clui_imm_rd
static InstructionDefinition clui_imm_rd(ISA16_RV64IMACFD, "clui",(uint64_t) 0x6001,(uint64_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint32 imm=0;static BitArrayRange R_imm_12(6, 2);imm+=R_imm_12.read(ba)<< 12;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;static BitArrayRange R_imm_17(12, 12);imm+=R_imm_17.read(ba)<< 17;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CLUI\n");cp.code()+="etiss_coverage_count(1, 49);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 2382);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 2359);\n";if(imm==0LL) { cp.code()+="etiss_coverage_count(3, 2362, 2360, 2361);\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";cp.code()+="etiss_coverage_count(2, 2365, 2363);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} } cp.code()+="etiss_coverage_count(1, 2366);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2372, 2369, 2367, 2370, 2371);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string(((etiss_int32)(((etiss_int32) imm)<<(14)) > >(14)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 2381, 2377, 2376, 2374, 2380, 2378);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CLUI\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint32 imm=0;static BitArrayRange R_imm_12(6, 2);imm+=R_imm_12.read(ba)<< 12;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;static BitArrayRange R_imm_17(12, 12);imm+=R_imm_17.read(ba)<< 17;std::stringstream ss;ss<< "clui"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rd="+std::to_string(rd)+"]");return ss.str();})
caddi4spn_rd_imm
static InstructionDefinition caddi4spn_rd_imm(ISA16_RV64IMACFD, "caddi4spn",(uint64_t) 0x00,(uint64_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(4, 2);rd+=R_rd_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_3(5, 5);imm+=R_imm_3.read(ba)<< 3;static BitArrayRange R_imm_2(6, 6);imm+=R_imm_2.read(ba)<< 2;static BitArrayRange R_imm_6(10, 7);imm+=R_imm_6.read(ba)<< 6;static BitArrayRange R_imm_4(12, 11);imm+=R_imm_4.read(ba)<< 4;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CADDI4SPN\n");cp.code()+="etiss_coverage_count(1, 42);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2240);\n";if(imm) { cp.code()+="etiss_coverage_count(1, 2241);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL] = *((RV64IMACFD*)cpu)->X[2ULL] + "+std::to_string(imm)+"ULL;\n";cp.code()+="etiss_coverage_count(9, 2252, 2246, 2245, 2243, 2244, 2251, 2249, 2248, 2250);\n";} else { { cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";cp.code()+="etiss_coverage_count(2, 2255, 2253);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} } cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CADDI4SPN\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(4, 2);rd+=R_rd_0.read(ba)<< 0;etiss_uint16 imm=0;static BitArrayRange R_imm_3(5, 5);imm+=R_imm_3.read(ba)<< 3;static BitArrayRange R_imm_2(6, 6);imm+=R_imm_2.read(ba)<< 2;static BitArrayRange R_imm_6(10, 7);imm+=R_imm_6.read(ba)<< 6;static BitArrayRange R_imm_4(12, 11);imm+=R_imm_4.read(ba)<< 4;std::stringstream ss;ss<< "caddi4spn"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | imm="+std::to_string(imm)+"]");return ss.str();})
caddi16sp_nzimm
static InstructionDefinition caddi16sp_nzimm(ISA16_RV64IMACFD, "caddi16sp",(uint64_t) 0x6101,(uint64_t) 0xef83, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 nzimm=0;static BitArrayRange R_nzimm_5(2, 2);nzimm+=R_nzimm_5.read(ba)<< 5;static BitArrayRange R_nzimm_7(4, 3);nzimm+=R_nzimm_7.read(ba)<< 7;static BitArrayRange R_nzimm_6(5, 5);nzimm+=R_nzimm_6.read(ba)<< 6;static BitArrayRange R_nzimm_4(6, 6);nzimm+=R_nzimm_4.read(ba)<< 4;static BitArrayRange R_nzimm_9(12, 12);nzimm+=R_nzimm_9.read(ba)<< 9;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CADDI16SP\n");cp.code()+="etiss_coverage_count(1, 50);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2383);\n";if(nzimm) { cp.code()+="etiss_coverage_count(1, 2384);\n";cp.code()+="*((RV64IMACFD*)cpu)->X[2ULL] = *((RV64IMACFD*)cpu)->X[2ULL] + "+std::to_string(((etiss_int16)(((etiss_int16) nzimm)<<(6)) > >(6)))+"LL;\n";cp.code()+="etiss_coverage_count(8, 2395, 2387, 2386, 2394, 2390, 2389, 2393, 2391);\n";} else { { cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 2LL);\n";cp.code()+="etiss_coverage_count(2, 2398, 2396);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} } cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CADDI16SP\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 nzimm=0;static BitArrayRange R_nzimm_5(2, 2);nzimm+=R_nzimm_5.read(ba)<< 5;static BitArrayRange R_nzimm_7(4, 3);nzimm+=R_nzimm_7.read(ba)<< 7;static BitArrayRange R_nzimm_6(5, 5);nzimm+=R_nzimm_6.read(ba)<< 6;static BitArrayRange R_nzimm_4(6, 6);nzimm+=R_nzimm_4.read(ba)<< 4;static BitArrayRange R_nzimm_9(12, 12);nzimm+=R_nzimm_9.read(ba)<< 9;std::stringstream ss;ss<< "caddi16sp"<< " # "<< ba<<(" [nzimm="+std::to_string(nzimm)+"]");return ss.str();})
cebreak_
static InstructionDefinition cebreak_(ISA16_RV64IMACFD, "cebreak",(uint64_t) 0x9002,(uint64_t) 0xffff, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { { CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CEBREAK\n");cp.code()+="etiss_coverage_count(1, 69);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_raise(cpu, system, plugin_pointers, 0LL, 3LL);\n";cp.code()+="etiss_coverage_count(2, 2724, 2722);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CEBREAK\n");cp.code()+="return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { std::stringstream ss;ss<< "cebreak"<< " # "<< ba<<(" []");return ss.str();})
candi_imm_rs1
static InstructionDefinition candi_imm_rs1(ISA16_RV64IMACFD, "candi",(uint64_t) 0x8801,(uint64_t) 0xec03, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 imm=0;static BitArrayRange R_imm_0(6, 2);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_imm_5(12, 12);imm+=R_imm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CANDI\n");cp.code()+="etiss_coverage_count(1, 54);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 2477);\n";cp.code()+="{ // block\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] & "+std::to_string(((etiss_int8)(((etiss_int8) imm)<<(2)) > >(2)))+"LL;\n";cp.code()+="etiss_coverage_count(12, 2476, 2466, 2465, 2463, 2464, 2475, 2471, 2470, 2468, 2469, 2474, 2472);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 imm=0;static BitArrayRange R_imm_0(6, 2);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_imm_5(12, 12);imm+=R_imm_5.read(ba)<< 5;std::stringstream ss;ss<< "candi"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})
cadd_rs2_rd
static InstructionDefinition cadd_rs2_rd(ISA16_RV64IMACFD, "cadd",(uint64_t) 0x9002,(uint64_t) 0xf003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(6, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CADD\n");cp.code()+="etiss_coverage_count(1, 67);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2677);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2683, 2680, 2678, 2681, 2682);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] + *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(11, 2700, 2688, 2687, 2685, 2699, 2693, 2692, 2690, 2698, 2697, 2695);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(6, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;std::stringstream ss;ss<< "cadd"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | rd="+std::to_string(rd)+"]");return ss.str();})
cli_imm_rd
static InstructionDefinition cli_imm_rd(ISA16_RV64IMACFD, "cli",(uint64_t) 0x4001,(uint64_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 imm=0;static BitArrayRange R_imm_0(6, 2);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;static BitArrayRange R_imm_5(12, 12);imm+=R_imm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CLI\n");cp.code()+="etiss_coverage_count(1, 48);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 2358);\n";cp.code()+="{ // block\n";cp.code()+="etiss_coverage_count(1, 2342);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2348, 2345, 2343, 2346, 2347);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = "+std::to_string(((etiss_int8)(((etiss_int8) imm)<<(2)) > >(2)))+"LL;\n";cp.code()+="etiss_coverage_count(6, 2357, 2353, 2352, 2350, 2356, 2354);\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 imm=0;static BitArrayRange R_imm_0(6, 2);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;static BitArrayRange R_imm_5(12, 12);imm+=R_imm_5.read(ba)<< 5;std::stringstream ss;ss<< "cli"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rd="+std::to_string(rd)+"]");return ss.str();})
caddi_imm_rs1
static InstructionDefinition caddi_imm_rs1(ISA16_RV64IMACFD, "caddi",(uint64_t) 0x01,(uint64_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 imm=0;static BitArrayRange R_imm_0(6, 2);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(11, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_imm_5(12, 12);imm+=R_imm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CADDI\n");cp.code()+="etiss_coverage_count(1, 45);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2304);\n";if((rs1 % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2310, 2307, 2305, 2308, 2309);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL] + "+std::to_string(((etiss_int8)(((etiss_int8) imm)<<(2)) > >(2)))+"LL;\n";cp.code()+="etiss_coverage_count(10, 2325, 2315, 2314, 2312, 2324, 2320, 2319, 2317, 2323, 2321);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 imm=0;static BitArrayRange R_imm_0(6, 2);imm+=R_imm_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(11, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_imm_5(12, 12);imm+=R_imm_5.read(ba)<< 5;std::stringstream ss;ss<< "caddi"<< " # "<< ba<<(" [imm="+std::to_string(imm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})
cmv_rs2_rd
static InstructionDefinition cmv_rs2_rd(ISA16_RV64IMACFD, "cmv",(uint64_t) 0x8002,(uint64_t) 0xf003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(6, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CMV\n");cp.code()+="etiss_coverage_count(1, 64);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} cp.code()+="etiss_coverage_count(1, 2641);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 2647, 2644, 2642, 2645, 2646);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(7, 2658, 2652, 2651, 2649, 2657, 2656, 2654);\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(6, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;std::stringstream ss;ss<< "cmv"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | rd="+std::to_string(rd)+"]");return ss.str();})
cor_rs2_rd
static InstructionDefinition cor_rs2_rd(ISA16_RV64IMACFD, "cor",(uint64_t) 0x8c41,(uint64_t) 0xfc63, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(9, 7);rd+=R_rd_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//COR\n");cp.code()+="etiss_coverage_count(1, 57);\n";{ cp.code()+="etiss_coverage_count(1, 1189);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string((etiss_uint64)((ic.current_address_+2)))+"ULL;\n";cp.code()+="etiss_coverage_count(7, 1188, 1181, 1187, 1184, 1182, 1183, 1185);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 2531);\n";cp.code()+="{ // block\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL] = *((RV64IMACFD*)cpu)->X["+std::to_string(rd+8ULL)+"ULL] | *((RV64IMACFD*)cpu)->X["+std::to_string(rs2+8ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(14, 2530, 2518, 2517, 2515, 2516, 2529, 2523, 2522, 2520, 2521, 2528, 2527, 2525, 2526);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rd=0;static BitArrayRange R_rd_0(9, 7);rd+=R_rd_0.read(ba)<< 0;std::stringstream ss;ss<< "cor"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | rd="+std::to_string(rd)+"]");return ss.str();})
etiss_int16
int16_t etiss_int16
Definition types.h:51
etiss_uint64
uint64_t etiss_uint64
Definition types.h:58
etiss_uint32
uint32_t etiss_uint32
Definition types.h:55
etiss_int8
int8_t etiss_int8
Definition types.h:48
etiss_uint8
uint8_t etiss_uint8
Definition types.h:49
etiss_int32
int32_t etiss_int32
Definition types.h:54
etiss_uint16
uint16_t etiss_uint16
Definition types.h:52
etiss::CodePart
Contains a small code snipped.
Definition CodePart.h:348
etiss::CodePart::APPENDEDRETURNINGREQUIRED
@ APPENDEDRETURNINGREQUIRED
Definition CodePart.h:364
etiss::CodePart::code
std::string & code()
Definition CodePart.h:378
etiss::CodePart::getAffectedRegisters
RegisterSet & getAffectedRegisters()
Definition CodePart.h:376
etiss::CodeSet
A set of CodeParts.
Definition CodePart.h:399
etiss::CodeSet::append
void append(const CodePart &part, CodePart::TYPE type)
Definition CodePart.h:412
etiss::RegisterSet::add
void add(const RegisterPart &rp)
add a registerPart to the set or just its relevant bits if a register with the same name is already p...
Definition CodePart.h:184
etiss::instr::BitArrayRange
Reading through it will only return bits within the range.
Definition Instruction.h:162
etiss::instr::BitArrayRange::read
I read(const BitArray &ba)
reads bits from the range to the return value starting at the lsb.
Definition Instruction.cpp:171
etiss::instr::BitArray
stores a bit vector
Definition Instruction.h:114
etiss::instr::InstructionContext
this class contains parameters that persist in between instruction lookpus/translation within a trans...
Definition Instruction.h:290
etiss::instr::InstructionContext::current_address_
uint64_t current_address_
start address of current instruction
Definition Instruction.h:319
etiss::instr::Instruction
holds information and translation callbacks for an instruction.
Definition Instruction.h:346
etiss
forwards: include/jit/*
Definition Benchmark.h:17
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