11 using namespace etiss;
31 rd += R_rd_0.
read(ba) << 0;
34 uimm += R_uimm_6.
read(ba) << 6;
37 rs1 += R_rs1_0.
read(ba) << 0;
39 uimm += R_uimm_3.
read(ba) << 3;
46 cp.
code() = std::string(
"//CFLD\n");
50 cp.
code() +=
"{ // block\n";
52 cp.
code() +=
"} // block\n";
55 cp.
code() +=
"{ // block\n";
56 cp.
code() +=
"etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 + 8ULL) +
"ULL] + " + std::to_string(uimm) +
"ULL;\n";
57 cp.
code() +=
"etiss_uint64 mem_val_0;\n";
58 cp.
code() +=
"cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";
59 cp.
code() +=
"if (cpu->exception) { // conditional\n";
61 cp.
code() +=
"{ // procedure\n";
62 cp.
code() +=
"RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
64 cp.
code() +=
"} // procedure\n";
66 cp.
code() +=
"} // conditional\n";
67 cp.
code() +=
"etiss_uint64 res = (etiss_uint64)(mem_val_0);\n";
68 cp.
code() +=
"((RV64IMACFD*)cpu)->F[" + std::to_string(rd + 8ULL) +
"ULL] = res;\n";
69 cp.
code() +=
"} // block\n";
72 cp.
code() +=
"cpu->instructionPointer = cpu->nextPc;\n";
79 cp.
code() = std::string(
"//CFLD\n");
82 cp.
code() +=
"if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
94 rd += R_rd_0.read(ba) << 0;
97 uimm += R_uimm_6.read(ba) << 6;
100 rs1 += R_rs1_0.read(ba) << 0;
102 uimm += R_uimm_3.read(ba) << 3;
106 std::stringstream ss;
108 ss <<
"cfld" <<
" # " << ba << (
" [rd=" + std::to_string(rd) +
" | uimm=" + std::to_string(uimm) +
" | rs1=" + std::to_string(rs1) +
"]");
130 rs2 += R_rs2_0.
read(ba) << 0;
133 uimm += R_uimm_6.
read(ba) << 6;
136 rs1 += R_rs1_0.
read(ba) << 0;
138 uimm += R_uimm_3.
read(ba) << 3;
145 cp.
code() = std::string(
"//CFSD\n");
149 cp.
code() +=
"{ // block\n";
151 cp.
code() +=
"} // block\n";
154 cp.
code() +=
"{ // block\n";
155 cp.
code() +=
"etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 + 8ULL) +
"ULL] + " + std::to_string(uimm) +
"ULL;\n";
156 cp.
code() +=
"etiss_uint64 mem_val_0;\n";
157 cp.
code() +=
"mem_val_0 = (etiss_uint64)(((RV64IMACFD*)cpu)->F[" + std::to_string(rs2 + 8ULL) +
"ULL]);\n";
158 cp.
code() +=
"cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";
159 cp.
code() +=
"if (cpu->exception) { // conditional\n";
161 cp.
code() +=
"{ // procedure\n";
162 cp.
code() +=
"RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
164 cp.
code() +=
"} // procedure\n";
166 cp.
code() +=
"} // conditional\n";
167 cp.
code() +=
"} // block\n";
170 cp.
code() +=
"cpu->instructionPointer = cpu->nextPc;\n";
177 cp.
code() = std::string(
"//CFSD\n");
180 cp.
code() +=
"if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
192 rs2 += R_rs2_0.read(ba) << 0;
195 uimm += R_uimm_6.read(ba) << 6;
198 rs1 += R_rs1_0.read(ba) << 0;
200 uimm += R_uimm_3.read(ba) << 3;
204 std::stringstream ss;
206 ss <<
"cfsd" <<
" # " << ba << (
" [rs2=" + std::to_string(rs2) +
" | uimm=" + std::to_string(uimm) +
" | rs1=" + std::to_string(rs1) +
"]");
228 uimm += R_uimm_6.
read(ba) << 6;
230 uimm += R_uimm_3.
read(ba) << 3;
233 rd += R_rd_0.
read(ba) << 0;
235 uimm += R_uimm_5.
read(ba) << 5;
242 cp.
code() = std::string(
"//CFLDSP\n");
246 cp.
code() +=
"{ // block\n";
248 cp.
code() +=
"} // block\n";
251 cp.
code() +=
"{ // block\n";
252 cp.
code() +=
"etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[2ULL] + " + std::to_string(uimm) +
"ULL;\n";
253 cp.
code() +=
"etiss_uint64 mem_val_0;\n";
254 cp.
code() +=
"cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";
255 cp.
code() +=
"if (cpu->exception) { // conditional\n";
257 cp.
code() +=
"{ // procedure\n";
258 cp.
code() +=
"RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
260 cp.
code() +=
"} // procedure\n";
262 cp.
code() +=
"} // conditional\n";
263 cp.
code() +=
"etiss_uint64 res = (etiss_uint64)(mem_val_0);\n";
264 cp.
code() +=
"((RV64IMACFD*)cpu)->F[" + std::to_string(rd) +
"ULL] = res;\n";
265 cp.
code() +=
"} // block\n";
268 cp.
code() +=
"cpu->instructionPointer = cpu->nextPc;\n";
275 cp.
code() = std::string(
"//CFLDSP\n");
278 cp.
code() +=
"if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
290 uimm += R_uimm_6.read(ba) << 6;
292 uimm += R_uimm_3.read(ba) << 3;
295 rd += R_rd_0.read(ba) << 0;
297 uimm += R_uimm_5.read(ba) << 5;
301 std::stringstream ss;
303 ss <<
"cfldsp" <<
" # " << ba << (
" [uimm=" + std::to_string(uimm) +
" | rd=" + std::to_string(rd) +
"]");
325 rs2 += R_rs2_0.
read(ba) << 0;
328 uimm += R_uimm_6.
read(ba) << 6;
330 uimm += R_uimm_3.
read(ba) << 3;
337 cp.
code() = std::string(
"//CFSDSP\n");
341 cp.
code() +=
"{ // block\n";
343 cp.
code() +=
"} // block\n";
346 cp.
code() +=
"{ // block\n";
347 cp.
code() +=
"etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[2ULL] + " + std::to_string(uimm) +
"ULL;\n";
348 cp.
code() +=
"etiss_uint64 mem_val_0;\n";
349 cp.
code() +=
"mem_val_0 = (etiss_uint64)(((RV64IMACFD*)cpu)->F[" + std::to_string(rs2) +
"ULL]);\n";
350 cp.
code() +=
"cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";
351 cp.
code() +=
"if (cpu->exception) { // conditional\n";
353 cp.
code() +=
"{ // procedure\n";
354 cp.
code() +=
"RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
356 cp.
code() +=
"} // procedure\n";
358 cp.
code() +=
"} // conditional\n";
359 cp.
code() +=
"} // block\n";
362 cp.
code() +=
"cpu->instructionPointer = cpu->nextPc;\n";
369 cp.
code() = std::string(
"//CFSDSP\n");
372 cp.
code() +=
"if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
384 rs2 += R_rs2_0.read(ba) << 0;
387 uimm += R_uimm_6.read(ba) << 6;
389 uimm += R_uimm_3.read(ba) << 3;
393 std::stringstream ss;
395 ss <<
"cfsdsp" <<
" # " << ba << (
" [rs2=" + std::to_string(rs2) +
" | uimm=" + std::to_string(uimm) +
"]");
etiss::instr::InstructionGroup ISA16_RV64IMACFD("ISA16_RV64IMACFD", 16)
static InstructionDefinition cfsd_rs2_uimm_rs1(ISA16_RV64IMACFD, "cfsd",(uint16_t) 0xa000,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(6, 5);uimm+=R_uimm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CFSD\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+2)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_uint64)(((RV64IMACFD*)cpu)->F["+std::to_string(rs2+8ULL)+"ULL]);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CFSD\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(6, 5);uimm+=R_uimm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;std::stringstream ss;ss<< "cfsd"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | uimm="+std::to_string(uimm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})
static InstructionDefinition cfsdsp_rs2_uimm(ISA16_RV64IMACFD, "cfsdsp",(uint16_t) 0xa002,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(6, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint16 uimm=0;static BitArrayRange R_uimm_6(9, 7);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CFSDSP\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+2)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[2ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_uint64)(((RV64IMACFD*)cpu)->F["+std::to_string(rs2)+"ULL]);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CFSDSP\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(6, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint16 uimm=0;static BitArrayRange R_uimm_6(9, 7);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;std::stringstream ss;ss<< "cfsdsp"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | uimm="+std::to_string(uimm)+"]");return ss.str();})
static InstructionDefinition cfldsp_uimm_rd(ISA16_RV64IMACFD, "cfldsp",(uint16_t) 0x2002,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 uimm=0;static BitArrayRange R_uimm_6(4, 2);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_3(6, 5);uimm+=R_uimm_3.read(ba)<< 3;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;static BitArrayRange R_uimm_5(12, 12);uimm+=R_uimm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CFLDSP\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+2)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[2ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_uint64 res = (etiss_uint64)(mem_val_0);\n";cp.code()+="((RV64IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = res;\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CFLDSP\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 uimm=0;static BitArrayRange R_uimm_6(4, 2);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_3(6, 5);uimm+=R_uimm_3.read(ba)<< 3;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;static BitArrayRange R_uimm_5(12, 12);uimm+=R_uimm_5.read(ba)<< 5;std::stringstream ss;ss<< "cfldsp"<< " # "<< ba<<(" [uimm="+std::to_string(uimm)+" | rd="+std::to_string(rd)+"]");return ss.str();})
static InstructionDefinition cfld_rd_uimm_rs1(ISA16_RV64IMACFD, "cfld",(uint16_t) 0x2000,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(4, 2);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(6, 5);uimm+=R_uimm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CFLD\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+2)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_uint64 res = (etiss_uint64)(mem_val_0);\n";cp.code()+="((RV64IMACFD*)cpu)->F["+std::to_string(rd+8ULL)+"ULL] = res;\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CFLD\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(4, 2);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(6, 5);uimm+=R_uimm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;std::stringstream ss;ss<< "cfld"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | uimm="+std::to_string(uimm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})
static __inline__ uint16_t
Contains a small code snipped.
@ APPENDEDRETURNINGREQUIRED
RegisterSet & getAffectedRegisters()
void append(const CodePart &part, CodePart::TYPE type)
void add(const RegisterPart &rp)
add a registerPart to the set or just its relevant bits if a register with the same name is already p...
Reading through it will only return bits within the range.
I read(const BitArray &ba)
reads bits from the range to the return value starting at the lsb.
this class contains parameters that persist in between instruction lookpus/translation within a trans...
uint64_t current_address_
start address of current instruction
holds information and translation callbacks for an instruction.
Page Table Entry (PTE) defines the composition of Page Frame Number (PFN) and relavant flags.