ETISS 0.11.2
ExtendableTranslatingInstructionSetSimulator(version0.11.2)
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RV64IMACFD_RV32AInstr.cpp
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1// clang-format off
9#include "RV64IMACFDArch.h"
10#include "RV64IMACFDFuncs.h"
11
12using namespace etiss;
13using namespace etiss::instr;
14
15// AMOSWAPW --------------------------------------------------------------------
18 "amoswapw",
19 (uint32_t) 0x800202f,
20 (uint32_t) 0xf800707f,
22 {
23
24// -----------------------------------------------------------------------------
25
26// -----------------------------------------------------------------------------
27
28// -----------------------------------------------------------------------------
29// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
30etiss_uint8 rd = 0;
31static BitArrayRange R_rd_0(11, 7);
32rd += R_rd_0.read(ba) << 0;
33etiss_uint8 rs1 = 0;
34static BitArrayRange R_rs1_0(19, 15);
35rs1 += R_rs1_0.read(ba) << 0;
36etiss_uint8 rs2 = 0;
37static BitArrayRange R_rs2_0(24, 20);
38rs2 += R_rs2_0.read(ba) << 0;
39etiss_uint8 rl = 0;
40static BitArrayRange R_rl_0(25, 25);
41rl += R_rl_0.read(ba) << 0;
42etiss_uint8 aq = 0;
43static BitArrayRange R_aq_0(26, 26);
44aq += R_aq_0.read(ba) << 0;
45
46// NOLINTEND(clang-diagnostic-unused-but-set-variable)
47// -----------------------------------------------------------------------------
48
49 {
51
52 cp.code() = std::string("//AMOSWAPW\n");
53
54// -----------------------------------------------------------------------------
55cp.code() += "etiss_coverage_count(1, 172);\n";
56{ // block
57cp.code() += "etiss_coverage_count(1, 1169);\n";
58cp.code() += "{ // block\n";
59cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + 4) + "ULL;\n";
60cp.code() += "etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";
61cp.code() += "} // block\n";
62} // block
63{ // block
64cp.code() += "etiss_coverage_count(1, 6522);\n";
65cp.code() += "{ // block\n";
66cp.code() += "etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL];\n";
67cp.code() += "etiss_coverage_count(4, 6489, 6488, 6487, 6485);\n";
68cp.code() += "etiss_coverage_count(1, 6490);\n";
69if ((rd % 32ULL) != 0LL) { // conditional
70cp.code() += "etiss_coverage_count(5, 6496, 6493, 6491, 6494, 6495);\n";
71cp.code() += "etiss_uint32 mem_val_0;\n";
72cp.code() += "cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";
73cp.code() += "if (cpu->exception) { // conditional\n";
74{ // procedure
75cp.code() += "{ // procedure\n";
76cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
77cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
78cp.code() += "} // procedure\n";
79} // procedure
80cp.code() += "} // conditional\n";
81cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = (etiss_int64)(((etiss_int32)(mem_val_0)));\n";
82cp.code() += "etiss_coverage_count(9, 6510, 6501, 6500, 6498, 6509, 6506, 6504, 6503, 6507);\n";
83} // conditional
84cp.code() += "etiss_uint32 mem_val_1;\n";
85cp.code() += "mem_val_1 = (etiss_int32)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL]);\n";
86cp.code() += "etiss_coverage_count(7, 6521, 6513, 6512, 6520, 6518, 6517, 6515);\n";
87cp.code() += "cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_1, 4);\n";
88cp.code() += "if (cpu->exception) { // conditional\n";
89{ // procedure
90cp.code() += "{ // procedure\n";
91cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
92cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
93cp.code() += "} // procedure\n";
94} // procedure
95cp.code() += "} // conditional\n";
96cp.code() += "} // block\n";
97} // block
98cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
99cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
100// -----------------------------------------------------------------------------
101 cp.getAffectedRegisters().add("instructionPointer", 32);
102 }
103 {
105
106 cp.code() = std::string("//AMOSWAPW\n");
107
108// -----------------------------------------------------------------------------
109cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
110// -----------------------------------------------------------------------------
111 }
112
113 return true;
114 },
115 0,
116 [] (BitArray & ba, Instruction & instr)
117 {
118// -----------------------------------------------------------------------------
119etiss_uint8 rd = 0;
120static BitArrayRange R_rd_0(11, 7);
121rd += R_rd_0.read(ba) << 0;
122etiss_uint8 rs1 = 0;
123static BitArrayRange R_rs1_0(19, 15);
124rs1 += R_rs1_0.read(ba) << 0;
125etiss_uint8 rs2 = 0;
126static BitArrayRange R_rs2_0(24, 20);
127rs2 += R_rs2_0.read(ba) << 0;
128etiss_uint8 rl = 0;
129static BitArrayRange R_rl_0(25, 25);
130rl += R_rl_0.read(ba) << 0;
131etiss_uint8 aq = 0;
132static BitArrayRange R_aq_0(26, 26);
133aq += R_aq_0.read(ba) << 0;
134
135// -----------------------------------------------------------------------------
136
137 std::stringstream ss;
138// -----------------------------------------------------------------------------
139ss << "amoswapw" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | rs2=" + std::to_string(rs2) + " | rl=" + std::to_string(rl) + " | aq=" + std::to_string(aq) + "]");
140// -----------------------------------------------------------------------------
141 return ss.str();
142 }
143);
144
145// AMOADDW ---------------------------------------------------------------------
148 "amoaddw",
149 (uint32_t) 0x00202f,
150 (uint32_t) 0xf800707f,
151 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
152 {
153
154// -----------------------------------------------------------------------------
155
156// -----------------------------------------------------------------------------
157
158// -----------------------------------------------------------------------------
159// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
160etiss_uint8 rd = 0;
161static BitArrayRange R_rd_0(11, 7);
162rd += R_rd_0.read(ba) << 0;
163etiss_uint8 rs1 = 0;
164static BitArrayRange R_rs1_0(19, 15);
165rs1 += R_rs1_0.read(ba) << 0;
166etiss_uint8 rs2 = 0;
167static BitArrayRange R_rs2_0(24, 20);
168rs2 += R_rs2_0.read(ba) << 0;
169etiss_uint8 rl = 0;
170static BitArrayRange R_rl_0(25, 25);
171rl += R_rl_0.read(ba) << 0;
172etiss_uint8 aq = 0;
173static BitArrayRange R_aq_0(26, 26);
174aq += R_aq_0.read(ba) << 0;
175
176// NOLINTEND(clang-diagnostic-unused-but-set-variable)
177// -----------------------------------------------------------------------------
178
179 {
181
182 cp.code() = std::string("//AMOADDW\n");
183
184// -----------------------------------------------------------------------------
185cp.code() += "etiss_coverage_count(1, 173);\n";
186{ // block
187cp.code() += "etiss_coverage_count(1, 1169);\n";
188cp.code() += "{ // block\n";
189cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + 4) + "ULL;\n";
190cp.code() += "etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";
191cp.code() += "} // block\n";
192} // block
193{ // block
194cp.code() += "etiss_coverage_count(1, 6563);\n";
195cp.code() += "{ // block\n";
196cp.code() += "etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL];\n";
197cp.code() += "etiss_coverage_count(4, 6529, 6528, 6527, 6525);\n";
198cp.code() += "etiss_uint32 mem_val_0;\n";
199cp.code() += "cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";
200cp.code() += "if (cpu->exception) { // conditional\n";
201{ // procedure
202cp.code() += "{ // procedure\n";
203cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
204cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
205cp.code() += "} // procedure\n";
206} // procedure
207cp.code() += "} // conditional\n";
208cp.code() += "etiss_int32 res1 = mem_val_0;\n";
209cp.code() += "etiss_coverage_count(3, 6534, 6533, 6532);\n";
210cp.code() += "etiss_coverage_count(1, 6535);\n";
211if ((rd % 32ULL) != 0LL) { // conditional
212cp.code() += "etiss_coverage_count(5, 6541, 6538, 6536, 6539, 6540);\n";
213cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = res1;\n";
214cp.code() += "etiss_coverage_count(5, 6548, 6546, 6545, 6543, 6547);\n";
215} // conditional
216cp.code() += "etiss_uint32 res2 = res1 + *((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL];\n";
217cp.code() += "etiss_coverage_count(6, 6557, 6556, 6550, 6555, 6554, 6552);\n";
218cp.code() += "etiss_uint32 mem_val_1;\n";
219cp.code() += "mem_val_1 = res2;\n";
220cp.code() += "etiss_coverage_count(4, 6562, 6560, 6559, 6561);\n";
221cp.code() += "cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_1, 4);\n";
222cp.code() += "if (cpu->exception) { // conditional\n";
223{ // procedure
224cp.code() += "{ // procedure\n";
225cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
226cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
227cp.code() += "} // procedure\n";
228} // procedure
229cp.code() += "} // conditional\n";
230cp.code() += "} // block\n";
231} // block
232cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
233cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
234// -----------------------------------------------------------------------------
235 cp.getAffectedRegisters().add("instructionPointer", 32);
236 }
237 {
239
240 cp.code() = std::string("//AMOADDW\n");
241
242// -----------------------------------------------------------------------------
243cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
244// -----------------------------------------------------------------------------
245 }
246
247 return true;
248 },
249 0,
250 [] (BitArray & ba, Instruction & instr)
251 {
252// -----------------------------------------------------------------------------
253etiss_uint8 rd = 0;
254static BitArrayRange R_rd_0(11, 7);
255rd += R_rd_0.read(ba) << 0;
256etiss_uint8 rs1 = 0;
257static BitArrayRange R_rs1_0(19, 15);
258rs1 += R_rs1_0.read(ba) << 0;
259etiss_uint8 rs2 = 0;
260static BitArrayRange R_rs2_0(24, 20);
261rs2 += R_rs2_0.read(ba) << 0;
262etiss_uint8 rl = 0;
263static BitArrayRange R_rl_0(25, 25);
264rl += R_rl_0.read(ba) << 0;
265etiss_uint8 aq = 0;
266static BitArrayRange R_aq_0(26, 26);
267aq += R_aq_0.read(ba) << 0;
268
269// -----------------------------------------------------------------------------
270
271 std::stringstream ss;
272// -----------------------------------------------------------------------------
273ss << "amoaddw" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | rs2=" + std::to_string(rs2) + " | rl=" + std::to_string(rl) + " | aq=" + std::to_string(aq) + "]");
274// -----------------------------------------------------------------------------
275 return ss.str();
276 }
277);
278
279// AMOXORW ---------------------------------------------------------------------
282 "amoxorw",
283 (uint32_t) 0x2000202f,
284 (uint32_t) 0xf800707f,
285 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
286 {
287
288// -----------------------------------------------------------------------------
289
290// -----------------------------------------------------------------------------
291
292// -----------------------------------------------------------------------------
293// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
294etiss_uint8 rd = 0;
295static BitArrayRange R_rd_0(11, 7);
296rd += R_rd_0.read(ba) << 0;
297etiss_uint8 rs1 = 0;
298static BitArrayRange R_rs1_0(19, 15);
299rs1 += R_rs1_0.read(ba) << 0;
300etiss_uint8 rs2 = 0;
301static BitArrayRange R_rs2_0(24, 20);
302rs2 += R_rs2_0.read(ba) << 0;
303etiss_uint8 rl = 0;
304static BitArrayRange R_rl_0(25, 25);
305rl += R_rl_0.read(ba) << 0;
306etiss_uint8 aq = 0;
307static BitArrayRange R_aq_0(26, 26);
308aq += R_aq_0.read(ba) << 0;
309
310// NOLINTEND(clang-diagnostic-unused-but-set-variable)
311// -----------------------------------------------------------------------------
312
313 {
315
316 cp.code() = std::string("//AMOXORW\n");
317
318// -----------------------------------------------------------------------------
319cp.code() += "etiss_coverage_count(1, 174);\n";
320{ // block
321cp.code() += "etiss_coverage_count(1, 1169);\n";
322cp.code() += "{ // block\n";
323cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + 4) + "ULL;\n";
324cp.code() += "etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";
325cp.code() += "} // block\n";
326} // block
327{ // block
328cp.code() += "etiss_coverage_count(1, 6604);\n";
329cp.code() += "{ // block\n";
330cp.code() += "etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL];\n";
331cp.code() += "etiss_coverage_count(4, 6570, 6569, 6568, 6566);\n";
332cp.code() += "etiss_uint32 mem_val_0;\n";
333cp.code() += "cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";
334cp.code() += "if (cpu->exception) { // conditional\n";
335{ // procedure
336cp.code() += "{ // procedure\n";
337cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
338cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
339cp.code() += "} // procedure\n";
340} // procedure
341cp.code() += "} // conditional\n";
342cp.code() += "etiss_int32 res1 = mem_val_0;\n";
343cp.code() += "etiss_coverage_count(3, 6575, 6574, 6573);\n";
344cp.code() += "etiss_coverage_count(1, 6576);\n";
345if ((rd % 32ULL) != 0LL) { // conditional
346cp.code() += "etiss_coverage_count(5, 6582, 6579, 6577, 6580, 6581);\n";
347cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = res1;\n";
348cp.code() += "etiss_coverage_count(5, 6589, 6587, 6586, 6584, 6588);\n";
349} // conditional
350cp.code() += "etiss_uint32 res2 = res1 ^ *((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL];\n";
351cp.code() += "etiss_coverage_count(6, 6598, 6597, 6591, 6596, 6595, 6593);\n";
352cp.code() += "etiss_uint32 mem_val_1;\n";
353cp.code() += "mem_val_1 = res2;\n";
354cp.code() += "etiss_coverage_count(4, 6603, 6601, 6600, 6602);\n";
355cp.code() += "cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_1, 4);\n";
356cp.code() += "if (cpu->exception) { // conditional\n";
357{ // procedure
358cp.code() += "{ // procedure\n";
359cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
360cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
361cp.code() += "} // procedure\n";
362} // procedure
363cp.code() += "} // conditional\n";
364cp.code() += "} // block\n";
365} // block
366cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
367cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
368// -----------------------------------------------------------------------------
369 cp.getAffectedRegisters().add("instructionPointer", 32);
370 }
371 {
373
374 cp.code() = std::string("//AMOXORW\n");
375
376// -----------------------------------------------------------------------------
377cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
378// -----------------------------------------------------------------------------
379 }
380
381 return true;
382 },
383 0,
384 [] (BitArray & ba, Instruction & instr)
385 {
386// -----------------------------------------------------------------------------
387etiss_uint8 rd = 0;
388static BitArrayRange R_rd_0(11, 7);
389rd += R_rd_0.read(ba) << 0;
390etiss_uint8 rs1 = 0;
391static BitArrayRange R_rs1_0(19, 15);
392rs1 += R_rs1_0.read(ba) << 0;
393etiss_uint8 rs2 = 0;
394static BitArrayRange R_rs2_0(24, 20);
395rs2 += R_rs2_0.read(ba) << 0;
396etiss_uint8 rl = 0;
397static BitArrayRange R_rl_0(25, 25);
398rl += R_rl_0.read(ba) << 0;
399etiss_uint8 aq = 0;
400static BitArrayRange R_aq_0(26, 26);
401aq += R_aq_0.read(ba) << 0;
402
403// -----------------------------------------------------------------------------
404
405 std::stringstream ss;
406// -----------------------------------------------------------------------------
407ss << "amoxorw" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | rs2=" + std::to_string(rs2) + " | rl=" + std::to_string(rl) + " | aq=" + std::to_string(aq) + "]");
408// -----------------------------------------------------------------------------
409 return ss.str();
410 }
411);
412
413// AMOANDW ---------------------------------------------------------------------
416 "amoandw",
417 (uint32_t) 0x6000202f,
418 (uint32_t) 0xf800707f,
419 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
420 {
421
422// -----------------------------------------------------------------------------
423
424// -----------------------------------------------------------------------------
425
426// -----------------------------------------------------------------------------
427// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
428etiss_uint8 rd = 0;
429static BitArrayRange R_rd_0(11, 7);
430rd += R_rd_0.read(ba) << 0;
431etiss_uint8 rs1 = 0;
432static BitArrayRange R_rs1_0(19, 15);
433rs1 += R_rs1_0.read(ba) << 0;
434etiss_uint8 rs2 = 0;
435static BitArrayRange R_rs2_0(24, 20);
436rs2 += R_rs2_0.read(ba) << 0;
437etiss_uint8 rl = 0;
438static BitArrayRange R_rl_0(25, 25);
439rl += R_rl_0.read(ba) << 0;
440etiss_uint8 aq = 0;
441static BitArrayRange R_aq_0(26, 26);
442aq += R_aq_0.read(ba) << 0;
443
444// NOLINTEND(clang-diagnostic-unused-but-set-variable)
445// -----------------------------------------------------------------------------
446
447 {
449
450 cp.code() = std::string("//AMOANDW\n");
451
452// -----------------------------------------------------------------------------
453cp.code() += "etiss_coverage_count(1, 175);\n";
454{ // block
455cp.code() += "etiss_coverage_count(1, 1169);\n";
456cp.code() += "{ // block\n";
457cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + 4) + "ULL;\n";
458cp.code() += "etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";
459cp.code() += "} // block\n";
460} // block
461{ // block
462cp.code() += "etiss_coverage_count(1, 6645);\n";
463cp.code() += "{ // block\n";
464cp.code() += "etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL];\n";
465cp.code() += "etiss_coverage_count(4, 6611, 6610, 6609, 6607);\n";
466cp.code() += "etiss_uint32 mem_val_0;\n";
467cp.code() += "cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";
468cp.code() += "if (cpu->exception) { // conditional\n";
469{ // procedure
470cp.code() += "{ // procedure\n";
471cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
472cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
473cp.code() += "} // procedure\n";
474} // procedure
475cp.code() += "} // conditional\n";
476cp.code() += "etiss_int32 res1 = mem_val_0;\n";
477cp.code() += "etiss_coverage_count(3, 6616, 6615, 6614);\n";
478cp.code() += "etiss_coverage_count(1, 6617);\n";
479if ((rd % 32ULL) != 0LL) { // conditional
480cp.code() += "etiss_coverage_count(5, 6623, 6620, 6618, 6621, 6622);\n";
481cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = res1;\n";
482cp.code() += "etiss_coverage_count(5, 6630, 6628, 6627, 6625, 6629);\n";
483} // conditional
484cp.code() += "etiss_uint32 res2 = res1 & *((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL];\n";
485cp.code() += "etiss_coverage_count(6, 6639, 6638, 6632, 6637, 6636, 6634);\n";
486cp.code() += "etiss_uint32 mem_val_1;\n";
487cp.code() += "mem_val_1 = res2;\n";
488cp.code() += "etiss_coverage_count(4, 6644, 6642, 6641, 6643);\n";
489cp.code() += "cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_1, 4);\n";
490cp.code() += "if (cpu->exception) { // conditional\n";
491{ // procedure
492cp.code() += "{ // procedure\n";
493cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
494cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
495cp.code() += "} // procedure\n";
496} // procedure
497cp.code() += "} // conditional\n";
498cp.code() += "} // block\n";
499} // block
500cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
501cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
502// -----------------------------------------------------------------------------
503 cp.getAffectedRegisters().add("instructionPointer", 32);
504 }
505 {
507
508 cp.code() = std::string("//AMOANDW\n");
509
510// -----------------------------------------------------------------------------
511cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
512// -----------------------------------------------------------------------------
513 }
514
515 return true;
516 },
517 0,
518 [] (BitArray & ba, Instruction & instr)
519 {
520// -----------------------------------------------------------------------------
521etiss_uint8 rd = 0;
522static BitArrayRange R_rd_0(11, 7);
523rd += R_rd_0.read(ba) << 0;
524etiss_uint8 rs1 = 0;
525static BitArrayRange R_rs1_0(19, 15);
526rs1 += R_rs1_0.read(ba) << 0;
527etiss_uint8 rs2 = 0;
528static BitArrayRange R_rs2_0(24, 20);
529rs2 += R_rs2_0.read(ba) << 0;
530etiss_uint8 rl = 0;
531static BitArrayRange R_rl_0(25, 25);
532rl += R_rl_0.read(ba) << 0;
533etiss_uint8 aq = 0;
534static BitArrayRange R_aq_0(26, 26);
535aq += R_aq_0.read(ba) << 0;
536
537// -----------------------------------------------------------------------------
538
539 std::stringstream ss;
540// -----------------------------------------------------------------------------
541ss << "amoandw" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | rs2=" + std::to_string(rs2) + " | rl=" + std::to_string(rl) + " | aq=" + std::to_string(aq) + "]");
542// -----------------------------------------------------------------------------
543 return ss.str();
544 }
545);
546
547// AMOORW ----------------------------------------------------------------------
550 "amoorw",
551 (uint32_t) 0x4000202f,
552 (uint32_t) 0xf800707f,
553 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
554 {
555
556// -----------------------------------------------------------------------------
557
558// -----------------------------------------------------------------------------
559
560// -----------------------------------------------------------------------------
561// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
562etiss_uint8 rd = 0;
563static BitArrayRange R_rd_0(11, 7);
564rd += R_rd_0.read(ba) << 0;
565etiss_uint8 rs1 = 0;
566static BitArrayRange R_rs1_0(19, 15);
567rs1 += R_rs1_0.read(ba) << 0;
568etiss_uint8 rs2 = 0;
569static BitArrayRange R_rs2_0(24, 20);
570rs2 += R_rs2_0.read(ba) << 0;
571etiss_uint8 rl = 0;
572static BitArrayRange R_rl_0(25, 25);
573rl += R_rl_0.read(ba) << 0;
574etiss_uint8 aq = 0;
575static BitArrayRange R_aq_0(26, 26);
576aq += R_aq_0.read(ba) << 0;
577
578// NOLINTEND(clang-diagnostic-unused-but-set-variable)
579// -----------------------------------------------------------------------------
580
581 {
583
584 cp.code() = std::string("//AMOORW\n");
585
586// -----------------------------------------------------------------------------
587cp.code() += "etiss_coverage_count(1, 176);\n";
588{ // block
589cp.code() += "etiss_coverage_count(1, 1169);\n";
590cp.code() += "{ // block\n";
591cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + 4) + "ULL;\n";
592cp.code() += "etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";
593cp.code() += "} // block\n";
594} // block
595{ // block
596cp.code() += "etiss_coverage_count(1, 6686);\n";
597cp.code() += "{ // block\n";
598cp.code() += "etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL];\n";
599cp.code() += "etiss_coverage_count(4, 6652, 6651, 6650, 6648);\n";
600cp.code() += "etiss_uint32 mem_val_0;\n";
601cp.code() += "cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";
602cp.code() += "if (cpu->exception) { // conditional\n";
603{ // procedure
604cp.code() += "{ // procedure\n";
605cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
606cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
607cp.code() += "} // procedure\n";
608} // procedure
609cp.code() += "} // conditional\n";
610cp.code() += "etiss_int32 res1 = mem_val_0;\n";
611cp.code() += "etiss_coverage_count(3, 6657, 6656, 6655);\n";
612cp.code() += "etiss_coverage_count(1, 6658);\n";
613if ((rd % 32ULL) != 0LL) { // conditional
614cp.code() += "etiss_coverage_count(5, 6664, 6661, 6659, 6662, 6663);\n";
615cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = res1;\n";
616cp.code() += "etiss_coverage_count(5, 6671, 6669, 6668, 6666, 6670);\n";
617} // conditional
618cp.code() += "etiss_uint32 res2 = res1 | *((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL];\n";
619cp.code() += "etiss_coverage_count(6, 6680, 6679, 6673, 6678, 6677, 6675);\n";
620cp.code() += "etiss_uint32 mem_val_1;\n";
621cp.code() += "mem_val_1 = res2;\n";
622cp.code() += "etiss_coverage_count(4, 6685, 6683, 6682, 6684);\n";
623cp.code() += "cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_1, 4);\n";
624cp.code() += "if (cpu->exception) { // conditional\n";
625{ // procedure
626cp.code() += "{ // procedure\n";
627cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
628cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
629cp.code() += "} // procedure\n";
630} // procedure
631cp.code() += "} // conditional\n";
632cp.code() += "} // block\n";
633} // block
634cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
635cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
636// -----------------------------------------------------------------------------
637 cp.getAffectedRegisters().add("instructionPointer", 32);
638 }
639 {
641
642 cp.code() = std::string("//AMOORW\n");
643
644// -----------------------------------------------------------------------------
645cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
646// -----------------------------------------------------------------------------
647 }
648
649 return true;
650 },
651 0,
652 [] (BitArray & ba, Instruction & instr)
653 {
654// -----------------------------------------------------------------------------
655etiss_uint8 rd = 0;
656static BitArrayRange R_rd_0(11, 7);
657rd += R_rd_0.read(ba) << 0;
658etiss_uint8 rs1 = 0;
659static BitArrayRange R_rs1_0(19, 15);
660rs1 += R_rs1_0.read(ba) << 0;
661etiss_uint8 rs2 = 0;
662static BitArrayRange R_rs2_0(24, 20);
663rs2 += R_rs2_0.read(ba) << 0;
664etiss_uint8 rl = 0;
665static BitArrayRange R_rl_0(25, 25);
666rl += R_rl_0.read(ba) << 0;
667etiss_uint8 aq = 0;
668static BitArrayRange R_aq_0(26, 26);
669aq += R_aq_0.read(ba) << 0;
670
671// -----------------------------------------------------------------------------
672
673 std::stringstream ss;
674// -----------------------------------------------------------------------------
675ss << "amoorw" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | rs2=" + std::to_string(rs2) + " | rl=" + std::to_string(rl) + " | aq=" + std::to_string(aq) + "]");
676// -----------------------------------------------------------------------------
677 return ss.str();
678 }
679);
680
681// AMOMINW ---------------------------------------------------------------------
684 "amominw",
685 (uint32_t) 0x8000202f,
686 (uint32_t) 0xf800707f,
687 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
688 {
689
690// -----------------------------------------------------------------------------
691
692// -----------------------------------------------------------------------------
693
694// -----------------------------------------------------------------------------
695// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
696etiss_uint8 rd = 0;
697static BitArrayRange R_rd_0(11, 7);
698rd += R_rd_0.read(ba) << 0;
699etiss_uint8 rs1 = 0;
700static BitArrayRange R_rs1_0(19, 15);
701rs1 += R_rs1_0.read(ba) << 0;
702etiss_uint8 rs2 = 0;
703static BitArrayRange R_rs2_0(24, 20);
704rs2 += R_rs2_0.read(ba) << 0;
705etiss_uint8 rl = 0;
706static BitArrayRange R_rl_0(25, 25);
707rl += R_rl_0.read(ba) << 0;
708etiss_uint8 aq = 0;
709static BitArrayRange R_aq_0(26, 26);
710aq += R_aq_0.read(ba) << 0;
711
712// NOLINTEND(clang-diagnostic-unused-but-set-variable)
713// -----------------------------------------------------------------------------
714
715 {
717
718 cp.code() = std::string("//AMOMINW\n");
719
720// -----------------------------------------------------------------------------
721cp.code() += "etiss_coverage_count(1, 177);\n";
722{ // block
723cp.code() += "etiss_coverage_count(1, 1169);\n";
724cp.code() += "{ // block\n";
725cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + 4) + "ULL;\n";
726cp.code() += "etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";
727cp.code() += "} // block\n";
728} // block
729{ // block
730cp.code() += "etiss_coverage_count(1, 6736);\n";
731cp.code() += "{ // block\n";
732cp.code() += "etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL];\n";
733cp.code() += "etiss_coverage_count(4, 6693, 6692, 6691, 6689);\n";
734cp.code() += "etiss_uint32 mem_val_0;\n";
735cp.code() += "cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";
736cp.code() += "if (cpu->exception) { // conditional\n";
737{ // procedure
738cp.code() += "{ // procedure\n";
739cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
740cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
741cp.code() += "} // procedure\n";
742} // procedure
743cp.code() += "} // conditional\n";
744cp.code() += "etiss_int32 res1 = mem_val_0;\n";
745cp.code() += "etiss_coverage_count(3, 6698, 6697, 6696);\n";
746cp.code() += "etiss_coverage_count(1, 6699);\n";
747if ((rd % 32ULL) != 0LL) { // conditional
748cp.code() += "etiss_coverage_count(5, 6705, 6702, 6700, 6703, 6704);\n";
749cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = res1;\n";
750cp.code() += "etiss_coverage_count(5, 6712, 6710, 6709, 6707, 6711);\n";
751} // conditional
752cp.code() += "etiss_uint32 res2 = (res1 > (etiss_int32)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL])) ? (*((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL]) : (res1);\n";
753cp.code() += "etiss_coverage_count(12, 6730, 6729, 6722, 6714, 6721, 6719, 6718, 6716, 6727, 6726, 6724, 6728);\n";
754cp.code() += "etiss_uint32 mem_val_1;\n";
755cp.code() += "mem_val_1 = res2;\n";
756cp.code() += "etiss_coverage_count(4, 6735, 6733, 6732, 6734);\n";
757cp.code() += "cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_1, 4);\n";
758cp.code() += "if (cpu->exception) { // conditional\n";
759{ // procedure
760cp.code() += "{ // procedure\n";
761cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
762cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
763cp.code() += "} // procedure\n";
764} // procedure
765cp.code() += "} // conditional\n";
766cp.code() += "} // block\n";
767} // block
768cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
769cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
770// -----------------------------------------------------------------------------
771 cp.getAffectedRegisters().add("instructionPointer", 32);
772 }
773 {
775
776 cp.code() = std::string("//AMOMINW\n");
777
778// -----------------------------------------------------------------------------
779cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
780// -----------------------------------------------------------------------------
781 }
782
783 return true;
784 },
785 0,
786 [] (BitArray & ba, Instruction & instr)
787 {
788// -----------------------------------------------------------------------------
789etiss_uint8 rd = 0;
790static BitArrayRange R_rd_0(11, 7);
791rd += R_rd_0.read(ba) << 0;
792etiss_uint8 rs1 = 0;
793static BitArrayRange R_rs1_0(19, 15);
794rs1 += R_rs1_0.read(ba) << 0;
795etiss_uint8 rs2 = 0;
796static BitArrayRange R_rs2_0(24, 20);
797rs2 += R_rs2_0.read(ba) << 0;
798etiss_uint8 rl = 0;
799static BitArrayRange R_rl_0(25, 25);
800rl += R_rl_0.read(ba) << 0;
801etiss_uint8 aq = 0;
802static BitArrayRange R_aq_0(26, 26);
803aq += R_aq_0.read(ba) << 0;
804
805// -----------------------------------------------------------------------------
806
807 std::stringstream ss;
808// -----------------------------------------------------------------------------
809ss << "amominw" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | rs2=" + std::to_string(rs2) + " | rl=" + std::to_string(rl) + " | aq=" + std::to_string(aq) + "]");
810// -----------------------------------------------------------------------------
811 return ss.str();
812 }
813);
814
815// AMOMAXW ---------------------------------------------------------------------
818 "amomaxw",
819 (uint32_t) 0xa000202f,
820 (uint32_t) 0xf800707f,
821 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
822 {
823
824// -----------------------------------------------------------------------------
825
826// -----------------------------------------------------------------------------
827
828// -----------------------------------------------------------------------------
829// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
830etiss_uint8 rd = 0;
831static BitArrayRange R_rd_0(11, 7);
832rd += R_rd_0.read(ba) << 0;
833etiss_uint8 rs1 = 0;
834static BitArrayRange R_rs1_0(19, 15);
835rs1 += R_rs1_0.read(ba) << 0;
836etiss_uint8 rs2 = 0;
837static BitArrayRange R_rs2_0(24, 20);
838rs2 += R_rs2_0.read(ba) << 0;
839etiss_uint8 rl = 0;
840static BitArrayRange R_rl_0(25, 25);
841rl += R_rl_0.read(ba) << 0;
842etiss_uint8 aq = 0;
843static BitArrayRange R_aq_0(26, 26);
844aq += R_aq_0.read(ba) << 0;
845
846// NOLINTEND(clang-diagnostic-unused-but-set-variable)
847// -----------------------------------------------------------------------------
848
849 {
851
852 cp.code() = std::string("//AMOMAXW\n");
853
854// -----------------------------------------------------------------------------
855cp.code() += "etiss_coverage_count(1, 178);\n";
856{ // block
857cp.code() += "etiss_coverage_count(1, 1169);\n";
858cp.code() += "{ // block\n";
859cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + 4) + "ULL;\n";
860cp.code() += "etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";
861cp.code() += "} // block\n";
862} // block
863{ // block
864cp.code() += "etiss_coverage_count(1, 6786);\n";
865cp.code() += "{ // block\n";
866cp.code() += "etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL];\n";
867cp.code() += "etiss_coverage_count(4, 6743, 6742, 6741, 6739);\n";
868cp.code() += "etiss_uint32 mem_val_0;\n";
869cp.code() += "cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";
870cp.code() += "if (cpu->exception) { // conditional\n";
871{ // procedure
872cp.code() += "{ // procedure\n";
873cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
874cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
875cp.code() += "} // procedure\n";
876} // procedure
877cp.code() += "} // conditional\n";
878cp.code() += "etiss_int32 res1 = mem_val_0;\n";
879cp.code() += "etiss_coverage_count(3, 6748, 6747, 6746);\n";
880cp.code() += "etiss_coverage_count(1, 6749);\n";
881if ((rd % 32ULL) != 0LL) { // conditional
882cp.code() += "etiss_coverage_count(5, 6755, 6752, 6750, 6753, 6754);\n";
883cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = res1;\n";
884cp.code() += "etiss_coverage_count(5, 6762, 6760, 6759, 6757, 6761);\n";
885} // conditional
886cp.code() += "etiss_uint32 res2 = (res1 < (etiss_int32)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL])) ? (*((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL]) : (res1);\n";
887cp.code() += "etiss_coverage_count(12, 6780, 6779, 6772, 6764, 6771, 6769, 6768, 6766, 6777, 6776, 6774, 6778);\n";
888cp.code() += "etiss_uint32 mem_val_1;\n";
889cp.code() += "mem_val_1 = res2;\n";
890cp.code() += "etiss_coverage_count(4, 6785, 6783, 6782, 6784);\n";
891cp.code() += "cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_1, 4);\n";
892cp.code() += "if (cpu->exception) { // conditional\n";
893{ // procedure
894cp.code() += "{ // procedure\n";
895cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
896cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
897cp.code() += "} // procedure\n";
898} // procedure
899cp.code() += "} // conditional\n";
900cp.code() += "} // block\n";
901} // block
902cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
903cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
904// -----------------------------------------------------------------------------
905 cp.getAffectedRegisters().add("instructionPointer", 32);
906 }
907 {
909
910 cp.code() = std::string("//AMOMAXW\n");
911
912// -----------------------------------------------------------------------------
913cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
914// -----------------------------------------------------------------------------
915 }
916
917 return true;
918 },
919 0,
920 [] (BitArray & ba, Instruction & instr)
921 {
922// -----------------------------------------------------------------------------
923etiss_uint8 rd = 0;
924static BitArrayRange R_rd_0(11, 7);
925rd += R_rd_0.read(ba) << 0;
926etiss_uint8 rs1 = 0;
927static BitArrayRange R_rs1_0(19, 15);
928rs1 += R_rs1_0.read(ba) << 0;
929etiss_uint8 rs2 = 0;
930static BitArrayRange R_rs2_0(24, 20);
931rs2 += R_rs2_0.read(ba) << 0;
932etiss_uint8 rl = 0;
933static BitArrayRange R_rl_0(25, 25);
934rl += R_rl_0.read(ba) << 0;
935etiss_uint8 aq = 0;
936static BitArrayRange R_aq_0(26, 26);
937aq += R_aq_0.read(ba) << 0;
938
939// -----------------------------------------------------------------------------
940
941 std::stringstream ss;
942// -----------------------------------------------------------------------------
943ss << "amomaxw" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | rs2=" + std::to_string(rs2) + " | rl=" + std::to_string(rl) + " | aq=" + std::to_string(aq) + "]");
944// -----------------------------------------------------------------------------
945 return ss.str();
946 }
947);
948
949// AMOMINUW --------------------------------------------------------------------
952 "amominuw",
953 (uint32_t) 0xc000202f,
954 (uint32_t) 0xf800707f,
955 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
956 {
957
958// -----------------------------------------------------------------------------
959
960// -----------------------------------------------------------------------------
961
962// -----------------------------------------------------------------------------
963// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
964etiss_uint8 rd = 0;
965static BitArrayRange R_rd_0(11, 7);
966rd += R_rd_0.read(ba) << 0;
967etiss_uint8 rs1 = 0;
968static BitArrayRange R_rs1_0(19, 15);
969rs1 += R_rs1_0.read(ba) << 0;
970etiss_uint8 rs2 = 0;
971static BitArrayRange R_rs2_0(24, 20);
972rs2 += R_rs2_0.read(ba) << 0;
973etiss_uint8 rl = 0;
974static BitArrayRange R_rl_0(25, 25);
975rl += R_rl_0.read(ba) << 0;
976etiss_uint8 aq = 0;
977static BitArrayRange R_aq_0(26, 26);
978aq += R_aq_0.read(ba) << 0;
979
980// NOLINTEND(clang-diagnostic-unused-but-set-variable)
981// -----------------------------------------------------------------------------
982
983 {
985
986 cp.code() = std::string("//AMOMINUW\n");
987
988// -----------------------------------------------------------------------------
989cp.code() += "etiss_coverage_count(1, 179);\n";
990{ // block
991cp.code() += "etiss_coverage_count(1, 1169);\n";
992cp.code() += "{ // block\n";
993cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + 4) + "ULL;\n";
994cp.code() += "etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";
995cp.code() += "} // block\n";
996} // block
997{ // block
998cp.code() += "etiss_coverage_count(1, 6838);\n";
999cp.code() += "{ // block\n";
1000cp.code() += "etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL];\n";
1001cp.code() += "etiss_coverage_count(4, 6793, 6792, 6791, 6789);\n";
1002cp.code() += "etiss_uint32 mem_val_0;\n";
1003cp.code() += "cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";
1004cp.code() += "if (cpu->exception) { // conditional\n";
1005{ // procedure
1006cp.code() += "{ // procedure\n";
1007cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
1008cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
1009cp.code() += "} // procedure\n";
1010} // procedure
1011cp.code() += "} // conditional\n";
1012cp.code() += "etiss_uint32 res1 = mem_val_0;\n";
1013cp.code() += "etiss_coverage_count(3, 6798, 6797, 6796);\n";
1014cp.code() += "etiss_coverage_count(1, 6799);\n";
1015if ((rd % 32ULL) != 0LL) { // conditional
1016cp.code() += "etiss_coverage_count(5, 6805, 6802, 6800, 6803, 6804);\n";
1017cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = (etiss_int32)(res1);\n";
1018cp.code() += "etiss_coverage_count(6, 6814, 6810, 6809, 6807, 6813, 6811);\n";
1019} // conditional
1020cp.code() += "etiss_uint32 res2 = (res1 > (etiss_uint32)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL])) ? (*((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL]) : (res1);\n";
1021cp.code() += "etiss_coverage_count(12, 6832, 6831, 6824, 6816, 6823, 6821, 6820, 6818, 6829, 6828, 6826, 6830);\n";
1022cp.code() += "etiss_uint32 mem_val_1;\n";
1023cp.code() += "mem_val_1 = res2;\n";
1024cp.code() += "etiss_coverage_count(4, 6837, 6835, 6834, 6836);\n";
1025cp.code() += "cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_1, 4);\n";
1026cp.code() += "if (cpu->exception) { // conditional\n";
1027{ // procedure
1028cp.code() += "{ // procedure\n";
1029cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
1030cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
1031cp.code() += "} // procedure\n";
1032} // procedure
1033cp.code() += "} // conditional\n";
1034cp.code() += "} // block\n";
1035} // block
1036cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
1037cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
1038// -----------------------------------------------------------------------------
1039 cp.getAffectedRegisters().add("instructionPointer", 32);
1040 }
1041 {
1043
1044 cp.code() = std::string("//AMOMINUW\n");
1045
1046// -----------------------------------------------------------------------------
1047cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
1048// -----------------------------------------------------------------------------
1049 }
1050
1051 return true;
1052 },
1053 0,
1054 [] (BitArray & ba, Instruction & instr)
1055 {
1056// -----------------------------------------------------------------------------
1057etiss_uint8 rd = 0;
1058static BitArrayRange R_rd_0(11, 7);
1059rd += R_rd_0.read(ba) << 0;
1060etiss_uint8 rs1 = 0;
1061static BitArrayRange R_rs1_0(19, 15);
1062rs1 += R_rs1_0.read(ba) << 0;
1063etiss_uint8 rs2 = 0;
1064static BitArrayRange R_rs2_0(24, 20);
1065rs2 += R_rs2_0.read(ba) << 0;
1066etiss_uint8 rl = 0;
1067static BitArrayRange R_rl_0(25, 25);
1068rl += R_rl_0.read(ba) << 0;
1069etiss_uint8 aq = 0;
1070static BitArrayRange R_aq_0(26, 26);
1071aq += R_aq_0.read(ba) << 0;
1072
1073// -----------------------------------------------------------------------------
1074
1075 std::stringstream ss;
1076// -----------------------------------------------------------------------------
1077ss << "amominuw" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | rs2=" + std::to_string(rs2) + " | rl=" + std::to_string(rl) + " | aq=" + std::to_string(aq) + "]");
1078// -----------------------------------------------------------------------------
1079 return ss.str();
1080 }
1081);
1082
1083// AMOMAXUW --------------------------------------------------------------------
1086 "amomaxuw",
1087 (uint32_t) 0xe000202f,
1088 (uint32_t) 0xf800707f,
1089 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
1090 {
1091
1092// -----------------------------------------------------------------------------
1093
1094// -----------------------------------------------------------------------------
1095
1096// -----------------------------------------------------------------------------
1097// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
1098etiss_uint8 rd = 0;
1099static BitArrayRange R_rd_0(11, 7);
1100rd += R_rd_0.read(ba) << 0;
1101etiss_uint8 rs1 = 0;
1102static BitArrayRange R_rs1_0(19, 15);
1103rs1 += R_rs1_0.read(ba) << 0;
1104etiss_uint8 rs2 = 0;
1105static BitArrayRange R_rs2_0(24, 20);
1106rs2 += R_rs2_0.read(ba) << 0;
1107etiss_uint8 rl = 0;
1108static BitArrayRange R_rl_0(25, 25);
1109rl += R_rl_0.read(ba) << 0;
1110etiss_uint8 aq = 0;
1111static BitArrayRange R_aq_0(26, 26);
1112aq += R_aq_0.read(ba) << 0;
1113
1114// NOLINTEND(clang-diagnostic-unused-but-set-variable)
1115// -----------------------------------------------------------------------------
1116
1117 {
1119
1120 cp.code() = std::string("//AMOMAXUW\n");
1121
1122// -----------------------------------------------------------------------------
1123cp.code() += "etiss_coverage_count(1, 180);\n";
1124{ // block
1125cp.code() += "etiss_coverage_count(1, 1169);\n";
1126cp.code() += "{ // block\n";
1127cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + 4) + "ULL;\n";
1128cp.code() += "etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";
1129cp.code() += "} // block\n";
1130} // block
1131{ // block
1132cp.code() += "etiss_coverage_count(1, 6890);\n";
1133cp.code() += "{ // block\n";
1134cp.code() += "etiss_uint64 offs = *((RV64IMACFD*)cpu)->X[" + std::to_string(rs1 % 32ULL) + "ULL];\n";
1135cp.code() += "etiss_coverage_count(4, 6845, 6844, 6843, 6841);\n";
1136cp.code() += "etiss_uint32 mem_val_0;\n";
1137cp.code() += "cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";
1138cp.code() += "if (cpu->exception) { // conditional\n";
1139{ // procedure
1140cp.code() += "{ // procedure\n";
1141cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
1142cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
1143cp.code() += "} // procedure\n";
1144} // procedure
1145cp.code() += "} // conditional\n";
1146cp.code() += "etiss_uint32 res1 = mem_val_0;\n";
1147cp.code() += "etiss_coverage_count(3, 6850, 6849, 6848);\n";
1148cp.code() += "etiss_coverage_count(1, 6851);\n";
1149if ((rd % 32ULL) != 0LL) { // conditional
1150cp.code() += "etiss_coverage_count(5, 6857, 6854, 6852, 6855, 6856);\n";
1151cp.code() += "*((RV64IMACFD*)cpu)->X[" + std::to_string(rd % 32ULL) + "ULL] = (etiss_int32)(res1);\n";
1152cp.code() += "etiss_coverage_count(6, 6866, 6862, 6861, 6859, 6865, 6863);\n";
1153} // conditional
1154cp.code() += "etiss_uint32 res2 = (res1 < (etiss_uint32)(*((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL])) ? (*((RV64IMACFD*)cpu)->X[" + std::to_string(rs2 % 32ULL) + "ULL]) : (res1);\n";
1155cp.code() += "etiss_coverage_count(12, 6884, 6883, 6876, 6868, 6875, 6873, 6872, 6870, 6881, 6880, 6878, 6882);\n";
1156cp.code() += "etiss_uint32 mem_val_1;\n";
1157cp.code() += "mem_val_1 = res2;\n";
1158cp.code() += "etiss_coverage_count(4, 6889, 6887, 6886, 6888);\n";
1159cp.code() += "cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_1, 4);\n";
1160cp.code() += "if (cpu->exception) { // conditional\n";
1161{ // procedure
1162cp.code() += "{ // procedure\n";
1163cp.code() += "RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
1164cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
1165cp.code() += "} // procedure\n";
1166} // procedure
1167cp.code() += "} // conditional\n";
1168cp.code() += "} // block\n";
1169} // block
1170cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
1171cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
1172// -----------------------------------------------------------------------------
1173 cp.getAffectedRegisters().add("instructionPointer", 32);
1174 }
1175 {
1177
1178 cp.code() = std::string("//AMOMAXUW\n");
1179
1180// -----------------------------------------------------------------------------
1181cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
1182// -----------------------------------------------------------------------------
1183 }
1184
1185 return true;
1186 },
1187 0,
1188 [] (BitArray & ba, Instruction & instr)
1189 {
1190// -----------------------------------------------------------------------------
1191etiss_uint8 rd = 0;
1192static BitArrayRange R_rd_0(11, 7);
1193rd += R_rd_0.read(ba) << 0;
1194etiss_uint8 rs1 = 0;
1195static BitArrayRange R_rs1_0(19, 15);
1196rs1 += R_rs1_0.read(ba) << 0;
1197etiss_uint8 rs2 = 0;
1198static BitArrayRange R_rs2_0(24, 20);
1199rs2 += R_rs2_0.read(ba) << 0;
1200etiss_uint8 rl = 0;
1201static BitArrayRange R_rl_0(25, 25);
1202rl += R_rl_0.read(ba) << 0;
1203etiss_uint8 aq = 0;
1204static BitArrayRange R_aq_0(26, 26);
1205aq += R_aq_0.read(ba) << 0;
1206
1207// -----------------------------------------------------------------------------
1208
1209 std::stringstream ss;
1210// -----------------------------------------------------------------------------
1211ss << "amomaxuw" << " # " << ba << (" [rd=" + std::to_string(rd) + " | rs1=" + std::to_string(rs1) + " | rs2=" + std::to_string(rs2) + " | rl=" + std::to_string(rl) + " | aq=" + std::to_string(aq) + "]");
1212// -----------------------------------------------------------------------------
1213 return ss.str();
1214 }
1215);
1216// clang-format on
etiss::instr::InstructionGroup ISA32_RV64IMACFD("ISA32_RV64IMACFD", 32)
static InstructionDefinition amominw_rd_rs1_rs2_rl_aq(ISA32_RV64IMACFD, "amominw",(uint32_t) 0x8000202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rl=0;static BitArrayRange R_rl_0(25, 25);rl+=R_rl_0.read(ba)<< 0;etiss_uint8 aq=0;static BitArrayRange R_aq_0(26, 26);aq+=R_aq_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//AMOMINW\n");cp.code()+="etiss_coverage_count(1, 177);\n";{ cp.code()+="etiss_coverage_count(1, 1169);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6736);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(4, 6693, 6692, 6691, 6689);\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int32 res1 = mem_val_0;\n";cp.code()+="etiss_coverage_count(3, 6698, 6697, 6696);\n";cp.code()+="etiss_coverage_count(1, 6699);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 6705, 6702, 6700, 6703, 6704);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = res1;\n";cp.code()+="etiss_coverage_count(5, 6712, 6710, 6709, 6707, 6711);\n";} cp.code()+="etiss_uint32 res2 = (res1 > (etiss_int32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) ? (*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) : (res1);\n";cp.code()+="etiss_coverage_count(12, 6730, 6729, 6722, 6714, 6721, 6719, 6718, 6716, 6727, 6726, 6724, 6728);\n";cp.code()+="etiss_uint32 mem_val_1;\n";cp.code()+="mem_val_1 = res2;\n";cp.code()+="etiss_coverage_count(4, 6735, 6733, 6732, 6734);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_1, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//AMOMINW\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rl=0;static BitArrayRange R_rl_0(25, 25);rl+=R_rl_0.read(ba)<< 0;etiss_uint8 aq=0;static BitArrayRange R_aq_0(26, 26);aq+=R_aq_0.read(ba)<< 0;std::stringstream ss;ss<< "amominw"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+" | rl="+std::to_string(rl)+" | aq="+std::to_string(aq)+"]");return ss.str();})
static InstructionDefinition amomaxw_rd_rs1_rs2_rl_aq(ISA32_RV64IMACFD, "amomaxw",(uint32_t) 0xa000202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rl=0;static BitArrayRange R_rl_0(25, 25);rl+=R_rl_0.read(ba)<< 0;etiss_uint8 aq=0;static BitArrayRange R_aq_0(26, 26);aq+=R_aq_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//AMOMAXW\n");cp.code()+="etiss_coverage_count(1, 178);\n";{ cp.code()+="etiss_coverage_count(1, 1169);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6786);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(4, 6743, 6742, 6741, 6739);\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int32 res1 = mem_val_0;\n";cp.code()+="etiss_coverage_count(3, 6748, 6747, 6746);\n";cp.code()+="etiss_coverage_count(1, 6749);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 6755, 6752, 6750, 6753, 6754);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = res1;\n";cp.code()+="etiss_coverage_count(5, 6762, 6760, 6759, 6757, 6761);\n";} cp.code()+="etiss_uint32 res2 = (res1 < (etiss_int32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) ? (*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) : (res1);\n";cp.code()+="etiss_coverage_count(12, 6780, 6779, 6772, 6764, 6771, 6769, 6768, 6766, 6777, 6776, 6774, 6778);\n";cp.code()+="etiss_uint32 mem_val_1;\n";cp.code()+="mem_val_1 = res2;\n";cp.code()+="etiss_coverage_count(4, 6785, 6783, 6782, 6784);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_1, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//AMOMAXW\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rl=0;static BitArrayRange R_rl_0(25, 25);rl+=R_rl_0.read(ba)<< 0;etiss_uint8 aq=0;static BitArrayRange R_aq_0(26, 26);aq+=R_aq_0.read(ba)<< 0;std::stringstream ss;ss<< "amomaxw"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+" | rl="+std::to_string(rl)+" | aq="+std::to_string(aq)+"]");return ss.str();})
static InstructionDefinition amominuw_rd_rs1_rs2_rl_aq(ISA32_RV64IMACFD, "amominuw",(uint32_t) 0xc000202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rl=0;static BitArrayRange R_rl_0(25, 25);rl+=R_rl_0.read(ba)<< 0;etiss_uint8 aq=0;static BitArrayRange R_aq_0(26, 26);aq+=R_aq_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//AMOMINUW\n");cp.code()+="etiss_coverage_count(1, 179);\n";{ cp.code()+="etiss_coverage_count(1, 1169);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6838);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(4, 6793, 6792, 6791, 6789);\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_uint32 res1 = mem_val_0;\n";cp.code()+="etiss_coverage_count(3, 6798, 6797, 6796);\n";cp.code()+="etiss_coverage_count(1, 6799);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 6805, 6802, 6800, 6803, 6804);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_int32)(res1);\n";cp.code()+="etiss_coverage_count(6, 6814, 6810, 6809, 6807, 6813, 6811);\n";} cp.code()+="etiss_uint32 res2 = (res1 > (etiss_uint32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) ? (*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) : (res1);\n";cp.code()+="etiss_coverage_count(12, 6832, 6831, 6824, 6816, 6823, 6821, 6820, 6818, 6829, 6828, 6826, 6830);\n";cp.code()+="etiss_uint32 mem_val_1;\n";cp.code()+="mem_val_1 = res2;\n";cp.code()+="etiss_coverage_count(4, 6837, 6835, 6834, 6836);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_1, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//AMOMINUW\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rl=0;static BitArrayRange R_rl_0(25, 25);rl+=R_rl_0.read(ba)<< 0;etiss_uint8 aq=0;static BitArrayRange R_aq_0(26, 26);aq+=R_aq_0.read(ba)<< 0;std::stringstream ss;ss<< "amominuw"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+" | rl="+std::to_string(rl)+" | aq="+std::to_string(aq)+"]");return ss.str();})
static InstructionDefinition amoswapw_rd_rs1_rs2_rl_aq(ISA32_RV64IMACFD, "amoswapw",(uint32_t) 0x800202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rl=0;static BitArrayRange R_rl_0(25, 25);rl+=R_rl_0.read(ba)<< 0;etiss_uint8 aq=0;static BitArrayRange R_aq_0(26, 26);aq+=R_aq_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//AMOSWAPW\n");cp.code()+="etiss_coverage_count(1, 172);\n";{ cp.code()+="etiss_coverage_count(1, 1169);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6522);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(4, 6489, 6488, 6487, 6485);\n";cp.code()+="etiss_coverage_count(1, 6490);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 6496, 6493, 6491, 6494, 6495);\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_int64)(((etiss_int32)(mem_val_0)));\n";cp.code()+="etiss_coverage_count(9, 6510, 6501, 6500, 6498, 6509, 6506, 6504, 6503, 6507);\n";} cp.code()+="etiss_uint32 mem_val_1;\n";cp.code()+="mem_val_1 = (etiss_int32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(7, 6521, 6513, 6512, 6520, 6518, 6517, 6515);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_1, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//AMOSWAPW\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rl=0;static BitArrayRange R_rl_0(25, 25);rl+=R_rl_0.read(ba)<< 0;etiss_uint8 aq=0;static BitArrayRange R_aq_0(26, 26);aq+=R_aq_0.read(ba)<< 0;std::stringstream ss;ss<< "amoswapw"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+" | rl="+std::to_string(rl)+" | aq="+std::to_string(aq)+"]");return ss.str();})
static InstructionDefinition amoorw_rd_rs1_rs2_rl_aq(ISA32_RV64IMACFD, "amoorw",(uint32_t) 0x4000202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rl=0;static BitArrayRange R_rl_0(25, 25);rl+=R_rl_0.read(ba)<< 0;etiss_uint8 aq=0;static BitArrayRange R_aq_0(26, 26);aq+=R_aq_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//AMOORW\n");cp.code()+="etiss_coverage_count(1, 176);\n";{ cp.code()+="etiss_coverage_count(1, 1169);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6686);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(4, 6652, 6651, 6650, 6648);\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int32 res1 = mem_val_0;\n";cp.code()+="etiss_coverage_count(3, 6657, 6656, 6655);\n";cp.code()+="etiss_coverage_count(1, 6658);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 6664, 6661, 6659, 6662, 6663);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = res1;\n";cp.code()+="etiss_coverage_count(5, 6671, 6669, 6668, 6666, 6670);\n";} cp.code()+="etiss_uint32 res2 = res1 | *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(6, 6680, 6679, 6673, 6678, 6677, 6675);\n";cp.code()+="etiss_uint32 mem_val_1;\n";cp.code()+="mem_val_1 = res2;\n";cp.code()+="etiss_coverage_count(4, 6685, 6683, 6682, 6684);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_1, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//AMOORW\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rl=0;static BitArrayRange R_rl_0(25, 25);rl+=R_rl_0.read(ba)<< 0;etiss_uint8 aq=0;static BitArrayRange R_aq_0(26, 26);aq+=R_aq_0.read(ba)<< 0;std::stringstream ss;ss<< "amoorw"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+" | rl="+std::to_string(rl)+" | aq="+std::to_string(aq)+"]");return ss.str();})
static InstructionDefinition amomaxuw_rd_rs1_rs2_rl_aq(ISA32_RV64IMACFD, "amomaxuw",(uint32_t) 0xe000202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rl=0;static BitArrayRange R_rl_0(25, 25);rl+=R_rl_0.read(ba)<< 0;etiss_uint8 aq=0;static BitArrayRange R_aq_0(26, 26);aq+=R_aq_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//AMOMAXUW\n");cp.code()+="etiss_coverage_count(1, 180);\n";{ cp.code()+="etiss_coverage_count(1, 1169);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6890);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(4, 6845, 6844, 6843, 6841);\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_uint32 res1 = mem_val_0;\n";cp.code()+="etiss_coverage_count(3, 6850, 6849, 6848);\n";cp.code()+="etiss_coverage_count(1, 6851);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 6857, 6854, 6852, 6855, 6856);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = (etiss_int32)(res1);\n";cp.code()+="etiss_coverage_count(6, 6866, 6862, 6861, 6859, 6865, 6863);\n";} cp.code()+="etiss_uint32 res2 = (res1 < (etiss_uint32)(*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL])) ? (*((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL]) : (res1);\n";cp.code()+="etiss_coverage_count(12, 6884, 6883, 6876, 6868, 6875, 6873, 6872, 6870, 6881, 6880, 6878, 6882);\n";cp.code()+="etiss_uint32 mem_val_1;\n";cp.code()+="mem_val_1 = res2;\n";cp.code()+="etiss_coverage_count(4, 6889, 6887, 6886, 6888);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_1, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//AMOMAXUW\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rl=0;static BitArrayRange R_rl_0(25, 25);rl+=R_rl_0.read(ba)<< 0;etiss_uint8 aq=0;static BitArrayRange R_aq_0(26, 26);aq+=R_aq_0.read(ba)<< 0;std::stringstream ss;ss<< "amomaxuw"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+" | rl="+std::to_string(rl)+" | aq="+std::to_string(aq)+"]");return ss.str();})
static InstructionDefinition amoandw_rd_rs1_rs2_rl_aq(ISA32_RV64IMACFD, "amoandw",(uint32_t) 0x6000202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rl=0;static BitArrayRange R_rl_0(25, 25);rl+=R_rl_0.read(ba)<< 0;etiss_uint8 aq=0;static BitArrayRange R_aq_0(26, 26);aq+=R_aq_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//AMOANDW\n");cp.code()+="etiss_coverage_count(1, 175);\n";{ cp.code()+="etiss_coverage_count(1, 1169);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6645);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(4, 6611, 6610, 6609, 6607);\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int32 res1 = mem_val_0;\n";cp.code()+="etiss_coverage_count(3, 6616, 6615, 6614);\n";cp.code()+="etiss_coverage_count(1, 6617);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 6623, 6620, 6618, 6621, 6622);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = res1;\n";cp.code()+="etiss_coverage_count(5, 6630, 6628, 6627, 6625, 6629);\n";} cp.code()+="etiss_uint32 res2 = res1 & *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(6, 6639, 6638, 6632, 6637, 6636, 6634);\n";cp.code()+="etiss_uint32 mem_val_1;\n";cp.code()+="mem_val_1 = res2;\n";cp.code()+="etiss_coverage_count(4, 6644, 6642, 6641, 6643);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_1, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//AMOANDW\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rl=0;static BitArrayRange R_rl_0(25, 25);rl+=R_rl_0.read(ba)<< 0;etiss_uint8 aq=0;static BitArrayRange R_aq_0(26, 26);aq+=R_aq_0.read(ba)<< 0;std::stringstream ss;ss<< "amoandw"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+" | rl="+std::to_string(rl)+" | aq="+std::to_string(aq)+"]");return ss.str();})
static InstructionDefinition amoaddw_rd_rs1_rs2_rl_aq(ISA32_RV64IMACFD, "amoaddw",(uint32_t) 0x00202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rl=0;static BitArrayRange R_rl_0(25, 25);rl+=R_rl_0.read(ba)<< 0;etiss_uint8 aq=0;static BitArrayRange R_aq_0(26, 26);aq+=R_aq_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//AMOADDW\n");cp.code()+="etiss_coverage_count(1, 173);\n";{ cp.code()+="etiss_coverage_count(1, 1169);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6563);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(4, 6529, 6528, 6527, 6525);\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int32 res1 = mem_val_0;\n";cp.code()+="etiss_coverage_count(3, 6534, 6533, 6532);\n";cp.code()+="etiss_coverage_count(1, 6535);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 6541, 6538, 6536, 6539, 6540);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = res1;\n";cp.code()+="etiss_coverage_count(5, 6548, 6546, 6545, 6543, 6547);\n";} cp.code()+="etiss_uint32 res2 = res1 + *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(6, 6557, 6556, 6550, 6555, 6554, 6552);\n";cp.code()+="etiss_uint32 mem_val_1;\n";cp.code()+="mem_val_1 = res2;\n";cp.code()+="etiss_coverage_count(4, 6562, 6560, 6559, 6561);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_1, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//AMOADDW\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rl=0;static BitArrayRange R_rl_0(25, 25);rl+=R_rl_0.read(ba)<< 0;etiss_uint8 aq=0;static BitArrayRange R_aq_0(26, 26);aq+=R_aq_0.read(ba)<< 0;std::stringstream ss;ss<< "amoaddw"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+" | rl="+std::to_string(rl)+" | aq="+std::to_string(aq)+"]");return ss.str();})
static InstructionDefinition amoxorw_rd_rs1_rs2_rl_aq(ISA32_RV64IMACFD, "amoxorw",(uint32_t) 0x2000202f,(uint32_t) 0xf800707f, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rl=0;static BitArrayRange R_rl_0(25, 25);rl+=R_rl_0.read(ba)<< 0;etiss_uint8 aq=0;static BitArrayRange R_aq_0(26, 26);aq+=R_aq_0.read(ba)<< 0;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//AMOXORW\n");cp.code()+="etiss_coverage_count(1, 174);\n";{ cp.code()+="etiss_coverage_count(1, 1169);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+4)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6604);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint64 offs = *((RV64IMACFD*)cpu)->X["+std::to_string(rs1 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(4, 6570, 6569, 6568, 6566);\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_int32 res1 = mem_val_0;\n";cp.code()+="etiss_coverage_count(3, 6575, 6574, 6573);\n";cp.code()+="etiss_coverage_count(1, 6576);\n";if((rd % 32ULL) !=0LL) { cp.code()+="etiss_coverage_count(5, 6582, 6579, 6577, 6580, 6581);\n";cp.code()+="*((RV64IMACFD*)cpu)->X["+std::to_string(rd % 32ULL)+"ULL] = res1;\n";cp.code()+="etiss_coverage_count(5, 6589, 6587, 6586, 6584, 6588);\n";} cp.code()+="etiss_uint32 res2 = res1 ^ *((RV64IMACFD*)cpu)->X["+std::to_string(rs2 % 32ULL)+"ULL];\n";cp.code()+="etiss_coverage_count(6, 6598, 6597, 6591, 6596, 6595, 6593);\n";cp.code()+="etiss_uint32 mem_val_1;\n";cp.code()+="mem_val_1 = res2;\n";cp.code()+="etiss_coverage_count(4, 6603, 6601, 6600, 6602);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_1, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV64IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//AMOXORW\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(19, 15);rs1+=R_rs1_0.read(ba)<< 0;etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(24, 20);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 rl=0;static BitArrayRange R_rl_0(25, 25);rl+=R_rl_0.read(ba)<< 0;etiss_uint8 aq=0;static BitArrayRange R_aq_0(26, 26);aq+=R_aq_0.read(ba)<< 0;std::stringstream ss;ss<< "amoxorw"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | rs1="+std::to_string(rs1)+" | rs2="+std::to_string(rs2)+" | rl="+std::to_string(rl)+" | aq="+std::to_string(aq)+"]");return ss.str();})
uint8_t etiss_uint8
Definition types.h:49
Contains a small code snipped.
Definition CodePart.h:348
@ APPENDEDRETURNINGREQUIRED
Definition CodePart.h:364
std::string & code()
Definition CodePart.h:378
RegisterSet & getAffectedRegisters()
Definition CodePart.h:376
A set of CodeParts.
Definition CodePart.h:399
void append(const CodePart &part, CodePart::TYPE type)
Definition CodePart.h:412
void add(const RegisterPart &rp)
add a registerPart to the set or just its relevant bits if a register with the same name is already p...
Definition CodePart.h:184
Reading through it will only return bits within the range.
I read(const BitArray &ba)
reads bits from the range to the return value starting at the lsb.
stores a bit vector
this class contains parameters that persist in between instruction lookpus/translation within a trans...
uint64_t current_address_
start address of current instruction
holds information and translation callbacks for an instruction.
forwards: include/jit/*
Definition Benchmark.h:17