ETISS 0.8.0
Extendable Translating Instruction Set Simulator (version 0.8.0)
RV32IMACFD_RV32FCInstr.cpp
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1 
8 #include "RV32IMACFDArch.h"
9 #include "RV32IMACFDFuncs.h"
10 
11 using namespace etiss;
12 using namespace etiss::instr;
13 
14 
15 // CFLW ------------------------------------------------------------------------
16 static InstructionDefinition cflw_rd_uimm_rs1 (
17  ISA16_RV32IMACFD,
18  "cflw",
19  (uint16_t) 0x6000,
20  (uint16_t) 0xe003,
21  [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
22  {
23 
24 // -----------------------------------------------------------------------------
25 
26 // -----------------------------------------------------------------------------
27 
28 // -----------------------------------------------------------------------------
29 etiss_uint8 rd = 0;
30 static BitArrayRange R_rd_0(4, 2);
31 rd += R_rd_0.read(ba) << 0;
32 etiss_uint8 uimm = 0;
33 static BitArrayRange R_uimm_6(5, 5);
34 uimm += R_uimm_6.read(ba) << 6;
35 static BitArrayRange R_uimm_2(6, 6);
36 uimm += R_uimm_2.read(ba) << 2;
37 etiss_uint8 rs1 = 0;
38 static BitArrayRange R_rs1_0(9, 7);
39 rs1 += R_rs1_0.read(ba) << 0;
40 static BitArrayRange R_uimm_3(12, 10);
41 uimm += R_uimm_3.read(ba) << 3;
42 
43 // -----------------------------------------------------------------------------
44 
45  {
46  CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
47 
48  cp.code() = std::string("//CFLW\n");
49 
50 // -----------------------------------------------------------------------------
51 { // block
52 cp.code() += "{ // block\n";
53 cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + 2) + "ULL;\n";
54 cp.code() += "} // block\n";
55 } // block
56 { // block
57 cp.code() += "{ // block\n";
58 cp.code() += "etiss_uint32 offs = *((RV32IMACFD*)cpu)->X[" + std::to_string(rs1 + 8ULL) + "ULL] + " + std::to_string(uimm) + "ULL;\n";
59 cp.code() += "etiss_uint32 mem_val_0;\n";
60 cp.code() += "cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";
61 cp.code() += "if (cpu->exception) { // conditional\n";
62 { // procedure
63 cp.code() += "{ // procedure\n";
64 cp.code() += "RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
65 cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
66 cp.code() += "} // procedure\n";
67 } // procedure
68 cp.code() += "} // conditional\n";
69 cp.code() += "etiss_uint32 res = (etiss_uint32)(mem_val_0);\n";
70 { // block
71 cp.code() += "{ // block\n";
72 cp.code() += "((RV32IMACFD*)cpu)->F[" + std::to_string(rd + 8ULL) + "ULL] = -4294967296LL | res;\n";
73 cp.code() += "} // block\n";
74 } // block
75 cp.code() += "} // block\n";
76 } // block
77 cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
78 cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
79 // -----------------------------------------------------------------------------
80  cp.getAffectedRegisters().add("instructionPointer", 32);
81  }
82  {
83  CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
84 
85  cp.code() = std::string("//CFLW\n");
86 
87 // -----------------------------------------------------------------------------
88 cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
89 // -----------------------------------------------------------------------------
90  }
91 
92  return true;
93  },
94  0,
95  [] (BitArray & ba, Instruction & instr)
96  {
97 // -----------------------------------------------------------------------------
98 etiss_uint8 rd = 0;
99 static BitArrayRange R_rd_0(4, 2);
100 rd += R_rd_0.read(ba) << 0;
101 etiss_uint8 uimm = 0;
102 static BitArrayRange R_uimm_6(5, 5);
103 uimm += R_uimm_6.read(ba) << 6;
104 static BitArrayRange R_uimm_2(6, 6);
105 uimm += R_uimm_2.read(ba) << 2;
106 etiss_uint8 rs1 = 0;
107 static BitArrayRange R_rs1_0(9, 7);
108 rs1 += R_rs1_0.read(ba) << 0;
109 static BitArrayRange R_uimm_3(12, 10);
110 uimm += R_uimm_3.read(ba) << 3;
111 
112 // -----------------------------------------------------------------------------
113 
114  std::stringstream ss;
115 // -----------------------------------------------------------------------------
116 ss << "cflw" << " # " << ba << (" [rd=" + std::to_string(rd) + " | uimm=" + std::to_string(uimm) + " | rs1=" + std::to_string(rs1) + "]");
117 // -----------------------------------------------------------------------------
118  return ss.str();
119  }
120 );
121 
122 // CFSW ------------------------------------------------------------------------
123 static InstructionDefinition cfsw_rs2_uimm_rs1 (
124  ISA16_RV32IMACFD,
125  "cfsw",
126  (uint16_t) 0xe000,
127  (uint16_t) 0xe003,
128  [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
129  {
130 
131 // -----------------------------------------------------------------------------
132 
133 // -----------------------------------------------------------------------------
134 
135 // -----------------------------------------------------------------------------
136 etiss_uint8 rs2 = 0;
137 static BitArrayRange R_rs2_0(4, 2);
138 rs2 += R_rs2_0.read(ba) << 0;
139 etiss_uint8 uimm = 0;
140 static BitArrayRange R_uimm_6(5, 5);
141 uimm += R_uimm_6.read(ba) << 6;
142 static BitArrayRange R_uimm_2(6, 6);
143 uimm += R_uimm_2.read(ba) << 2;
144 etiss_uint8 rs1 = 0;
145 static BitArrayRange R_rs1_0(9, 7);
146 rs1 += R_rs1_0.read(ba) << 0;
147 static BitArrayRange R_uimm_3(12, 10);
148 uimm += R_uimm_3.read(ba) << 3;
149 
150 // -----------------------------------------------------------------------------
151 
152  {
153  CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
154 
155  cp.code() = std::string("//CFSW\n");
156 
157 // -----------------------------------------------------------------------------
158 { // block
159 cp.code() += "{ // block\n";
160 cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + 2) + "ULL;\n";
161 cp.code() += "} // block\n";
162 } // block
163 { // block
164 cp.code() += "{ // block\n";
165 cp.code() += "etiss_uint32 offs = *((RV32IMACFD*)cpu)->X[" + std::to_string(rs1 + 8ULL) + "ULL] + " + std::to_string(uimm) + "ULL;\n";
166 cp.code() += "etiss_uint32 mem_val_0;\n";
167 cp.code() += "mem_val_0 = (etiss_uint32)(((RV32IMACFD*)cpu)->F[" + std::to_string(rs2 + 8ULL) + "ULL]);\n";
168 cp.code() += "cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";
169 cp.code() += "if (cpu->exception) { // conditional\n";
170 { // procedure
171 cp.code() += "{ // procedure\n";
172 cp.code() += "RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
173 cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
174 cp.code() += "} // procedure\n";
175 } // procedure
176 cp.code() += "} // conditional\n";
177 cp.code() += "} // block\n";
178 } // block
179 cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
180 cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
181 // -----------------------------------------------------------------------------
182  cp.getAffectedRegisters().add("instructionPointer", 32);
183  }
184  {
185  CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
186 
187  cp.code() = std::string("//CFSW\n");
188 
189 // -----------------------------------------------------------------------------
190 cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
191 // -----------------------------------------------------------------------------
192  }
193 
194  return true;
195  },
196  0,
197  [] (BitArray & ba, Instruction & instr)
198  {
199 // -----------------------------------------------------------------------------
200 etiss_uint8 rs2 = 0;
201 static BitArrayRange R_rs2_0(4, 2);
202 rs2 += R_rs2_0.read(ba) << 0;
203 etiss_uint8 uimm = 0;
204 static BitArrayRange R_uimm_6(5, 5);
205 uimm += R_uimm_6.read(ba) << 6;
206 static BitArrayRange R_uimm_2(6, 6);
207 uimm += R_uimm_2.read(ba) << 2;
208 etiss_uint8 rs1 = 0;
209 static BitArrayRange R_rs1_0(9, 7);
210 rs1 += R_rs1_0.read(ba) << 0;
211 static BitArrayRange R_uimm_3(12, 10);
212 uimm += R_uimm_3.read(ba) << 3;
213 
214 // -----------------------------------------------------------------------------
215 
216  std::stringstream ss;
217 // -----------------------------------------------------------------------------
218 ss << "cfsw" << " # " << ba << (" [rs2=" + std::to_string(rs2) + " | uimm=" + std::to_string(uimm) + " | rs1=" + std::to_string(rs1) + "]");
219 // -----------------------------------------------------------------------------
220  return ss.str();
221  }
222 );
223 
224 // CFLWSP ----------------------------------------------------------------------
225 static InstructionDefinition cflwsp_uimm_rd (
226  ISA16_RV32IMACFD,
227  "cflwsp",
228  (uint16_t) 0x6002,
229  (uint16_t) 0xe003,
230  [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
231  {
232 
233 // -----------------------------------------------------------------------------
234 
235 // -----------------------------------------------------------------------------
236 
237 // -----------------------------------------------------------------------------
238 etiss_uint8 uimm = 0;
239 static BitArrayRange R_uimm_6(3, 2);
240 uimm += R_uimm_6.read(ba) << 6;
241 static BitArrayRange R_uimm_2(6, 4);
242 uimm += R_uimm_2.read(ba) << 2;
243 etiss_uint8 rd = 0;
244 static BitArrayRange R_rd_0(11, 7);
245 rd += R_rd_0.read(ba) << 0;
246 static BitArrayRange R_uimm_5(12, 12);
247 uimm += R_uimm_5.read(ba) << 5;
248 
249 // -----------------------------------------------------------------------------
250 
251  {
252  CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
253 
254  cp.code() = std::string("//CFLWSP\n");
255 
256 // -----------------------------------------------------------------------------
257 { // block
258 cp.code() += "{ // block\n";
259 cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + 2) + "ULL;\n";
260 cp.code() += "} // block\n";
261 } // block
262 { // block
263 cp.code() += "{ // block\n";
264 cp.code() += "etiss_uint32 offs = *((RV32IMACFD*)cpu)->X[2ULL] + " + std::to_string(uimm) + "ULL;\n";
265 cp.code() += "etiss_uint32 mem_val_0;\n";
266 cp.code() += "cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";
267 cp.code() += "if (cpu->exception) { // conditional\n";
268 { // procedure
269 cp.code() += "{ // procedure\n";
270 cp.code() += "RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
271 cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
272 cp.code() += "} // procedure\n";
273 } // procedure
274 cp.code() += "} // conditional\n";
275 cp.code() += "etiss_uint32 res = (etiss_uint32)(mem_val_0);\n";
276 { // block
277 cp.code() += "{ // block\n";
278 cp.code() += "((RV32IMACFD*)cpu)->F[" + std::to_string(rd) + "ULL] = -4294967296LL | res;\n";
279 cp.code() += "} // block\n";
280 } // block
281 cp.code() += "} // block\n";
282 } // block
283 cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
284 cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
285 // -----------------------------------------------------------------------------
286  cp.getAffectedRegisters().add("instructionPointer", 32);
287  }
288  {
289  CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
290 
291  cp.code() = std::string("//CFLWSP\n");
292 
293 // -----------------------------------------------------------------------------
294 cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
295 // -----------------------------------------------------------------------------
296  }
297 
298  return true;
299  },
300  0,
301  [] (BitArray & ba, Instruction & instr)
302  {
303 // -----------------------------------------------------------------------------
304 etiss_uint8 uimm = 0;
305 static BitArrayRange R_uimm_6(3, 2);
306 uimm += R_uimm_6.read(ba) << 6;
307 static BitArrayRange R_uimm_2(6, 4);
308 uimm += R_uimm_2.read(ba) << 2;
309 etiss_uint8 rd = 0;
310 static BitArrayRange R_rd_0(11, 7);
311 rd += R_rd_0.read(ba) << 0;
312 static BitArrayRange R_uimm_5(12, 12);
313 uimm += R_uimm_5.read(ba) << 5;
314 
315 // -----------------------------------------------------------------------------
316 
317  std::stringstream ss;
318 // -----------------------------------------------------------------------------
319 ss << "cflwsp" << " # " << ba << (" [uimm=" + std::to_string(uimm) + " | rd=" + std::to_string(rd) + "]");
320 // -----------------------------------------------------------------------------
321  return ss.str();
322  }
323 );
324 
325 // CFSWSP ----------------------------------------------------------------------
326 static InstructionDefinition cfswsp_rs2_uimm (
327  ISA16_RV32IMACFD,
328  "cfswsp",
329  (uint16_t) 0xe002,
330  (uint16_t) 0xe003,
331  [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
332  {
333 
334 // -----------------------------------------------------------------------------
335 
336 // -----------------------------------------------------------------------------
337 
338 // -----------------------------------------------------------------------------
339 etiss_uint8 rs2 = 0;
340 static BitArrayRange R_rs2_0(6, 2);
341 rs2 += R_rs2_0.read(ba) << 0;
342 etiss_uint8 uimm = 0;
343 static BitArrayRange R_uimm_6(8, 7);
344 uimm += R_uimm_6.read(ba) << 6;
345 static BitArrayRange R_uimm_2(12, 9);
346 uimm += R_uimm_2.read(ba) << 2;
347 
348 // -----------------------------------------------------------------------------
349 
350  {
351  CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
352 
353  cp.code() = std::string("//CFSWSP\n");
354 
355 // -----------------------------------------------------------------------------
356 { // block
357 cp.code() += "{ // block\n";
358 cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + 2) + "ULL;\n";
359 cp.code() += "} // block\n";
360 } // block
361 { // block
362 cp.code() += "{ // block\n";
363 cp.code() += "etiss_uint32 offs = *((RV32IMACFD*)cpu)->X[2ULL] + " + std::to_string(uimm) + "ULL;\n";
364 cp.code() += "etiss_uint32 mem_val_0;\n";
365 cp.code() += "mem_val_0 = (etiss_uint32)(((RV32IMACFD*)cpu)->F[" + std::to_string(rs2) + "ULL]);\n";
366 cp.code() += "cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";
367 cp.code() += "if (cpu->exception) { // conditional\n";
368 { // procedure
369 cp.code() += "{ // procedure\n";
370 cp.code() += "RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
371 cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
372 cp.code() += "} // procedure\n";
373 } // procedure
374 cp.code() += "} // conditional\n";
375 cp.code() += "} // block\n";
376 } // block
377 cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
378 cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
379 // -----------------------------------------------------------------------------
380  cp.getAffectedRegisters().add("instructionPointer", 32);
381  }
382  {
383  CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
384 
385  cp.code() = std::string("//CFSWSP\n");
386 
387 // -----------------------------------------------------------------------------
388 cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
389 // -----------------------------------------------------------------------------
390  }
391 
392  return true;
393  },
394  0,
395  [] (BitArray & ba, Instruction & instr)
396  {
397 // -----------------------------------------------------------------------------
398 etiss_uint8 rs2 = 0;
399 static BitArrayRange R_rs2_0(6, 2);
400 rs2 += R_rs2_0.read(ba) << 0;
401 etiss_uint8 uimm = 0;
402 static BitArrayRange R_uimm_6(8, 7);
403 uimm += R_uimm_6.read(ba) << 6;
404 static BitArrayRange R_uimm_2(12, 9);
405 uimm += R_uimm_2.read(ba) << 2;
406 
407 // -----------------------------------------------------------------------------
408 
409  std::stringstream ss;
410 // -----------------------------------------------------------------------------
411 ss << "cfswsp" << " # " << ba << (" [rs2=" + std::to_string(rs2) + " | uimm=" + std::to_string(uimm) + "]");
412 // -----------------------------------------------------------------------------
413  return ss.str();
414  }
415 );
ISA16_RV32IMACFD
etiss::instr::InstructionGroup ISA16_RV32IMACFD("ISA16_RV32IMACFD", 16)
cfswsp_rs2_uimm
static InstructionDefinition cfswsp_rs2_uimm(ISA16_RV32IMACFD, "cfswsp",(uint16_t) 0xe002,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(6, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(8, 7);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_2(12, 9);uimm+=R_uimm_2.read(ba)<< 2;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CFSWSP\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+2)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 offs = *((RV32IMACFD*)cpu)->X[2ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_uint32)(((RV32IMACFD*)cpu)->F["+std::to_string(rs2)+"ULL]);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CFSWSP\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(6, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(8, 7);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_2(12, 9);uimm+=R_uimm_2.read(ba)<< 2;std::stringstream ss;ss<< "cfswsp"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | uimm="+std::to_string(uimm)+"]");return ss.str();})
cfsw_rs2_uimm_rs1
static InstructionDefinition cfsw_rs2_uimm_rs1(ISA16_RV32IMACFD, "cfsw",(uint16_t) 0xe000,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(5, 5);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_2(6, 6);uimm+=R_uimm_2.read(ba)<< 2;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CFSW\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+2)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 offs = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_uint32)(((RV32IMACFD*)cpu)->F["+std::to_string(rs2+8ULL)+"ULL]);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CFSW\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(5, 5);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_2(6, 6);uimm+=R_uimm_2.read(ba)<< 2;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;std::stringstream ss;ss<< "cfsw"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | uimm="+std::to_string(uimm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})
cflwsp_uimm_rd
static InstructionDefinition cflwsp_uimm_rd(ISA16_RV32IMACFD, "cflwsp",(uint16_t) 0x6002,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(3, 2);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_2(6, 4);uimm+=R_uimm_2.read(ba)<< 2;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;static BitArrayRange R_uimm_5(12, 12);uimm+=R_uimm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CFLWSP\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+2)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 offs = *((RV32IMACFD*)cpu)->X[2ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_uint32 res = (etiss_uint32)(mem_val_0);\n";{ cp.code()+="{ // block\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = -4294967296LL | res;\n";cp.code()+="} // block\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CFLWSP\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(3, 2);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_2(6, 4);uimm+=R_uimm_2.read(ba)<< 2;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;static BitArrayRange R_uimm_5(12, 12);uimm+=R_uimm_5.read(ba)<< 5;std::stringstream ss;ss<< "cflwsp"<< " # "<< ba<<(" [uimm="+std::to_string(uimm)+" | rd="+std::to_string(rd)+"]");return ss.str();})
cflw_rd_uimm_rs1
static InstructionDefinition cflw_rd_uimm_rs1(ISA16_RV32IMACFD, "cflw",(uint16_t) 0x6000,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(4, 2);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(5, 5);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_2(6, 6);uimm+=R_uimm_2.read(ba)<< 2;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CFLW\n");{ cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+2)+"ULL;\n";cp.code()+="} // block\n";} { cp.code()+="{ // block\n";cp.code()+="etiss_uint32 offs = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_uint32 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 4);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_uint32 res = (etiss_uint32)(mem_val_0);\n";{ cp.code()+="{ // block\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd+8ULL)+"ULL] = -4294967296LL | res;\n";cp.code()+="} // block\n";} cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CFLW\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(4, 2);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(5, 5);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_2(6, 6);uimm+=R_uimm_2.read(ba)<< 2;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;std::stringstream ss;ss<< "cflw"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | uimm="+std::to_string(uimm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})
uint16_t
static __inline__ uint16_t
Definition: arm_mve.h:315
etiss_uint8
uint8_t etiss_uint8
Definition: types.h:87
etiss::CodePart
Contains a small code snipped.
Definition: CodePart.h:386
etiss::CodePart::APPENDEDRETURNINGREQUIRED
@ APPENDEDRETURNINGREQUIRED
Definition: CodePart.h:402
etiss::CodePart::code
std::string & code()
Definition: CodePart.h:416
etiss::CodePart::getAffectedRegisters
RegisterSet & getAffectedRegisters()
Definition: CodePart.h:414
etiss::CodeSet
A set of CodeParts.
Definition: CodePart.h:437
etiss::CodeSet::append
void append(const CodePart &part, CodePart::TYPE type)
Definition: CodePart.h:450
etiss::RegisterSet::add
void add(const RegisterPart &rp)
add a registerPart to the set or just its relevant bits if a register with the same name is already p...
Definition: CodePart.h:222
etiss::instr::BitArrayRange
Reading through it will only return bits within the range.
Definition: Instruction.h:208
etiss::instr::BitArrayRange::read
I read(const BitArray &ba)
reads bits from the range to the return value starting at the lsb.
Definition: Instruction.cpp:198
etiss::instr::BitArray
stores a bit vector
Definition: Instruction.h:161
etiss::instr::InstructionContext
this class contains parameters that persist in between instruction lookpus/translation within a trans...
Definition: Instruction.h:337
etiss::instr::InstructionContext::current_address_
uint64_t current_address_
start address of current instruction
Definition: Instruction.h:366
etiss::instr::Instruction
holds information and translation callbacks for an instruction.
Definition: Instruction.h:393
etiss
Page Table Entry (PTE) defines the composition of Page Frame Number (PFN) and relavant flags.
Definition: Benchmark.h:53
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