ETISS 0.11.2
ExtendableTranslatingInstructionSetSimulator(version0.11.2)
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RV32IMACFD_RV32DCInstr.cpp
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1// clang-format off
9#include "RV32IMACFDArch.h"
10#include "RV32IMACFDFuncs.h"
11
12using namespace etiss;
13using namespace etiss::instr;
14
15// CFLD ------------------------------------------------------------------------
16static InstructionDefinition cfld_rd_uimm_rs1 (
17 ISA16_RV32IMACFD,
18 "cfld",
19 (uint16_t) 0x2000,
20 (uint16_t) 0xe003,
21 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
22 {
23
24// -----------------------------------------------------------------------------
25
26// -----------------------------------------------------------------------------
27
28// -----------------------------------------------------------------------------
29// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
30etiss_uint8 rd = 0;
31static BitArrayRange R_rd_0(4, 2);
32rd += R_rd_0.read(ba) << 0;
33etiss_uint8 uimm = 0;
34static BitArrayRange R_uimm_6(6, 5);
35uimm += R_uimm_6.read(ba) << 6;
36etiss_uint8 rs1 = 0;
37static BitArrayRange R_rs1_0(9, 7);
38rs1 += R_rs1_0.read(ba) << 0;
39static BitArrayRange R_uimm_3(12, 10);
40uimm += R_uimm_3.read(ba) << 3;
41
42// NOLINTEND(clang-diagnostic-unused-but-set-variable)
43// -----------------------------------------------------------------------------
44
45 {
46 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
47
48 cp.code() = std::string("//CFLD\n");
49
50// -----------------------------------------------------------------------------
51cp.code() += "etiss_coverage_count(1, 144);\n";
52{ // block
53cp.code() += "etiss_coverage_count(1, 1169);\n";
54cp.code() += "{ // block\n";
55cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + 2) + "ULL;\n";
56cp.code() += "etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";
57cp.code() += "} // block\n";
58} // block
59{ // block
60cp.code() += "etiss_coverage_count(1, 6281);\n";
61cp.code() += "{ // block\n";
62cp.code() += "etiss_uint32 offs = *((RV32IMACFD*)cpu)->X[" + std::to_string(rs1 + 8ULL) + "ULL] + " + std::to_string(uimm) + "ULL;\n";
63cp.code() += "etiss_coverage_count(7, 6248, 6247, 6245, 6244, 6242, 6243, 6246);\n";
64cp.code() += "etiss_uint64 mem_val_0;\n";
65cp.code() += "cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";
66cp.code() += "if (cpu->exception) { // conditional\n";
67{ // procedure
68cp.code() += "{ // procedure\n";
69cp.code() += "RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
70cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
71cp.code() += "} // procedure\n";
72} // procedure
73cp.code() += "} // conditional\n";
74cp.code() += "etiss_uint64 res = (etiss_uint64)(mem_val_0);\n";
75cp.code() += "etiss_coverage_count(4, 6255, 6254, 6252, 6251);\n";
76cp.code() += "((RV32IMACFD*)cpu)->F[" + std::to_string(rd + 8ULL) + "ULL] = res;\n";
77cp.code() += "etiss_coverage_count(6, 6266, 6264, 6263, 6261, 6262, 6265);\n";
78cp.code() += "} // block\n";
79} // block
80cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
81cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
82// -----------------------------------------------------------------------------
83 cp.getAffectedRegisters().add("instructionPointer", 32);
84 }
85 {
86 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
87
88 cp.code() = std::string("//CFLD\n");
89
90// -----------------------------------------------------------------------------
91cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
92// -----------------------------------------------------------------------------
93 }
94
95 return true;
96 },
97 0,
98 [] (BitArray & ba, Instruction & instr)
99 {
100// -----------------------------------------------------------------------------
101etiss_uint8 rd = 0;
102static BitArrayRange R_rd_0(4, 2);
103rd += R_rd_0.read(ba) << 0;
104etiss_uint8 uimm = 0;
105static BitArrayRange R_uimm_6(6, 5);
106uimm += R_uimm_6.read(ba) << 6;
107etiss_uint8 rs1 = 0;
108static BitArrayRange R_rs1_0(9, 7);
109rs1 += R_rs1_0.read(ba) << 0;
110static BitArrayRange R_uimm_3(12, 10);
111uimm += R_uimm_3.read(ba) << 3;
112
113// -----------------------------------------------------------------------------
114
115 std::stringstream ss;
116// -----------------------------------------------------------------------------
117ss << "cfld" << " # " << ba << (" [rd=" + std::to_string(rd) + " | uimm=" + std::to_string(uimm) + " | rs1=" + std::to_string(rs1) + "]");
118// -----------------------------------------------------------------------------
119 return ss.str();
120 }
121);
122
123// CFSD ------------------------------------------------------------------------
124static InstructionDefinition cfsd_rs2_uimm_rs1 (
125 ISA16_RV32IMACFD,
126 "cfsd",
127 (uint16_t) 0xa000,
128 (uint16_t) 0xe003,
129 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
130 {
131
132// -----------------------------------------------------------------------------
133
134// -----------------------------------------------------------------------------
135
136// -----------------------------------------------------------------------------
137// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
138etiss_uint8 rs2 = 0;
139static BitArrayRange R_rs2_0(4, 2);
140rs2 += R_rs2_0.read(ba) << 0;
141etiss_uint8 uimm = 0;
142static BitArrayRange R_uimm_6(6, 5);
143uimm += R_uimm_6.read(ba) << 6;
144etiss_uint8 rs1 = 0;
145static BitArrayRange R_rs1_0(9, 7);
146rs1 += R_rs1_0.read(ba) << 0;
147static BitArrayRange R_uimm_3(12, 10);
148uimm += R_uimm_3.read(ba) << 3;
149
150// NOLINTEND(clang-diagnostic-unused-but-set-variable)
151// -----------------------------------------------------------------------------
152
153 {
154 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
155
156 cp.code() = std::string("//CFSD\n");
157
158// -----------------------------------------------------------------------------
159cp.code() += "etiss_coverage_count(1, 145);\n";
160{ // block
161cp.code() += "etiss_coverage_count(1, 1169);\n";
162cp.code() += "{ // block\n";
163cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + 2) + "ULL;\n";
164cp.code() += "etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";
165cp.code() += "} // block\n";
166} // block
167{ // block
168cp.code() += "etiss_coverage_count(1, 6302);\n";
169cp.code() += "{ // block\n";
170cp.code() += "etiss_uint32 offs = *((RV32IMACFD*)cpu)->X[" + std::to_string(rs1 + 8ULL) + "ULL] + " + std::to_string(uimm) + "ULL;\n";
171cp.code() += "etiss_coverage_count(7, 6290, 6289, 6287, 6286, 6284, 6285, 6288);\n";
172cp.code() += "etiss_uint64 mem_val_0;\n";
173cp.code() += "mem_val_0 = (etiss_uint64)(((RV32IMACFD*)cpu)->F[" + std::to_string(rs2 + 8ULL) + "ULL]);\n";
174cp.code() += "etiss_coverage_count(8, 6301, 6293, 6292, 6300, 6298, 6297, 6295, 6296);\n";
175cp.code() += "cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";
176cp.code() += "if (cpu->exception) { // conditional\n";
177{ // procedure
178cp.code() += "{ // procedure\n";
179cp.code() += "RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
180cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
181cp.code() += "} // procedure\n";
182} // procedure
183cp.code() += "} // conditional\n";
184cp.code() += "} // block\n";
185} // block
186cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
187cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
188// -----------------------------------------------------------------------------
189 cp.getAffectedRegisters().add("instructionPointer", 32);
190 }
191 {
192 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
193
194 cp.code() = std::string("//CFSD\n");
195
196// -----------------------------------------------------------------------------
197cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
198// -----------------------------------------------------------------------------
199 }
200
201 return true;
202 },
203 0,
204 [] (BitArray & ba, Instruction & instr)
205 {
206// -----------------------------------------------------------------------------
207etiss_uint8 rs2 = 0;
208static BitArrayRange R_rs2_0(4, 2);
209rs2 += R_rs2_0.read(ba) << 0;
210etiss_uint8 uimm = 0;
211static BitArrayRange R_uimm_6(6, 5);
212uimm += R_uimm_6.read(ba) << 6;
213etiss_uint8 rs1 = 0;
214static BitArrayRange R_rs1_0(9, 7);
215rs1 += R_rs1_0.read(ba) << 0;
216static BitArrayRange R_uimm_3(12, 10);
217uimm += R_uimm_3.read(ba) << 3;
218
219// -----------------------------------------------------------------------------
220
221 std::stringstream ss;
222// -----------------------------------------------------------------------------
223ss << "cfsd" << " # " << ba << (" [rs2=" + std::to_string(rs2) + " | uimm=" + std::to_string(uimm) + " | rs1=" + std::to_string(rs1) + "]");
224// -----------------------------------------------------------------------------
225 return ss.str();
226 }
227);
228
229// CFLDSP ----------------------------------------------------------------------
230static InstructionDefinition cfldsp_uimm_rd (
231 ISA16_RV32IMACFD,
232 "cfldsp",
233 (uint16_t) 0x2002,
234 (uint16_t) 0xe003,
235 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
236 {
237
238// -----------------------------------------------------------------------------
239
240// -----------------------------------------------------------------------------
241
242// -----------------------------------------------------------------------------
243// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
244etiss_uint16 uimm = 0;
245static BitArrayRange R_uimm_6(4, 2);
246uimm += R_uimm_6.read(ba) << 6;
247static BitArrayRange R_uimm_3(6, 5);
248uimm += R_uimm_3.read(ba) << 3;
249etiss_uint8 rd = 0;
250static BitArrayRange R_rd_0(11, 7);
251rd += R_rd_0.read(ba) << 0;
252static BitArrayRange R_uimm_5(12, 12);
253uimm += R_uimm_5.read(ba) << 5;
254
255// NOLINTEND(clang-diagnostic-unused-but-set-variable)
256// -----------------------------------------------------------------------------
257
258 {
259 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
260
261 cp.code() = std::string("//CFLDSP\n");
262
263// -----------------------------------------------------------------------------
264cp.code() += "etiss_coverage_count(1, 146);\n";
265{ // block
266cp.code() += "etiss_coverage_count(1, 1169);\n";
267cp.code() += "{ // block\n";
268cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + 2) + "ULL;\n";
269cp.code() += "etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";
270cp.code() += "} // block\n";
271} // block
272{ // block
273cp.code() += "etiss_coverage_count(1, 6338);\n";
274cp.code() += "{ // block\n";
275cp.code() += "etiss_uint32 offs = *((RV32IMACFD*)cpu)->X[2ULL] + " + std::to_string(uimm) + "ULL;\n";
276cp.code() += "etiss_coverage_count(5, 6309, 6308, 6306, 6305, 6307);\n";
277cp.code() += "etiss_uint64 mem_val_0;\n";
278cp.code() += "cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";
279cp.code() += "if (cpu->exception) { // conditional\n";
280{ // procedure
281cp.code() += "{ // procedure\n";
282cp.code() += "RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
283cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
284cp.code() += "} // procedure\n";
285} // procedure
286cp.code() += "} // conditional\n";
287cp.code() += "etiss_uint64 res = (etiss_uint64)(mem_val_0);\n";
288cp.code() += "etiss_coverage_count(4, 6316, 6315, 6313, 6312);\n";
289cp.code() += "((RV32IMACFD*)cpu)->F[" + std::to_string(rd) + "ULL] = res;\n";
290cp.code() += "etiss_coverage_count(4, 6325, 6323, 6322, 6324);\n";
291cp.code() += "} // block\n";
292} // block
293cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
294cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
295// -----------------------------------------------------------------------------
296 cp.getAffectedRegisters().add("instructionPointer", 32);
297 }
298 {
299 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
300
301 cp.code() = std::string("//CFLDSP\n");
302
303// -----------------------------------------------------------------------------
304cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
305// -----------------------------------------------------------------------------
306 }
307
308 return true;
309 },
310 0,
311 [] (BitArray & ba, Instruction & instr)
312 {
313// -----------------------------------------------------------------------------
314etiss_uint16 uimm = 0;
315static BitArrayRange R_uimm_6(4, 2);
316uimm += R_uimm_6.read(ba) << 6;
317static BitArrayRange R_uimm_3(6, 5);
318uimm += R_uimm_3.read(ba) << 3;
319etiss_uint8 rd = 0;
320static BitArrayRange R_rd_0(11, 7);
321rd += R_rd_0.read(ba) << 0;
322static BitArrayRange R_uimm_5(12, 12);
323uimm += R_uimm_5.read(ba) << 5;
324
325// -----------------------------------------------------------------------------
326
327 std::stringstream ss;
328// -----------------------------------------------------------------------------
329ss << "cfldsp" << " # " << ba << (" [uimm=" + std::to_string(uimm) + " | rd=" + std::to_string(rd) + "]");
330// -----------------------------------------------------------------------------
331 return ss.str();
332 }
333);
334
335// CFSDSP ----------------------------------------------------------------------
336static InstructionDefinition cfsdsp_rs2_uimm (
337 ISA16_RV32IMACFD,
338 "cfsdsp",
339 (uint16_t) 0xa002,
340 (uint16_t) 0xe003,
341 [] (BitArray & ba,etiss::CodeSet & cs,InstructionContext & ic)
342 {
343
344// -----------------------------------------------------------------------------
345
346// -----------------------------------------------------------------------------
347
348// -----------------------------------------------------------------------------
349// NOLINTBEGIN(clang-diagnostic-unused-but-set-variable)
350etiss_uint8 rs2 = 0;
351static BitArrayRange R_rs2_0(6, 2);
352rs2 += R_rs2_0.read(ba) << 0;
353etiss_uint16 uimm = 0;
354static BitArrayRange R_uimm_6(9, 7);
355uimm += R_uimm_6.read(ba) << 6;
356static BitArrayRange R_uimm_3(12, 10);
357uimm += R_uimm_3.read(ba) << 3;
358
359// NOLINTEND(clang-diagnostic-unused-but-set-variable)
360// -----------------------------------------------------------------------------
361
362 {
363 CodePart & cp = cs.append(CodePart::INITIALREQUIRED);
364
365 cp.code() = std::string("//CFSDSP\n");
366
367// -----------------------------------------------------------------------------
368cp.code() += "etiss_coverage_count(1, 147);\n";
369{ // block
370cp.code() += "etiss_coverage_count(1, 1169);\n";
371cp.code() += "{ // block\n";
372cp.code() += "cpu->nextPc = " + std::to_string(ic.current_address_ + 2) + "ULL;\n";
373cp.code() += "etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";
374cp.code() += "} // block\n";
375} // block
376{ // block
377cp.code() += "etiss_coverage_count(1, 6355);\n";
378cp.code() += "{ // block\n";
379cp.code() += "etiss_uint32 offs = *((RV32IMACFD*)cpu)->X[2ULL] + " + std::to_string(uimm) + "ULL;\n";
380cp.code() += "etiss_coverage_count(5, 6345, 6344, 6342, 6341, 6343);\n";
381cp.code() += "etiss_uint64 mem_val_0;\n";
382cp.code() += "mem_val_0 = (etiss_uint64)(((RV32IMACFD*)cpu)->F[" + std::to_string(rs2) + "ULL]);\n";
383cp.code() += "etiss_coverage_count(6, 6354, 6348, 6347, 6353, 6351, 6350);\n";
384cp.code() += "cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";
385cp.code() += "if (cpu->exception) { // conditional\n";
386{ // procedure
387cp.code() += "{ // procedure\n";
388cp.code() += "RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";
389cp.code() += "goto instr_exit_" + std::to_string(ic.current_address_) + ";\n";
390cp.code() += "} // procedure\n";
391} // procedure
392cp.code() += "} // conditional\n";
393cp.code() += "} // block\n";
394} // block
395cp.code() += "instr_exit_" + std::to_string(ic.current_address_) + ":\n";
396cp.code() += "cpu->instructionPointer = cpu->nextPc;\n";
397// -----------------------------------------------------------------------------
398 cp.getAffectedRegisters().add("instructionPointer", 32);
399 }
400 {
401 CodePart & cp = cs.append(CodePart::APPENDEDRETURNINGREQUIRED);
402
403 cp.code() = std::string("//CFSDSP\n");
404
405// -----------------------------------------------------------------------------
406cp.code() += "if (cpu->return_pending || cpu->exception) return cpu->exception;\n";
407// -----------------------------------------------------------------------------
408 }
409
410 return true;
411 },
412 0,
413 [] (BitArray & ba, Instruction & instr)
414 {
415// -----------------------------------------------------------------------------
416etiss_uint8 rs2 = 0;
417static BitArrayRange R_rs2_0(6, 2);
418rs2 += R_rs2_0.read(ba) << 0;
419etiss_uint16 uimm = 0;
420static BitArrayRange R_uimm_6(9, 7);
421uimm += R_uimm_6.read(ba) << 6;
422static BitArrayRange R_uimm_3(12, 10);
423uimm += R_uimm_3.read(ba) << 3;
424
425// -----------------------------------------------------------------------------
426
427 std::stringstream ss;
428// -----------------------------------------------------------------------------
429ss << "cfsdsp" << " # " << ba << (" [rs2=" + std::to_string(rs2) + " | uimm=" + std::to_string(uimm) + "]");
430// -----------------------------------------------------------------------------
431 return ss.str();
432 }
433);
434// clang-format on
ISA16_RV32IMACFD
etiss::instr::InstructionGroup ISA16_RV32IMACFD("ISA16_RV32IMACFD", 16)
cfldsp_uimm_rd
static InstructionDefinition cfldsp_uimm_rd(ISA16_RV32IMACFD, "cfldsp",(uint16_t) 0x2002,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint16 uimm=0;static BitArrayRange R_uimm_6(4, 2);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_3(6, 5);uimm+=R_uimm_3.read(ba)<< 3;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;static BitArrayRange R_uimm_5(12, 12);uimm+=R_uimm_5.read(ba)<< 5;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CFLDSP\n");cp.code()+="etiss_coverage_count(1, 146);\n";{ cp.code()+="etiss_coverage_count(1, 1169);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+2)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6338);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 offs = *((RV32IMACFD*)cpu)->X[2ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 6309, 6308, 6306, 6305, 6307);\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_uint64 res = (etiss_uint64)(mem_val_0);\n";cp.code()+="etiss_coverage_count(4, 6316, 6315, 6313, 6312);\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(4, 6325, 6323, 6322, 6324);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CFLDSP\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint16 uimm=0;static BitArrayRange R_uimm_6(4, 2);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_3(6, 5);uimm+=R_uimm_3.read(ba)<< 3;etiss_uint8 rd=0;static BitArrayRange R_rd_0(11, 7);rd+=R_rd_0.read(ba)<< 0;static BitArrayRange R_uimm_5(12, 12);uimm+=R_uimm_5.read(ba)<< 5;std::stringstream ss;ss<< "cfldsp"<< " # "<< ba<<(" [uimm="+std::to_string(uimm)+" | rd="+std::to_string(rd)+"]");return ss.str();})
cfld_rd_uimm_rs1
static InstructionDefinition cfld_rd_uimm_rs1(ISA16_RV32IMACFD, "cfld",(uint16_t) 0x2000,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(4, 2);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(6, 5);uimm+=R_uimm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CFLD\n");cp.code()+="etiss_coverage_count(1, 144);\n";{ cp.code()+="etiss_coverage_count(1, 1169);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+2)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6281);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 offs = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 6248, 6247, 6245, 6244, 6242, 6243, 6246);\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="cpu->exception |= (*(system->dread))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="etiss_uint64 res = (etiss_uint64)(mem_val_0);\n";cp.code()+="etiss_coverage_count(4, 6255, 6254, 6252, 6251);\n";cp.code()+="((RV32IMACFD*)cpu)->F["+std::to_string(rd+8ULL)+"ULL] = res;\n";cp.code()+="etiss_coverage_count(6, 6266, 6264, 6263, 6261, 6262, 6265);\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CFLD\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rd=0;static BitArrayRange R_rd_0(4, 2);rd+=R_rd_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(6, 5);uimm+=R_uimm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;std::stringstream ss;ss<< "cfld"<< " # "<< ba<<(" [rd="+std::to_string(rd)+" | uimm="+std::to_string(uimm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})
cfsdsp_rs2_uimm
static InstructionDefinition cfsdsp_rs2_uimm(ISA16_RV32IMACFD, "cfsdsp",(uint16_t) 0xa002,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(6, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint16 uimm=0;static BitArrayRange R_uimm_6(9, 7);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CFSDSP\n");cp.code()+="etiss_coverage_count(1, 147);\n";{ cp.code()+="etiss_coverage_count(1, 1169);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+2)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6355);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 offs = *((RV32IMACFD*)cpu)->X[2ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 6345, 6344, 6342, 6341, 6343);\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs2)+"ULL]);\n";cp.code()+="etiss_coverage_count(6, 6354, 6348, 6347, 6353, 6351, 6350);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CFSDSP\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(6, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint16 uimm=0;static BitArrayRange R_uimm_6(9, 7);uimm+=R_uimm_6.read(ba)<< 6;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;std::stringstream ss;ss<< "cfsdsp"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | uimm="+std::to_string(uimm)+"]");return ss.str();})
cfsd_rs2_uimm_rs1
static InstructionDefinition cfsd_rs2_uimm_rs1(ISA16_RV32IMACFD, "cfsd",(uint16_t) 0xa000,(uint16_t) 0xe003, [](BitArray &ba, etiss::CodeSet &cs, InstructionContext &ic) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(6, 5);uimm+=R_uimm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;{ CodePart &cp=cs.append(CodePart::INITIALREQUIRED);cp.code()=std::string("//CFSD\n");cp.code()+="etiss_coverage_count(1, 145);\n";{ cp.code()+="etiss_coverage_count(1, 1169);\n";cp.code()+="{ // block\n";cp.code()+="cpu->nextPc = "+std::to_string(ic.current_address_+2)+"ULL;\n";cp.code()+="etiss_coverage_count(5, 1168, 1164, 1167, 1165, 1166);\n";cp.code()+="} // block\n";} { cp.code()+="etiss_coverage_count(1, 6302);\n";cp.code()+="{ // block\n";cp.code()+="etiss_uint32 offs = *((RV32IMACFD*)cpu)->X["+std::to_string(rs1+8ULL)+"ULL] + "+std::to_string(uimm)+"ULL;\n";cp.code()+="etiss_coverage_count(7, 6290, 6289, 6287, 6286, 6284, 6285, 6288);\n";cp.code()+="etiss_uint64 mem_val_0;\n";cp.code()+="mem_val_0 = (etiss_uint64)(((RV32IMACFD*)cpu)->F["+std::to_string(rs2+8ULL)+"ULL]);\n";cp.code()+="etiss_coverage_count(8, 6301, 6293, 6292, 6300, 6298, 6297, 6295, 6296);\n";cp.code()+="cpu->exception |= (*(system->dwrite))(system->handle, cpu, offs, (etiss_uint8*)&mem_val_0, 8);\n";cp.code()+="if (cpu->exception) { // conditional\n";{ cp.code()+="{ // procedure\n";cp.code()+="RV32IMACFD_translate_exc_code(cpu, system, plugin_pointers, cpu->exception);\n";cp.code()+="goto instr_exit_"+std::to_string(ic.current_address_)+";\n";cp.code()+="} // procedure\n";} cp.code()+="} // conditional\n";cp.code()+="} // block\n";} cp.code()+="instr_exit_"+std::to_string(ic.current_address_)+":\n";cp.code()+="cpu->instructionPointer = cpu->nextPc;\n";cp.getAffectedRegisters().add("instructionPointer", 32);} { CodePart &cp=cs.append(CodePart::APPENDEDRETURNINGREQUIRED);cp.code()=std::string("//CFSD\n");cp.code()+="if (cpu->return_pending || cpu->exception) return cpu->exception;\n";} return true;}, 0, [](BitArray &ba, Instruction &instr) { etiss_uint8 rs2=0;static BitArrayRange R_rs2_0(4, 2);rs2+=R_rs2_0.read(ba)<< 0;etiss_uint8 uimm=0;static BitArrayRange R_uimm_6(6, 5);uimm+=R_uimm_6.read(ba)<< 6;etiss_uint8 rs1=0;static BitArrayRange R_rs1_0(9, 7);rs1+=R_rs1_0.read(ba)<< 0;static BitArrayRange R_uimm_3(12, 10);uimm+=R_uimm_3.read(ba)<< 3;std::stringstream ss;ss<< "cfsd"<< " # "<< ba<<(" [rs2="+std::to_string(rs2)+" | uimm="+std::to_string(uimm)+" | rs1="+std::to_string(rs1)+"]");return ss.str();})
etiss_uint8
uint8_t etiss_uint8
Definition types.h:49
etiss_uint16
uint16_t etiss_uint16
Definition types.h:52
etiss::CodePart
Contains a small code snipped.
Definition CodePart.h:348
etiss::CodePart::APPENDEDRETURNINGREQUIRED
@ APPENDEDRETURNINGREQUIRED
Definition CodePart.h:364
etiss::CodePart::code
std::string & code()
Definition CodePart.h:378
etiss::CodePart::getAffectedRegisters
RegisterSet & getAffectedRegisters()
Definition CodePart.h:376
etiss::CodeSet
A set of CodeParts.
Definition CodePart.h:399
etiss::CodeSet::append
void append(const CodePart &part, CodePart::TYPE type)
Definition CodePart.h:412
etiss::RegisterSet::add
void add(const RegisterPart &rp)
add a registerPart to the set or just its relevant bits if a register with the same name is already p...
Definition CodePart.h:184
etiss::instr::BitArrayRange
Reading through it will only return bits within the range.
Definition Instruction.h:162
etiss::instr::BitArrayRange::read
I read(const BitArray &ba)
reads bits from the range to the return value starting at the lsb.
Definition Instruction.cpp:171
etiss::instr::BitArray
stores a bit vector
Definition Instruction.h:114
etiss::instr::InstructionContext
this class contains parameters that persist in between instruction lookpus/translation within a trans...
Definition Instruction.h:290
etiss::instr::InstructionContext::current_address_
uint64_t current_address_
start address of current instruction
Definition Instruction.h:319
etiss::instr::Instruction
holds information and translation callbacks for an instruction.
Definition Instruction.h:346
etiss
forwards: include/jit/*
Definition Benchmark.h:17
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