mlonmcu.target package
Subpackages
- mlonmcu.target.arm package
- Submodules
- mlonmcu.target.arm.corstone300 module
Corstone300Target
Corstone300Target.DEFAULTS
Corstone300Target.FEATURES
Corstone300Target.REQUIRED
Corstone300Target.cmsis_dir
Corstone300Target.cmsisnn_dir
Corstone300Target.enable_dsp
Corstone300Target.enable_ethosu
Corstone300Target.enable_fpu
Corstone300Target.enable_mvei
Corstone300Target.ethosu_num_macs
Corstone300Target.ethosu_platform_dir
Corstone300Target.exec()
Corstone300Target.extra_args
Corstone300Target.fvp_exe
Corstone300Target.gcc_prefix
Corstone300Target.get_arch()
Corstone300Target.get_backend_config()
Corstone300Target.get_default_fvp_args()
Corstone300Target.get_ethosu_fvp_args()
Corstone300Target.get_metrics()
Corstone300Target.get_platform_defs()
Corstone300Target.model
Corstone300Target.parse_stdout()
Corstone300Target.timeout_sec
- mlonmcu.target.arm.util module
- Module contents
Corstone300Target
Corstone300Target.DEFAULTS
Corstone300Target.FEATURES
Corstone300Target.REQUIRED
Corstone300Target.cmsis_dir
Corstone300Target.cmsisnn_dir
Corstone300Target.enable_dsp
Corstone300Target.enable_ethosu
Corstone300Target.enable_fpu
Corstone300Target.enable_mvei
Corstone300Target.ethosu_num_macs
Corstone300Target.ethosu_platform_dir
Corstone300Target.exec()
Corstone300Target.extra_args
Corstone300Target.fvp_exe
Corstone300Target.gcc_prefix
Corstone300Target.get_arch()
Corstone300Target.get_backend_config()
Corstone300Target.get_default_fvp_args()
Corstone300Target.get_ethosu_fvp_args()
Corstone300Target.get_metrics()
Corstone300Target.get_platform_defs()
Corstone300Target.model
Corstone300Target.parse_stdout()
Corstone300Target.timeout_sec
- mlonmcu.target.riscv package
- Submodules
- mlonmcu.target.riscv.ara module
AraTarget
AraTarget.DEFAULTS
AraTarget.FEATURES
AraTarget.OPTIONAL
AraTarget.REQUIRED
AraTarget.ara_apps_dir
AraTarget.ara_hardware_dir
AraTarget.ara_verilator_tb
AraTarget.elen
AraTarget.embedded_vext
AraTarget.enable_vext
AraTarget.exec()
AraTarget.extensions
AraTarget.get_backend_config()
AraTarget.get_metrics()
AraTarget.get_platform_defs()
AraTarget.get_target_system()
AraTarget.limit_cycles
AraTarget.nr_lanes
AraTarget.num_threads
AraTarget.parse_exit()
AraTarget.parse_stdout()
AraTarget.prepare_simulator()
AraTarget.verilator_install_dir
AraTarget.vext_spec
AraTarget.vlen
- mlonmcu.target.riscv.ara_rtl module
AraRtlTarget
AraRtlTarget.DEFAULTS
AraRtlTarget.FEATURES
AraRtlTarget.OPTIONAL
AraRtlTarget.REQUIRED
AraRtlTarget.ara_apps_dir
AraRtlTarget.ara_hardware_dir
AraRtlTarget.elen
AraRtlTarget.embedded_vext
AraRtlTarget.enable_vext
AraRtlTarget.exec()
AraRtlTarget.extensions
AraRtlTarget.get_backend_config()
AraRtlTarget.get_metrics()
AraRtlTarget.get_platform_defs()
AraRtlTarget.get_target_system()
AraRtlTarget.limit_cycles
AraRtlTarget.nr_lanes
AraRtlTarget.num_threads
AraRtlTarget.parse_exit()
AraRtlTarget.parse_stdout()
AraRtlTarget.prepare_simulator()
AraRtlTarget.questasim_install_dir
AraRtlTarget.spike_install_dir
AraRtlTarget.verilator_install_dir
AraRtlTarget.vext_spec
AraRtlTarget.vlen
- mlonmcu.target.riscv.corev_ovpsim module
COREVOVPSimTarget
COREVOVPSimTarget.DEFAULTS
COREVOVPSimTarget.FEATURES
COREVOVPSimTarget.REQUIRED
COREVOVPSimTarget.attr
COREVOVPSimTarget.enable_xcorevalu
COREVOVPSimTarget.enable_xcorevbi
COREVOVPSimTarget.enable_xcorevbitmanip
COREVOVPSimTarget.enable_xcorevhwlp
COREVOVPSimTarget.enable_xcorevmac
COREVOVPSimTarget.enable_xcorevmem
COREVOVPSimTarget.enable_xcorevsimd
COREVOVPSimTarget.end_to_end_cycles
COREVOVPSimTarget.exec()
COREVOVPSimTarget.extensions
COREVOVPSimTarget.gdbserver_attach
COREVOVPSimTarget.gdbserver_enable
COREVOVPSimTarget.gdbserver_port
COREVOVPSimTarget.get_backend_config()
COREVOVPSimTarget.get_default_ovpsim_args()
COREVOVPSimTarget.get_metrics()
COREVOVPSimTarget.get_platform_defs()
COREVOVPSimTarget.ovpsim_exe
COREVOVPSimTarget.parse_exit()
COREVOVPSimTarget.parse_stdout()
COREVOVPSimTarget.processor
COREVOVPSimTarget.variant
replace_unsupported()
- mlonmcu.target.riscv.cv32e40p module
CV32E40PTarget
CV32E40PTarget.DEFAULTS
CV32E40PTarget.FEATURES
CV32E40PTarget.REQUIRED
CV32E40PTarget.attr
CV32E40PTarget.enable_xcorevalu
CV32E40PTarget.enable_xcorevbi
CV32E40PTarget.enable_xcorevbitmanip
CV32E40PTarget.enable_xcorevhwlp
CV32E40PTarget.enable_xcorevmac
CV32E40PTarget.enable_xcorevmem
CV32E40PTarget.enable_xcorevsimd
CV32E40PTarget.exec()
CV32E40PTarget.extensions
CV32E40PTarget.get_backend_config()
CV32E40PTarget.get_metrics()
CV32E40PTarget.get_platform_defs()
CV32E40PTarget.get_target_system()
CV32E40PTarget.parse_exit()
CV32E40PTarget.parse_stdout()
CV32E40PTarget.verilator_executable
- mlonmcu.target.riscv.etiss module
EtissTarget
EtissTarget.DEFAULTS
EtissTarget.FEATURES
EtissTarget.REQUIRED
EtissTarget.allow_error
EtissTarget.attr
EtissTarget.cpu_arch
EtissTarget.cycle_time_ps
EtissTarget.debug_etiss
EtissTarget.elen
EtissTarget.embedded_vext
EtissTarget.enable_pext
EtissTarget.enable_vext
EtissTarget.enable_xcorevalu
EtissTarget.enable_xcorevbi
EtissTarget.enable_xcorevbitmanip
EtissTarget.enable_xcorevhwlp
EtissTarget.enable_xcorevmac
EtissTarget.enable_xcorevmem
EtissTarget.enable_xcorevsimd
EtissTarget.etiss_dir
EtissTarget.etiss_script
EtissTarget.etiss_src_dir
EtissTarget.exec()
EtissTarget.extensions
EtissTarget.extra_bool_config
EtissTarget.extra_int_config
EtissTarget.extra_plugin_config
EtissTarget.extra_string_config
EtissTarget.gdbserver_attach
EtissTarget.gdbserver_enable
EtissTarget.gdbserver_port
EtissTarget.get_backend_config()
EtissTarget.get_ini_bool_config()
EtissTarget.get_ini_int_config()
EtissTarget.get_ini_plugin_config()
EtissTarget.get_ini_string_config()
EtissTarget.get_metrics()
EtissTarget.get_platform_defs()
EtissTarget.get_target_system()
EtissTarget.jit
EtissTarget.max_block_size
EtissTarget.parse_exit()
EtissTarget.parse_stdout()
EtissTarget.pext_spec
EtissTarget.plugins
EtissTarget.ram_size
EtissTarget.ram_start
EtissTarget.rom_size
EtissTarget.rom_start
EtissTarget.trace_memory
EtissTarget.verbose
EtissTarget.vext_spec
EtissTarget.vlen
EtissTarget.write_ini()
- mlonmcu.target.riscv.etiss_pulpino module
- mlonmcu.target.riscv.gvsoc_pulp module
GvsocPulpTarget
GvsocPulpTarget.DEFAULTS
GvsocPulpTarget.FEATURES
GvsocPulpTarget.REQUIRED
GvsocPulpTarget.abi
GvsocPulpTarget.exec()
GvsocPulpTarget.extensions
GvsocPulpTarget.get_backend_config()
GvsocPulpTarget.get_basic_gvsoc_simulating_arg()
GvsocPulpTarget.get_metrics()
GvsocPulpTarget.get_platform_defs()
GvsocPulpTarget.get_target_system()
GvsocPulpTarget.gvsoc_folder
GvsocPulpTarget.gvsoc_preparation_env()
GvsocPulpTarget.gvsoc_script
GvsocPulpTarget.model
GvsocPulpTarget.parse_stdout()
GvsocPulpTarget.pulp_freertos_config_dir
GvsocPulpTarget.pulp_freertos_install_dir
GvsocPulpTarget.pulp_freertos_support_dir
GvsocPulpTarget.xpulp_version
- mlonmcu.target.riscv.ovpsim module
OVPSimTarget
OVPSimTarget.DEFAULTS
OVPSimTarget.FEATURES
OVPSimTarget.REQUIRED
OVPSimTarget.end_to_end_cycles
OVPSimTarget.exec()
OVPSimTarget.extensions
OVPSimTarget.gdbserver_attach
OVPSimTarget.gdbserver_enable
OVPSimTarget.gdbserver_port
OVPSimTarget.get_backend_config()
OVPSimTarget.get_default_ovpsim_args()
OVPSimTarget.get_metrics()
OVPSimTarget.get_platform_defs()
OVPSimTarget.ovpsim_exe
OVPSimTarget.parse_stdout()
OVPSimTarget.variant
replace_unsupported()
- mlonmcu.target.riscv.riscv module
RISCVTarget
RISCVTarget.DEFAULTS
RISCVTarget.FEATURES
RISCVTarget.OPTIONAL
RISCVTarget.PUPL_GCC_TOOLCHAIN_REQUIRED
RISCVTarget.REQUIRED
RISCVTarget.abi
RISCVTarget.arch
RISCVTarget.atomic
RISCVTarget.attr
RISCVTarget.attrs
RISCVTarget.compressed
RISCVTarget.cpu
RISCVTarget.embedded
RISCVTarget.extensions
RISCVTarget.extra_args
RISCVTarget.fpu
RISCVTarget.gcc_arch
RISCVTarget.gcc_extensions
RISCVTarget.gcc_variant
RISCVTarget.get_arch()
RISCVTarget.get_backend_config()
RISCVTarget.get_platform_defs()
RISCVTarget.get_target_system()
RISCVTarget.has_fpu
RISCVTarget.llvm_arch
RISCVTarget.llvm_extensions
RISCVTarget.multiply
RISCVTarget.pulp_gcc_basename
RISCVTarget.pulp_gcc_prefix
RISCVTarget.reconfigure()
RISCVTarget.riscv_gcc_basename
RISCVTarget.riscv_gcc_prefix
RISCVTarget.timeout_sec
RISCVTarget.toolchain
RISCVTarget.xlen
- mlonmcu.target.riscv.riscv_bext_target module
- mlonmcu.target.riscv.riscv_pext_target module
- mlonmcu.target.riscv.riscv_qemu module
RiscvQemuTarget
RiscvQemuTarget.DEFAULTS
RiscvQemuTarget.FEATURES
RiscvQemuTarget.REQUIRED
RiscvQemuTarget.attr
RiscvQemuTarget.elen
RiscvQemuTarget.embedded_vext
RiscvQemuTarget.enable_vext
RiscvQemuTarget.exec()
RiscvQemuTarget.extensions
RiscvQemuTarget.get_cpu_str()
RiscvQemuTarget.get_metrics()
RiscvQemuTarget.get_platform_defs()
RiscvQemuTarget.get_qemu_args()
RiscvQemuTarget.get_target_system()
RiscvQemuTarget.parse_stdout()
RiscvQemuTarget.riscv32_qemu_exe
RiscvQemuTarget.vext_spec
RiscvQemuTarget.vlen
- mlonmcu.target.riscv.riscv_vext_target module
- mlonmcu.target.riscv.spike module
SpikeTarget
SpikeTarget.DEFAULTS
SpikeTarget.FEATURES
SpikeTarget.REQUIRED
SpikeTarget.exec()
SpikeTarget.extensions
SpikeTarget.get_backend_config()
SpikeTarget.get_metrics()
SpikeTarget.get_platform_defs()
SpikeTarget.isa
SpikeTarget.parse_stdout()
SpikeTarget.spike_exe
SpikeTarget.spike_pk
SpikeTarget.spikepk_extra_args
filter_unsupported_extensions()
- mlonmcu.target.riscv.util module
- mlonmcu.target.riscv.vicuna module
VicunaTarget
VicunaTarget.DEFAULTS
VicunaTarget.FEATURES
VicunaTarget.REQUIRED
VicunaTarget.abort_cycles
VicunaTarget.core
VicunaTarget.dc_line_width
VicunaTarget.dc_size
VicunaTarget.exec()
VicunaTarget.extra_cycles
VicunaTarget.get_backend_config()
VicunaTarget.get_config_args()
VicunaTarget.get_metrics()
VicunaTarget.get_platform_defs()
VicunaTarget.get_target_system()
VicunaTarget.ic_line_width
VicunaTarget.ic_size
VicunaTarget.mem_latency
VicunaTarget.mem_size
VicunaTarget.mem_width
VicunaTarget.parse_exit()
VicunaTarget.parse_stdout()
VicunaTarget.prepare_simulator()
VicunaTarget.verilator_install_dir
VicunaTarget.vicuna_src_dir
VicunaTarget.vmem_width
VicunaTarget.vport_policy
VicunaTarget.vproc_config
VicunaTarget.vproc_pipelines
logger
- Module contents
AraRtlTarget
AraRtlTarget.DEFAULTS
AraRtlTarget.FEATURES
AraRtlTarget.OPTIONAL
AraRtlTarget.REQUIRED
AraRtlTarget.ara_apps_dir
AraRtlTarget.ara_hardware_dir
AraRtlTarget.elen
AraRtlTarget.embedded_vext
AraRtlTarget.enable_vext
AraRtlTarget.exec()
AraRtlTarget.extensions
AraRtlTarget.get_backend_config()
AraRtlTarget.get_metrics()
AraRtlTarget.get_platform_defs()
AraRtlTarget.get_target_system()
AraRtlTarget.limit_cycles
AraRtlTarget.nr_lanes
AraRtlTarget.num_threads
AraRtlTarget.parse_exit()
AraRtlTarget.parse_stdout()
AraRtlTarget.prepare_simulator()
AraRtlTarget.questasim_install_dir
AraRtlTarget.spike_install_dir
AraRtlTarget.verilator_install_dir
AraRtlTarget.vext_spec
AraRtlTarget.vlen
AraTarget
AraTarget.DEFAULTS
AraTarget.FEATURES
AraTarget.OPTIONAL
AraTarget.REQUIRED
AraTarget.ara_apps_dir
AraTarget.ara_hardware_dir
AraTarget.ara_verilator_tb
AraTarget.elen
AraTarget.embedded_vext
AraTarget.enable_vext
AraTarget.exec()
AraTarget.extensions
AraTarget.get_backend_config()
AraTarget.get_metrics()
AraTarget.get_platform_defs()
AraTarget.get_target_system()
AraTarget.limit_cycles
AraTarget.nr_lanes
AraTarget.num_threads
AraTarget.parse_exit()
AraTarget.parse_stdout()
AraTarget.prepare_simulator()
AraTarget.verilator_install_dir
AraTarget.vext_spec
AraTarget.vlen
COREVOVPSimTarget
COREVOVPSimTarget.DEFAULTS
COREVOVPSimTarget.FEATURES
COREVOVPSimTarget.REQUIRED
COREVOVPSimTarget.attr
COREVOVPSimTarget.enable_xcorevalu
COREVOVPSimTarget.enable_xcorevbi
COREVOVPSimTarget.enable_xcorevbitmanip
COREVOVPSimTarget.enable_xcorevhwlp
COREVOVPSimTarget.enable_xcorevmac
COREVOVPSimTarget.enable_xcorevmem
COREVOVPSimTarget.enable_xcorevsimd
COREVOVPSimTarget.end_to_end_cycles
COREVOVPSimTarget.exec()
COREVOVPSimTarget.extensions
COREVOVPSimTarget.gdbserver_attach
COREVOVPSimTarget.gdbserver_enable
COREVOVPSimTarget.gdbserver_port
COREVOVPSimTarget.get_backend_config()
COREVOVPSimTarget.get_default_ovpsim_args()
COREVOVPSimTarget.get_metrics()
COREVOVPSimTarget.get_platform_defs()
COREVOVPSimTarget.ovpsim_exe
COREVOVPSimTarget.parse_exit()
COREVOVPSimTarget.parse_stdout()
COREVOVPSimTarget.processor
COREVOVPSimTarget.variant
CV32E40PTarget
CV32E40PTarget.DEFAULTS
CV32E40PTarget.FEATURES
CV32E40PTarget.REQUIRED
CV32E40PTarget.attr
CV32E40PTarget.enable_xcorevalu
CV32E40PTarget.enable_xcorevbi
CV32E40PTarget.enable_xcorevbitmanip
CV32E40PTarget.enable_xcorevhwlp
CV32E40PTarget.enable_xcorevmac
CV32E40PTarget.enable_xcorevmem
CV32E40PTarget.enable_xcorevsimd
CV32E40PTarget.exec()
CV32E40PTarget.extensions
CV32E40PTarget.get_backend_config()
CV32E40PTarget.get_metrics()
CV32E40PTarget.get_platform_defs()
CV32E40PTarget.get_target_system()
CV32E40PTarget.parse_exit()
CV32E40PTarget.parse_stdout()
CV32E40PTarget.verilator_executable
EtissPulpinoTarget
EtissTarget
EtissTarget.DEFAULTS
EtissTarget.FEATURES
EtissTarget.REQUIRED
EtissTarget.allow_error
EtissTarget.attr
EtissTarget.cpu_arch
EtissTarget.cycle_time_ps
EtissTarget.debug_etiss
EtissTarget.elen
EtissTarget.embedded_vext
EtissTarget.enable_pext
EtissTarget.enable_vext
EtissTarget.enable_xcorevalu
EtissTarget.enable_xcorevbi
EtissTarget.enable_xcorevbitmanip
EtissTarget.enable_xcorevhwlp
EtissTarget.enable_xcorevmac
EtissTarget.enable_xcorevmem
EtissTarget.enable_xcorevsimd
EtissTarget.etiss_dir
EtissTarget.etiss_script
EtissTarget.etiss_src_dir
EtissTarget.exec()
EtissTarget.extensions
EtissTarget.extra_bool_config
EtissTarget.extra_int_config
EtissTarget.extra_plugin_config
EtissTarget.extra_string_config
EtissTarget.gdbserver_attach
EtissTarget.gdbserver_enable
EtissTarget.gdbserver_port
EtissTarget.get_backend_config()
EtissTarget.get_ini_bool_config()
EtissTarget.get_ini_int_config()
EtissTarget.get_ini_plugin_config()
EtissTarget.get_ini_string_config()
EtissTarget.get_metrics()
EtissTarget.get_platform_defs()
EtissTarget.get_target_system()
EtissTarget.jit
EtissTarget.max_block_size
EtissTarget.parse_exit()
EtissTarget.parse_stdout()
EtissTarget.pext_spec
EtissTarget.plugins
EtissTarget.ram_size
EtissTarget.ram_start
EtissTarget.rom_size
EtissTarget.rom_start
EtissTarget.trace_memory
EtissTarget.verbose
EtissTarget.vext_spec
EtissTarget.vlen
EtissTarget.write_ini()
GvsocPulpTarget
GvsocPulpTarget.DEFAULTS
GvsocPulpTarget.FEATURES
GvsocPulpTarget.REQUIRED
GvsocPulpTarget.abi
GvsocPulpTarget.exec()
GvsocPulpTarget.extensions
GvsocPulpTarget.get_backend_config()
GvsocPulpTarget.get_basic_gvsoc_simulating_arg()
GvsocPulpTarget.get_metrics()
GvsocPulpTarget.get_platform_defs()
GvsocPulpTarget.get_target_system()
GvsocPulpTarget.gvsoc_folder
GvsocPulpTarget.gvsoc_preparation_env()
GvsocPulpTarget.gvsoc_script
GvsocPulpTarget.model
GvsocPulpTarget.parse_stdout()
GvsocPulpTarget.pulp_freertos_config_dir
GvsocPulpTarget.pulp_freertos_install_dir
GvsocPulpTarget.pulp_freertos_support_dir
GvsocPulpTarget.xpulp_version
OVPSimTarget
OVPSimTarget.DEFAULTS
OVPSimTarget.FEATURES
OVPSimTarget.REQUIRED
OVPSimTarget.end_to_end_cycles
OVPSimTarget.exec()
OVPSimTarget.extensions
OVPSimTarget.gdbserver_attach
OVPSimTarget.gdbserver_enable
OVPSimTarget.gdbserver_port
OVPSimTarget.get_backend_config()
OVPSimTarget.get_default_ovpsim_args()
OVPSimTarget.get_metrics()
OVPSimTarget.get_platform_defs()
OVPSimTarget.ovpsim_exe
OVPSimTarget.parse_stdout()
OVPSimTarget.variant
RiscvQemuTarget
RiscvQemuTarget.DEFAULTS
RiscvQemuTarget.FEATURES
RiscvQemuTarget.REQUIRED
RiscvQemuTarget.attr
RiscvQemuTarget.elen
RiscvQemuTarget.embedded_vext
RiscvQemuTarget.enable_vext
RiscvQemuTarget.exec()
RiscvQemuTarget.extensions
RiscvQemuTarget.get_cpu_str()
RiscvQemuTarget.get_metrics()
RiscvQemuTarget.get_platform_defs()
RiscvQemuTarget.get_qemu_args()
RiscvQemuTarget.get_target_system()
RiscvQemuTarget.parse_stdout()
RiscvQemuTarget.riscv32_qemu_exe
RiscvQemuTarget.vext_spec
RiscvQemuTarget.vlen
SpikeTarget
SpikeTarget.DEFAULTS
SpikeTarget.FEATURES
SpikeTarget.REQUIRED
SpikeTarget.exec()
SpikeTarget.extensions
SpikeTarget.get_backend_config()
SpikeTarget.get_metrics()
SpikeTarget.get_platform_defs()
SpikeTarget.isa
SpikeTarget.parse_stdout()
SpikeTarget.spike_exe
SpikeTarget.spike_pk
SpikeTarget.spikepk_extra_args
VicunaTarget
VicunaTarget.DEFAULTS
VicunaTarget.FEATURES
VicunaTarget.REQUIRED
VicunaTarget.abort_cycles
VicunaTarget.core
VicunaTarget.dc_line_width
VicunaTarget.dc_size
VicunaTarget.exec()
VicunaTarget.extra_cycles
VicunaTarget.get_backend_config()
VicunaTarget.get_config_args()
VicunaTarget.get_metrics()
VicunaTarget.get_platform_defs()
VicunaTarget.get_target_system()
VicunaTarget.ic_line_width
VicunaTarget.ic_size
VicunaTarget.mem_latency
VicunaTarget.mem_size
VicunaTarget.mem_width
VicunaTarget.parse_exit()
VicunaTarget.parse_stdout()
VicunaTarget.prepare_simulator()
VicunaTarget.verilator_install_dir
VicunaTarget.vicuna_src_dir
VicunaTarget.vmem_width
VicunaTarget.vport_policy
VicunaTarget.vproc_config
VicunaTarget.vproc_pipelines
Submodules
mlonmcu.target.bench module
Helper functions for benchmarking.
mlonmcu.target.common module
Helper functions used by MLonMCU targets
- mlonmcu.target.common.add_common_options(parser: ArgumentParser, target)[source]
Add a set of common options to a command line parser.
- Parameters:
- parserargparse.ArgumentParser
The command line parser
- mlonmcu.target.common.cli(target, args: List[str] | None = None)[source]
Utility to handle the command line api for targets.
- Parameters:
- targetTarget
The target to be used.
- argslist
Interface to pass arguments to the command line parser from test functions.
mlonmcu.target.elf module
ELF File Tool
- mlonmcu.target.elf.logger = <Logger mlonmcu (INFO)>
Script to gather metrics on static ROM and RAM usage.
Heavility inspired by get_metrics.py found in the ETISS repository
mlonmcu.target.host_x86 module
MLonMCU Host/x86 Target definitions
- class mlonmcu.target.host_x86.HostX86Target(name='host_x86', features=None, config=None)[source]
Bases:
Target
Target using the x86 host system
Mainly interesting to easy testing and debugging because benchmarking is not possible.
- DEFAULTS = {'gdbserver_attach': False, 'gdbserver_enable': False, 'gdbserver_port': 2222, 'print_outputs': False, 'repeat': None}
- FEATURES = {'benchmark', 'gdbserver'}
- property gdbserver_attach
- property gdbserver_enable
- property gdbserver_port
mlonmcu.target.metrics module
mlonmcu.target.target module
MLonMCU Target definitions
- class mlonmcu.target.target.Target(name: str, features: List[Feature] | None = None, config: dict | None = None)[source]
Bases:
object
Base target class
- Attributes:
- namestr
Default name of the target
- featureslist
List of target features which should be enabled
- configdict
User config defined via key-value pairs
- inspect_programstr
Program which can be used to inspect executables (i.e. readelf)
- inspect_program_argslist
List of additional arguments to the inspect_program
- envos._Environ
Optinal map of environment variables
- DEFAULTS = {'print_outputs': False, 'repeat': None}
- FEATURES = {'benchmark'}
- OPTIONAL = {}
- REQUIRED = {}
- exec(program: Path, *args, cwd='/home/runner/work/mlonmcu/mlonmcu/docs', **kwargs)[source]
Use target to execute a executable with given arguments
- property print_outputs
- property repeat
Module contents
MLonMCU target submodule
- class mlonmcu.target.Corstone300Target(name='corstone300', features=None, config=None)[source]
Bases:
Target
Target using an ARM FVP (fixed virtual platform) based on a Cortex M55 with EthosU support
- DEFAULTS = {'enable_dsp': False, 'enable_ethosu': False, 'enable_fpu': True, 'enable_mvei': False, 'ethosu_num_macs': 256, 'extra_args': '', 'model': 'cortex-m55', 'print_outputs': False, 'repeat': None, 'timeout_sec': 0}
- FEATURES = {'arm_dsp', 'arm_mvei', 'ethosu'}
- REQUIRED = {'arm_gcc.install_dir', 'cmsis.dir', 'cmsisnn.dir', 'corstone300.exe', 'ethosu_platform.dir'}
- property cmsis_dir
- property cmsisnn_dir
- property enable_dsp
- property enable_ethosu
- property enable_fpu
- property enable_mvei
- property ethosu_num_macs
- property ethosu_platform_dir
- exec(program, *args, cwd='/home/runner/work/mlonmcu/mlonmcu/docs', **kwargs)[source]
Use target to execute a executable with given arguments
- property extra_args
- property fvp_exe
- property gcc_prefix
- property model
- property timeout_sec
- class mlonmcu.target.EtissPulpinoTarget(name='etiss_pulpino', features=None, config=None)[source]
Bases:
EtissTarget
Target using a Pulpino-like VP running in the ETISS simulator
- REQUIRED = {'etiss.install_dir', 'etiss.src_dir', 'etissvp.script', 'riscv_gcc.install_dir', 'riscv_gcc.name', 'riscv_gcc.variant'}
- class mlonmcu.target.HostX86Target(name='host_x86', features=None, config=None)[source]
Bases:
Target
Target using the x86 host system
Mainly interesting to easy testing and debugging because benchmarking is not possible.
- DEFAULTS = {'gdbserver_attach': False, 'gdbserver_enable': False, 'gdbserver_port': 2222, 'print_outputs': False, 'repeat': None}
- FEATURES = {'benchmark', 'gdbserver'}
- property gdbserver_attach
- property gdbserver_enable
- property gdbserver_port
- class mlonmcu.target.OVPSimTarget(name='ovpsim', features=None, config=None)[source]
-
Target using an ARM FVP (fixed virtual platform) based on a Cortex M55 with EthosU support
- DEFAULTS = {'abi': None, 'arch': None, 'atomic': True, 'attr': '', 'bitmanip_spec': 0.94, 'compressed': True, 'cpu': None, 'elen': 64, 'embedded': False, 'embedded_vext': False, 'enable_pext': False, 'enable_vext': False, 'end_to_end_cycles': True, 'extensions': [], 'extra_args': '', 'fpu': 'double', 'gdbserver_attach': False, 'gdbserver_enable': False, 'gdbserver_port': 2222, 'multiply': True, 'pext_spec': 0.92, 'print_outputs': False, 'repeat': None, 'timeout_sec': 0, 'variant': None, 'vext_spec': 1.0, 'vlen': 128, 'xlen': 32}
- FEATURES = {'benchmark', 'gdbserver', 'log_instrs', 'pext', 'trace', 'vext'}
- REQUIRED = {'ovpsim.exe', 'riscv_gcc.install_dir', 'riscv_gcc.name', 'riscv_gcc.variant'}
- property end_to_end_cycles
- exec(program, *args, cwd='/home/runner/work/mlonmcu/mlonmcu/docs', **kwargs)[source]
Use target to execute a executable with given arguments
- property extensions
- property gdbserver_attach
- property gdbserver_enable
- property gdbserver_port
- property ovpsim_exe
- property variant
- class mlonmcu.target.RiscvQemuTarget(name='riscv_qemu', features=None, config=None)[source]
Bases:
RISCVTarget
Target using a spike machine in the QEMU simulator
- DEFAULTS = {'abi': None, 'arch': None, 'atomic': True, 'attr': '', 'compressed': True, 'cpu': None, 'elen': 32, 'embedded': False, 'embedded_vext': False, 'enable_vext': False, 'extensions': [], 'extra_args': '', 'fpu': 'double', 'multiply': True, 'print_outputs': False, 'repeat': None, 'timeout_sec': 0, 'vext_spec': 1.0, 'vlen': 0, 'xlen': 32}
- FEATURES = {'benchmark', 'vext'}
- REQUIRED = {'riscv32_qemu.exe', 'riscv_gcc.install_dir', 'riscv_gcc.name', 'riscv_gcc.variant'}
- property attr
- property elen
- property embedded_vext
- property enable_vext
- exec(program, *args, cwd='/home/runner/work/mlonmcu/mlonmcu/docs', **kwargs)[source]
Use target to execute a executable with given arguments
- property extensions
- property riscv32_qemu_exe
- property vext_spec
- property vlen
- class mlonmcu.target.SpikeTarget(name='spike', features=None, config=None)[source]
Bases:
RVPTarget
,RVVTarget
,RVBTarget
Target using the riscv-isa-sim (Spike) RISC-V simulator.
- DEFAULTS = {'abi': None, 'arch': None, 'atomic': True, 'attr': '', 'bext_spec': 0.92, 'bext_zba': False, 'bext_zbb': False, 'bext_zbc': False, 'bext_zbs': False, 'compressed': True, 'cpu': None, 'elen': 64, 'embedded': False, 'embedded_vext': False, 'enable_bext': False, 'enable_pext': False, 'enable_vext': False, 'extensions': [], 'extra_args': '', 'fpu': 'double', 'multiply': True, 'pext_spec': 0.92, 'print_outputs': False, 'repeat': None, 'spikepk_extra_args': [], 'timeout_sec': 0, 'vext_spec': 1.0, 'vlen': 128, 'xlen': 32}
- FEATURES = {'benchmark', 'bext', 'cachesim', 'log_instrs', 'pext', 'vext'}
- REQUIRED = {'riscv_gcc.install_dir', 'riscv_gcc.name', 'riscv_gcc.variant', 'spike.exe', 'spike.pk'}
- exec(program, *args, cwd='/home/runner/work/mlonmcu/mlonmcu/docs', **kwargs)[source]
Use target to execute a executable with given arguments
- property extensions
- property isa
- property spike_exe
- property spike_pk
- property spikepk_extra_args
- class mlonmcu.target.Target(name: str, features: List[Feature] | None = None, config: dict | None = None)[source]
Bases:
object
Base target class
- Attributes:
- namestr
Default name of the target
- featureslist
List of target features which should be enabled
- configdict
User config defined via key-value pairs
- inspect_programstr
Program which can be used to inspect executables (i.e. readelf)
- inspect_program_argslist
List of additional arguments to the inspect_program
- envos._Environ
Optinal map of environment variables
- DEFAULTS = {'print_outputs': False, 'repeat': None}
- FEATURES = {'benchmark'}
- OPTIONAL = {}
- REQUIRED = {}
- exec(program: Path, *args, cwd='/home/runner/work/mlonmcu/mlonmcu/docs', **kwargs)[source]
Use target to execute a executable with given arguments
- property print_outputs
- property repeat