mlonmcu.target package
Subpackages
- mlonmcu.target.arm package
- Submodules
- mlonmcu.target.arm.corstone300 module
Corstone300TargetCorstone300Target.DEFAULTSCorstone300Target.FEATURESCorstone300Target.REQUIREDCorstone300Target.cmsis_dirCorstone300Target.cmsisnn_dirCorstone300Target.enable_dspCorstone300Target.enable_ethosuCorstone300Target.enable_fpuCorstone300Target.enable_mveiCorstone300Target.ethosu_num_macsCorstone300Target.ethosu_platform_dirCorstone300Target.exec()Corstone300Target.extra_argsCorstone300Target.fvp_exeCorstone300Target.gcc_prefixCorstone300Target.get_arch()Corstone300Target.get_backend_config()Corstone300Target.get_default_fvp_args()Corstone300Target.get_ethosu_fvp_args()Corstone300Target.get_metrics()Corstone300Target.get_platform_defs()Corstone300Target.modelCorstone300Target.parse_stdout()Corstone300Target.timeout_sec
- mlonmcu.target.arm.util module
- Module contents
Corstone300TargetCorstone300Target.DEFAULTSCorstone300Target.FEATURESCorstone300Target.REQUIREDCorstone300Target.cmsis_dirCorstone300Target.cmsisnn_dirCorstone300Target.enable_dspCorstone300Target.enable_ethosuCorstone300Target.enable_fpuCorstone300Target.enable_mveiCorstone300Target.ethosu_num_macsCorstone300Target.ethosu_platform_dirCorstone300Target.exec()Corstone300Target.extra_argsCorstone300Target.fvp_exeCorstone300Target.gcc_prefixCorstone300Target.get_arch()Corstone300Target.get_backend_config()Corstone300Target.get_default_fvp_args()Corstone300Target.get_ethosu_fvp_args()Corstone300Target.get_metrics()Corstone300Target.get_platform_defs()Corstone300Target.modelCorstone300Target.parse_stdout()Corstone300Target.timeout_sec
- mlonmcu.target.riscv package
- Submodules
- mlonmcu.target.riscv.ara module
AraTargetAraTarget.DEFAULTSAraTarget.FEATURESAraTarget.OPTIONALAraTarget.REQUIREDAraTarget.ara_apps_dirAraTarget.ara_hardware_dirAraTarget.ara_verilator_tbAraTarget.elenAraTarget.embedded_vextAraTarget.enable_vextAraTarget.exec()AraTarget.extensionsAraTarget.get_backend_config()AraTarget.get_metrics()AraTarget.get_platform_defs()AraTarget.get_target_system()AraTarget.limit_cyclesAraTarget.nr_lanesAraTarget.num_threadsAraTarget.parse_exit()AraTarget.parse_stdout()AraTarget.prepare_simulator()AraTarget.verilator_install_dirAraTarget.vext_specAraTarget.vlen
- mlonmcu.target.riscv.ara_rtl module
AraRtlTargetAraRtlTarget.DEFAULTSAraRtlTarget.FEATURESAraRtlTarget.OPTIONALAraRtlTarget.REQUIREDAraRtlTarget.ara_apps_dirAraRtlTarget.ara_hardware_dirAraRtlTarget.elenAraRtlTarget.embedded_vextAraRtlTarget.enable_vextAraRtlTarget.exec()AraRtlTarget.extensionsAraRtlTarget.get_backend_config()AraRtlTarget.get_metrics()AraRtlTarget.get_platform_defs()AraRtlTarget.get_target_system()AraRtlTarget.limit_cyclesAraRtlTarget.nr_lanesAraRtlTarget.num_threadsAraRtlTarget.parse_exit()AraRtlTarget.parse_stdout()AraRtlTarget.prepare_simulator()AraRtlTarget.questasim_install_dirAraRtlTarget.spike_install_dirAraRtlTarget.verilator_install_dirAraRtlTarget.vext_specAraRtlTarget.vlen
- mlonmcu.target.riscv.corev_ovpsim module
COREVOVPSimTargetCOREVOVPSimTarget.DEFAULTSCOREVOVPSimTarget.FEATURESCOREVOVPSimTarget.REQUIREDCOREVOVPSimTarget.attrCOREVOVPSimTarget.enable_xcorevaluCOREVOVPSimTarget.enable_xcorevbiCOREVOVPSimTarget.enable_xcorevbitmanipCOREVOVPSimTarget.enable_xcorevhwlpCOREVOVPSimTarget.enable_xcorevmacCOREVOVPSimTarget.enable_xcorevmemCOREVOVPSimTarget.enable_xcorevsimdCOREVOVPSimTarget.end_to_end_cyclesCOREVOVPSimTarget.exec()COREVOVPSimTarget.extensionsCOREVOVPSimTarget.gdbserver_attachCOREVOVPSimTarget.gdbserver_enableCOREVOVPSimTarget.gdbserver_portCOREVOVPSimTarget.get_backend_config()COREVOVPSimTarget.get_default_ovpsim_args()COREVOVPSimTarget.get_metrics()COREVOVPSimTarget.get_platform_defs()COREVOVPSimTarget.ovpsim_exeCOREVOVPSimTarget.parse_exit()COREVOVPSimTarget.parse_stdout()COREVOVPSimTarget.processorCOREVOVPSimTarget.variant
replace_unsupported()
- mlonmcu.target.riscv.cv32e40p module
CV32E40PTargetCV32E40PTarget.DEFAULTSCV32E40PTarget.FEATURESCV32E40PTarget.REQUIREDCV32E40PTarget.attrCV32E40PTarget.enable_xcorevaluCV32E40PTarget.enable_xcorevbiCV32E40PTarget.enable_xcorevbitmanipCV32E40PTarget.enable_xcorevhwlpCV32E40PTarget.enable_xcorevmacCV32E40PTarget.enable_xcorevmemCV32E40PTarget.enable_xcorevsimdCV32E40PTarget.exec()CV32E40PTarget.extensionsCV32E40PTarget.get_backend_config()CV32E40PTarget.get_metrics()CV32E40PTarget.get_platform_defs()CV32E40PTarget.get_target_system()CV32E40PTarget.parse_exit()CV32E40PTarget.parse_stdout()CV32E40PTarget.verilator_executable
- mlonmcu.target.riscv.etiss module
EtissTargetEtissTarget.DEFAULTSEtissTarget.FEATURESEtissTarget.REQUIREDEtissTarget.allow_errorEtissTarget.attrEtissTarget.cpu_archEtissTarget.cycle_time_psEtissTarget.debug_etissEtissTarget.elenEtissTarget.embedded_vextEtissTarget.enable_pextEtissTarget.enable_vextEtissTarget.enable_xcorevaluEtissTarget.enable_xcorevbiEtissTarget.enable_xcorevbitmanipEtissTarget.enable_xcorevhwlpEtissTarget.enable_xcorevmacEtissTarget.enable_xcorevmemEtissTarget.enable_xcorevsimdEtissTarget.etiss_dirEtissTarget.etiss_scriptEtissTarget.etiss_src_dirEtissTarget.exec()EtissTarget.extensionsEtissTarget.extra_bool_configEtissTarget.extra_int_configEtissTarget.extra_plugin_configEtissTarget.extra_string_configEtissTarget.gdbserver_attachEtissTarget.gdbserver_enableEtissTarget.gdbserver_portEtissTarget.get_backend_config()EtissTarget.get_ini_bool_config()EtissTarget.get_ini_int_config()EtissTarget.get_ini_plugin_config()EtissTarget.get_ini_string_config()EtissTarget.get_metrics()EtissTarget.get_platform_defs()EtissTarget.get_target_system()EtissTarget.jitEtissTarget.max_block_sizeEtissTarget.parse_exit()EtissTarget.parse_stdout()EtissTarget.pext_specEtissTarget.pluginsEtissTarget.ram_sizeEtissTarget.ram_startEtissTarget.rom_sizeEtissTarget.rom_startEtissTarget.trace_memoryEtissTarget.verboseEtissTarget.vext_specEtissTarget.vlenEtissTarget.write_ini()
- mlonmcu.target.riscv.etiss_pulpino module
- mlonmcu.target.riscv.gvsoc_pulp module
GvsocPulpTargetGvsocPulpTarget.DEFAULTSGvsocPulpTarget.FEATURESGvsocPulpTarget.REQUIREDGvsocPulpTarget.abiGvsocPulpTarget.exec()GvsocPulpTarget.extensionsGvsocPulpTarget.get_backend_config()GvsocPulpTarget.get_basic_gvsoc_simulating_arg()GvsocPulpTarget.get_metrics()GvsocPulpTarget.get_platform_defs()GvsocPulpTarget.get_target_system()GvsocPulpTarget.gvsoc_folderGvsocPulpTarget.gvsoc_preparation_env()GvsocPulpTarget.gvsoc_scriptGvsocPulpTarget.modelGvsocPulpTarget.parse_stdout()GvsocPulpTarget.pulp_freertos_config_dirGvsocPulpTarget.pulp_freertos_install_dirGvsocPulpTarget.pulp_freertos_support_dirGvsocPulpTarget.xpulp_version
- mlonmcu.target.riscv.ovpsim module
OVPSimTargetOVPSimTarget.DEFAULTSOVPSimTarget.FEATURESOVPSimTarget.REQUIREDOVPSimTarget.end_to_end_cyclesOVPSimTarget.exec()OVPSimTarget.extensionsOVPSimTarget.gdbserver_attachOVPSimTarget.gdbserver_enableOVPSimTarget.gdbserver_portOVPSimTarget.get_backend_config()OVPSimTarget.get_default_ovpsim_args()OVPSimTarget.get_metrics()OVPSimTarget.get_platform_defs()OVPSimTarget.ovpsim_exeOVPSimTarget.parse_stdout()OVPSimTarget.variant
replace_unsupported()
- mlonmcu.target.riscv.riscv module
RISCVTargetRISCVTarget.DEFAULTSRISCVTarget.FEATURESRISCVTarget.OPTIONALRISCVTarget.PUPL_GCC_TOOLCHAIN_REQUIREDRISCVTarget.REQUIREDRISCVTarget.abiRISCVTarget.archRISCVTarget.atomicRISCVTarget.attrRISCVTarget.attrsRISCVTarget.compressedRISCVTarget.cpuRISCVTarget.embeddedRISCVTarget.extensionsRISCVTarget.extra_argsRISCVTarget.fpuRISCVTarget.gcc_archRISCVTarget.gcc_extensionsRISCVTarget.gcc_variantRISCVTarget.get_arch()RISCVTarget.get_backend_config()RISCVTarget.get_platform_defs()RISCVTarget.get_target_system()RISCVTarget.has_fpuRISCVTarget.llvm_archRISCVTarget.llvm_extensionsRISCVTarget.multiplyRISCVTarget.pulp_gcc_basenameRISCVTarget.pulp_gcc_prefixRISCVTarget.reconfigure()RISCVTarget.riscv_gcc_basenameRISCVTarget.riscv_gcc_prefixRISCVTarget.timeout_secRISCVTarget.toolchainRISCVTarget.xlen
- mlonmcu.target.riscv.riscv_bext_target module
- mlonmcu.target.riscv.riscv_pext_target module
- mlonmcu.target.riscv.riscv_qemu module
RiscvQemuTargetRiscvQemuTarget.DEFAULTSRiscvQemuTarget.FEATURESRiscvQemuTarget.REQUIREDRiscvQemuTarget.attrRiscvQemuTarget.elenRiscvQemuTarget.embedded_vextRiscvQemuTarget.enable_vextRiscvQemuTarget.exec()RiscvQemuTarget.extensionsRiscvQemuTarget.get_cpu_str()RiscvQemuTarget.get_metrics()RiscvQemuTarget.get_platform_defs()RiscvQemuTarget.get_qemu_args()RiscvQemuTarget.get_target_system()RiscvQemuTarget.parse_stdout()RiscvQemuTarget.riscv32_qemu_exeRiscvQemuTarget.vext_specRiscvQemuTarget.vlen
- mlonmcu.target.riscv.riscv_vext_target module
- mlonmcu.target.riscv.spike module
SpikeTargetSpikeTarget.DEFAULTSSpikeTarget.FEATURESSpikeTarget.REQUIREDSpikeTarget.exec()SpikeTarget.extensionsSpikeTarget.get_backend_config()SpikeTarget.get_metrics()SpikeTarget.get_platform_defs()SpikeTarget.isaSpikeTarget.parse_stdout()SpikeTarget.spike_exeSpikeTarget.spike_pkSpikeTarget.spikepk_extra_args
filter_unsupported_extensions()
- mlonmcu.target.riscv.util module
- mlonmcu.target.riscv.vicuna module
VicunaTargetVicunaTarget.DEFAULTSVicunaTarget.FEATURESVicunaTarget.REQUIREDVicunaTarget.abort_cyclesVicunaTarget.coreVicunaTarget.dc_line_widthVicunaTarget.dc_sizeVicunaTarget.exec()VicunaTarget.extra_cyclesVicunaTarget.get_backend_config()VicunaTarget.get_config_args()VicunaTarget.get_metrics()VicunaTarget.get_platform_defs()VicunaTarget.get_target_system()VicunaTarget.ic_line_widthVicunaTarget.ic_sizeVicunaTarget.mem_latencyVicunaTarget.mem_sizeVicunaTarget.mem_widthVicunaTarget.parse_exit()VicunaTarget.parse_stdout()VicunaTarget.prepare_simulator()VicunaTarget.verilator_install_dirVicunaTarget.vicuna_src_dirVicunaTarget.vmem_widthVicunaTarget.vport_policyVicunaTarget.vproc_configVicunaTarget.vproc_pipelines
logger
- Module contents
AraRtlTargetAraRtlTarget.DEFAULTSAraRtlTarget.FEATURESAraRtlTarget.OPTIONALAraRtlTarget.REQUIREDAraRtlTarget.ara_apps_dirAraRtlTarget.ara_hardware_dirAraRtlTarget.elenAraRtlTarget.embedded_vextAraRtlTarget.enable_vextAraRtlTarget.exec()AraRtlTarget.extensionsAraRtlTarget.get_backend_config()AraRtlTarget.get_metrics()AraRtlTarget.get_platform_defs()AraRtlTarget.get_target_system()AraRtlTarget.limit_cyclesAraRtlTarget.nr_lanesAraRtlTarget.num_threadsAraRtlTarget.parse_exit()AraRtlTarget.parse_stdout()AraRtlTarget.prepare_simulator()AraRtlTarget.questasim_install_dirAraRtlTarget.spike_install_dirAraRtlTarget.verilator_install_dirAraRtlTarget.vext_specAraRtlTarget.vlen
AraTargetAraTarget.DEFAULTSAraTarget.FEATURESAraTarget.OPTIONALAraTarget.REQUIREDAraTarget.ara_apps_dirAraTarget.ara_hardware_dirAraTarget.ara_verilator_tbAraTarget.elenAraTarget.embedded_vextAraTarget.enable_vextAraTarget.exec()AraTarget.extensionsAraTarget.get_backend_config()AraTarget.get_metrics()AraTarget.get_platform_defs()AraTarget.get_target_system()AraTarget.limit_cyclesAraTarget.nr_lanesAraTarget.num_threadsAraTarget.parse_exit()AraTarget.parse_stdout()AraTarget.prepare_simulator()AraTarget.verilator_install_dirAraTarget.vext_specAraTarget.vlen
COREVOVPSimTargetCOREVOVPSimTarget.DEFAULTSCOREVOVPSimTarget.FEATURESCOREVOVPSimTarget.REQUIREDCOREVOVPSimTarget.attrCOREVOVPSimTarget.enable_xcorevaluCOREVOVPSimTarget.enable_xcorevbiCOREVOVPSimTarget.enable_xcorevbitmanipCOREVOVPSimTarget.enable_xcorevhwlpCOREVOVPSimTarget.enable_xcorevmacCOREVOVPSimTarget.enable_xcorevmemCOREVOVPSimTarget.enable_xcorevsimdCOREVOVPSimTarget.end_to_end_cyclesCOREVOVPSimTarget.exec()COREVOVPSimTarget.extensionsCOREVOVPSimTarget.gdbserver_attachCOREVOVPSimTarget.gdbserver_enableCOREVOVPSimTarget.gdbserver_portCOREVOVPSimTarget.get_backend_config()COREVOVPSimTarget.get_default_ovpsim_args()COREVOVPSimTarget.get_metrics()COREVOVPSimTarget.get_platform_defs()COREVOVPSimTarget.ovpsim_exeCOREVOVPSimTarget.parse_exit()COREVOVPSimTarget.parse_stdout()COREVOVPSimTarget.processorCOREVOVPSimTarget.variant
CV32E40PTargetCV32E40PTarget.DEFAULTSCV32E40PTarget.FEATURESCV32E40PTarget.REQUIREDCV32E40PTarget.attrCV32E40PTarget.enable_xcorevaluCV32E40PTarget.enable_xcorevbiCV32E40PTarget.enable_xcorevbitmanipCV32E40PTarget.enable_xcorevhwlpCV32E40PTarget.enable_xcorevmacCV32E40PTarget.enable_xcorevmemCV32E40PTarget.enable_xcorevsimdCV32E40PTarget.exec()CV32E40PTarget.extensionsCV32E40PTarget.get_backend_config()CV32E40PTarget.get_metrics()CV32E40PTarget.get_platform_defs()CV32E40PTarget.get_target_system()CV32E40PTarget.parse_exit()CV32E40PTarget.parse_stdout()CV32E40PTarget.verilator_executable
EtissPulpinoTargetEtissTargetEtissTarget.DEFAULTSEtissTarget.FEATURESEtissTarget.REQUIREDEtissTarget.allow_errorEtissTarget.attrEtissTarget.cpu_archEtissTarget.cycle_time_psEtissTarget.debug_etissEtissTarget.elenEtissTarget.embedded_vextEtissTarget.enable_pextEtissTarget.enable_vextEtissTarget.enable_xcorevaluEtissTarget.enable_xcorevbiEtissTarget.enable_xcorevbitmanipEtissTarget.enable_xcorevhwlpEtissTarget.enable_xcorevmacEtissTarget.enable_xcorevmemEtissTarget.enable_xcorevsimdEtissTarget.etiss_dirEtissTarget.etiss_scriptEtissTarget.etiss_src_dirEtissTarget.exec()EtissTarget.extensionsEtissTarget.extra_bool_configEtissTarget.extra_int_configEtissTarget.extra_plugin_configEtissTarget.extra_string_configEtissTarget.gdbserver_attachEtissTarget.gdbserver_enableEtissTarget.gdbserver_portEtissTarget.get_backend_config()EtissTarget.get_ini_bool_config()EtissTarget.get_ini_int_config()EtissTarget.get_ini_plugin_config()EtissTarget.get_ini_string_config()EtissTarget.get_metrics()EtissTarget.get_platform_defs()EtissTarget.get_target_system()EtissTarget.jitEtissTarget.max_block_sizeEtissTarget.parse_exit()EtissTarget.parse_stdout()EtissTarget.pext_specEtissTarget.pluginsEtissTarget.ram_sizeEtissTarget.ram_startEtissTarget.rom_sizeEtissTarget.rom_startEtissTarget.trace_memoryEtissTarget.verboseEtissTarget.vext_specEtissTarget.vlenEtissTarget.write_ini()
GvsocPulpTargetGvsocPulpTarget.DEFAULTSGvsocPulpTarget.FEATURESGvsocPulpTarget.REQUIREDGvsocPulpTarget.abiGvsocPulpTarget.exec()GvsocPulpTarget.extensionsGvsocPulpTarget.get_backend_config()GvsocPulpTarget.get_basic_gvsoc_simulating_arg()GvsocPulpTarget.get_metrics()GvsocPulpTarget.get_platform_defs()GvsocPulpTarget.get_target_system()GvsocPulpTarget.gvsoc_folderGvsocPulpTarget.gvsoc_preparation_env()GvsocPulpTarget.gvsoc_scriptGvsocPulpTarget.modelGvsocPulpTarget.parse_stdout()GvsocPulpTarget.pulp_freertos_config_dirGvsocPulpTarget.pulp_freertos_install_dirGvsocPulpTarget.pulp_freertos_support_dirGvsocPulpTarget.xpulp_version
OVPSimTargetOVPSimTarget.DEFAULTSOVPSimTarget.FEATURESOVPSimTarget.REQUIREDOVPSimTarget.end_to_end_cyclesOVPSimTarget.exec()OVPSimTarget.extensionsOVPSimTarget.gdbserver_attachOVPSimTarget.gdbserver_enableOVPSimTarget.gdbserver_portOVPSimTarget.get_backend_config()OVPSimTarget.get_default_ovpsim_args()OVPSimTarget.get_metrics()OVPSimTarget.get_platform_defs()OVPSimTarget.ovpsim_exeOVPSimTarget.parse_stdout()OVPSimTarget.variant
RiscvQemuTargetRiscvQemuTarget.DEFAULTSRiscvQemuTarget.FEATURESRiscvQemuTarget.REQUIREDRiscvQemuTarget.attrRiscvQemuTarget.elenRiscvQemuTarget.embedded_vextRiscvQemuTarget.enable_vextRiscvQemuTarget.exec()RiscvQemuTarget.extensionsRiscvQemuTarget.get_cpu_str()RiscvQemuTarget.get_metrics()RiscvQemuTarget.get_platform_defs()RiscvQemuTarget.get_qemu_args()RiscvQemuTarget.get_target_system()RiscvQemuTarget.parse_stdout()RiscvQemuTarget.riscv32_qemu_exeRiscvQemuTarget.vext_specRiscvQemuTarget.vlen
SpikeTargetSpikeTarget.DEFAULTSSpikeTarget.FEATURESSpikeTarget.REQUIREDSpikeTarget.exec()SpikeTarget.extensionsSpikeTarget.get_backend_config()SpikeTarget.get_metrics()SpikeTarget.get_platform_defs()SpikeTarget.isaSpikeTarget.parse_stdout()SpikeTarget.spike_exeSpikeTarget.spike_pkSpikeTarget.spikepk_extra_args
VicunaTargetVicunaTarget.DEFAULTSVicunaTarget.FEATURESVicunaTarget.REQUIREDVicunaTarget.abort_cyclesVicunaTarget.coreVicunaTarget.dc_line_widthVicunaTarget.dc_sizeVicunaTarget.exec()VicunaTarget.extra_cyclesVicunaTarget.get_backend_config()VicunaTarget.get_config_args()VicunaTarget.get_metrics()VicunaTarget.get_platform_defs()VicunaTarget.get_target_system()VicunaTarget.ic_line_widthVicunaTarget.ic_sizeVicunaTarget.mem_latencyVicunaTarget.mem_sizeVicunaTarget.mem_widthVicunaTarget.parse_exit()VicunaTarget.parse_stdout()VicunaTarget.prepare_simulator()VicunaTarget.verilator_install_dirVicunaTarget.vicuna_src_dirVicunaTarget.vmem_widthVicunaTarget.vport_policyVicunaTarget.vproc_configVicunaTarget.vproc_pipelines
Submodules
mlonmcu.target.bench module
Helper functions for benchmarking.
mlonmcu.target.common module
Helper functions used by MLonMCU targets
- mlonmcu.target.common.add_common_options(parser: ArgumentParser, target)[source]
Add a set of common options to a command line parser.
- Parameters:
- parserargparse.ArgumentParser
The command line parser
- mlonmcu.target.common.cli(target, args: List[str] | None = None)[source]
Utility to handle the command line api for targets.
- Parameters:
- targetTarget
The target to be used.
- argslist
Interface to pass arguments to the command line parser from test functions.
mlonmcu.target.elf module
ELF File Tool
- mlonmcu.target.elf.logger = <Logger mlonmcu (INFO)>
Script to gather metrics on static ROM and RAM usage.
Heavility inspired by get_metrics.py found in the ETISS repository
mlonmcu.target.host_x86 module
MLonMCU Host/x86 Target definitions
- class mlonmcu.target.host_x86.HostX86Target(name='host_x86', features=None, config=None)[source]
Bases:
TargetTarget using the x86 host system
Mainly interesting to easy testing and debugging because benchmarking is not possible.
- DEFAULTS = {'gdbserver_attach': False, 'gdbserver_enable': False, 'gdbserver_port': 2222, 'print_outputs': False, 'repeat': None}
- FEATURES = {'benchmark', 'gdbserver'}
- property gdbserver_attach
- property gdbserver_enable
- property gdbserver_port
mlonmcu.target.metrics module
mlonmcu.target.target module
MLonMCU Target definitions
- class mlonmcu.target.target.Target(name: str, features: List[Feature] | None = None, config: dict | None = None)[source]
Bases:
objectBase target class
- Attributes:
- namestr
Default name of the target
- featureslist
List of target features which should be enabled
- configdict
User config defined via key-value pairs
- inspect_programstr
Program which can be used to inspect executables (i.e. readelf)
- inspect_program_argslist
List of additional arguments to the inspect_program
- envos._Environ
Optinal map of environment variables
- DEFAULTS = {'print_outputs': False, 'repeat': None}
- FEATURES = {'benchmark'}
- OPTIONAL = {}
- REQUIRED = {}
- exec(program: Path, *args, cwd='/home/runner/work/mlonmcu/mlonmcu/docs', **kwargs)[source]
Use target to execute a executable with given arguments
- property print_outputs
- property repeat
Module contents
MLonMCU target submodule
- class mlonmcu.target.Corstone300Target(name='corstone300', features=None, config=None)[source]
Bases:
TargetTarget using an ARM FVP (fixed virtual platform) based on a Cortex M55 with EthosU support
- DEFAULTS = {'enable_dsp': False, 'enable_ethosu': False, 'enable_fpu': True, 'enable_mvei': False, 'ethosu_num_macs': 256, 'extra_args': '', 'model': 'cortex-m55', 'print_outputs': False, 'repeat': None, 'timeout_sec': 0}
- FEATURES = {'arm_dsp', 'arm_mvei', 'ethosu'}
- REQUIRED = {'arm_gcc.install_dir', 'cmsis.dir', 'cmsisnn.dir', 'corstone300.exe', 'ethosu_platform.dir'}
- property cmsis_dir
- property cmsisnn_dir
- property enable_dsp
- property enable_ethosu
- property enable_fpu
- property enable_mvei
- property ethosu_num_macs
- property ethosu_platform_dir
- exec(program, *args, cwd='/home/runner/work/mlonmcu/mlonmcu/docs', **kwargs)[source]
Use target to execute a executable with given arguments
- property extra_args
- property fvp_exe
- property gcc_prefix
- property model
- property timeout_sec
- class mlonmcu.target.EtissPulpinoTarget(name='etiss_pulpino', features=None, config=None)[source]
Bases:
EtissTargetTarget using a Pulpino-like VP running in the ETISS simulator
- REQUIRED = {'etiss.install_dir', 'etiss.src_dir', 'etissvp.script', 'riscv_gcc.install_dir', 'riscv_gcc.name', 'riscv_gcc.variant'}
- class mlonmcu.target.HostX86Target(name='host_x86', features=None, config=None)[source]
Bases:
TargetTarget using the x86 host system
Mainly interesting to easy testing and debugging because benchmarking is not possible.
- DEFAULTS = {'gdbserver_attach': False, 'gdbserver_enable': False, 'gdbserver_port': 2222, 'print_outputs': False, 'repeat': None}
- FEATURES = {'benchmark', 'gdbserver'}
- property gdbserver_attach
- property gdbserver_enable
- property gdbserver_port
- class mlonmcu.target.OVPSimTarget(name='ovpsim', features=None, config=None)[source]
-
Target using an ARM FVP (fixed virtual platform) based on a Cortex M55 with EthosU support
- DEFAULTS = {'abi': None, 'arch': None, 'atomic': True, 'attr': '', 'bitmanip_spec': 0.94, 'compressed': True, 'cpu': None, 'elen': 64, 'embedded': False, 'embedded_vext': False, 'enable_pext': False, 'enable_vext': False, 'end_to_end_cycles': True, 'extensions': [], 'extra_args': '', 'fpu': 'double', 'gdbserver_attach': False, 'gdbserver_enable': False, 'gdbserver_port': 2222, 'multiply': True, 'pext_spec': 0.92, 'print_outputs': False, 'repeat': None, 'timeout_sec': 0, 'variant': None, 'vext_spec': 1.0, 'vlen': 128, 'xlen': 32}
- FEATURES = {'benchmark', 'gdbserver', 'log_instrs', 'pext', 'trace', 'vext'}
- REQUIRED = {'ovpsim.exe', 'riscv_gcc.install_dir', 'riscv_gcc.name', 'riscv_gcc.variant'}
- property end_to_end_cycles
- exec(program, *args, cwd='/home/runner/work/mlonmcu/mlonmcu/docs', **kwargs)[source]
Use target to execute a executable with given arguments
- property extensions
- property gdbserver_attach
- property gdbserver_enable
- property gdbserver_port
- property ovpsim_exe
- property variant
- class mlonmcu.target.RiscvQemuTarget(name='riscv_qemu', features=None, config=None)[source]
Bases:
RISCVTargetTarget using a spike machine in the QEMU simulator
- DEFAULTS = {'abi': None, 'arch': None, 'atomic': True, 'attr': '', 'compressed': True, 'cpu': None, 'elen': 32, 'embedded': False, 'embedded_vext': False, 'enable_vext': False, 'extensions': [], 'extra_args': '', 'fpu': 'double', 'multiply': True, 'print_outputs': False, 'repeat': None, 'timeout_sec': 0, 'vext_spec': 1.0, 'vlen': 0, 'xlen': 32}
- FEATURES = {'benchmark', 'vext'}
- REQUIRED = {'riscv32_qemu.exe', 'riscv_gcc.install_dir', 'riscv_gcc.name', 'riscv_gcc.variant'}
- property attr
- property elen
- property embedded_vext
- property enable_vext
- exec(program, *args, cwd='/home/runner/work/mlonmcu/mlonmcu/docs', **kwargs)[source]
Use target to execute a executable with given arguments
- property extensions
- property riscv32_qemu_exe
- property vext_spec
- property vlen
- class mlonmcu.target.SpikeTarget(name='spike', features=None, config=None)[source]
Bases:
RVPTarget,RVVTarget,RVBTargetTarget using the riscv-isa-sim (Spike) RISC-V simulator.
- DEFAULTS = {'abi': None, 'arch': None, 'atomic': True, 'attr': '', 'bext_spec': 0.92, 'bext_zba': False, 'bext_zbb': False, 'bext_zbc': False, 'bext_zbs': False, 'compressed': True, 'cpu': None, 'elen': 64, 'embedded': False, 'embedded_vext': False, 'enable_bext': False, 'enable_pext': False, 'enable_vext': False, 'extensions': [], 'extra_args': '', 'fpu': 'double', 'multiply': True, 'pext_spec': 0.92, 'print_outputs': False, 'repeat': None, 'spikepk_extra_args': [], 'timeout_sec': 0, 'vext_spec': 1.0, 'vlen': 128, 'xlen': 32}
- FEATURES = {'benchmark', 'bext', 'cachesim', 'log_instrs', 'pext', 'vext'}
- REQUIRED = {'riscv_gcc.install_dir', 'riscv_gcc.name', 'riscv_gcc.variant', 'spike.exe', 'spike.pk'}
- exec(program, *args, cwd='/home/runner/work/mlonmcu/mlonmcu/docs', **kwargs)[source]
Use target to execute a executable with given arguments
- property extensions
- property isa
- property spike_exe
- property spike_pk
- property spikepk_extra_args
- class mlonmcu.target.Target(name: str, features: List[Feature] | None = None, config: dict | None = None)[source]
Bases:
objectBase target class
- Attributes:
- namestr
Default name of the target
- featureslist
List of target features which should be enabled
- configdict
User config defined via key-value pairs
- inspect_programstr
Program which can be used to inspect executables (i.e. readelf)
- inspect_program_argslist
List of additional arguments to the inspect_program
- envos._Environ
Optinal map of environment variables
- DEFAULTS = {'print_outputs': False, 'repeat': None}
- FEATURES = {'benchmark'}
- OPTIONAL = {}
- REQUIRED = {}
- exec(program: Path, *args, cwd='/home/runner/work/mlonmcu/mlonmcu/docs', **kwargs)[source]
Use target to execute a executable with given arguments
- property print_outputs
- property repeat