13 #error "HTM instruction set not enabled"
26 #define _HTM_STATE(CR0) ((CR0 >> 1) & 0x3)
27 #define _HTM_NONTRANSACTIONAL 0x0
28 #define _HTM_SUSPENDED 0x1
29 #define _HTM_TRANSACTIONAL 0x2
31 #define _TEXASR_EXTRACT_BITS(TEXASR,BITNUM,SIZE) \
32 (((TEXASR) >> (63-(BITNUM))) & ((1<<(SIZE))-1))
33 #define _TEXASRU_EXTRACT_BITS(TEXASR,BITNUM,SIZE) \
34 (((TEXASR) >> (31-(BITNUM))) & ((1<<(SIZE))-1))
36 #define _TEXASR_FAILURE_CODE(TEXASR) \
37 _TEXASR_EXTRACT_BITS(TEXASR, 7, 8)
38 #define _TEXASRU_FAILURE_CODE(TEXASRU) \
39 _TEXASRU_EXTRACT_BITS(TEXASRU, 7, 8)
41 #define _TEXASR_FAILURE_PERSISTENT(TEXASR) \
42 _TEXASR_EXTRACT_BITS(TEXASR, 7, 1)
43 #define _TEXASRU_FAILURE_PERSISTENT(TEXASRU) \
44 _TEXASRU_EXTRACT_BITS(TEXASRU, 7, 1)
46 #define _TEXASR_DISALLOWED(TEXASR) \
47 _TEXASR_EXTRACT_BITS(TEXASR, 8, 1)
48 #define _TEXASRU_DISALLOWED(TEXASRU) \
49 _TEXASRU_EXTRACT_BITS(TEXASRU, 8, 1)
51 #define _TEXASR_NESTING_OVERFLOW(TEXASR) \
52 _TEXASR_EXTRACT_BITS(TEXASR, 9, 1)
53 #define _TEXASRU_NESTING_OVERFLOW(TEXASRU) \
54 _TEXASRU_EXTRACT_BITS(TEXASRU, 9, 1)
56 #define _TEXASR_FOOTPRINT_OVERFLOW(TEXASR) \
57 _TEXASR_EXTRACT_BITS(TEXASR, 10, 1)
58 #define _TEXASRU_FOOTPRINT_OVERFLOW(TEXASRU) \
59 _TEXASRU_EXTRACT_BITS(TEXASRU, 10, 1)
61 #define _TEXASR_SELF_INDUCED_CONFLICT(TEXASR) \
62 _TEXASR_EXTRACT_BITS(TEXASR, 11, 1)
63 #define _TEXASRU_SELF_INDUCED_CONFLICT(TEXASRU) \
64 _TEXASRU_EXTRACT_BITS(TEXASRU, 11, 1)
66 #define _TEXASR_NON_TRANSACTIONAL_CONFLICT(TEXASR) \
67 _TEXASR_EXTRACT_BITS(TEXASR, 12, 1)
68 #define _TEXASRU_NON_TRANSACTIONAL_CONFLICT(TEXASRU) \
69 _TEXASRU_EXTRACT_BITS(TEXASRU, 12, 1)
71 #define _TEXASR_TRANSACTION_CONFLICT(TEXASR) \
72 _TEXASR_EXTRACT_BITS(TEXASR, 13, 1)
73 #define _TEXASRU_TRANSACTION_CONFLICT(TEXASRU) \
74 _TEXASRU_EXTRACT_BITS(TEXASRU, 13, 1)
76 #define _TEXASR_TRANSLATION_INVALIDATION_CONFLICT(TEXASR) \
77 _TEXASR_EXTRACT_BITS(TEXASR, 14, 1)
78 #define _TEXASRU_TRANSLATION_INVALIDATION_CONFLICT(TEXASRU) \
79 _TEXASRU_EXTRACT_BITS(TEXASRU, 14, 1)
81 #define _TEXASR_IMPLEMENTAION_SPECIFIC(TEXASR) \
82 _TEXASR_EXTRACT_BITS(TEXASR, 15, 1)
83 #define _TEXASRU_IMPLEMENTAION_SPECIFIC(TEXASRU) \
84 _TEXASRU_EXTRACT_BITS(TEXASRU, 15, 1)
86 #define _TEXASR_INSTRUCTION_FETCH_CONFLICT(TEXASR) \
87 _TEXASR_EXTRACT_BITS(TEXASR, 16, 1)
88 #define _TEXASRU_INSTRUCTION_FETCH_CONFLICT(TEXASRU) \
89 _TEXASRU_EXTRACT_BITS(TEXASRU, 16, 1)
91 #define _TEXASR_ABORT(TEXASR) \
92 _TEXASR_EXTRACT_BITS(TEXASR, 31, 1)
93 #define _TEXASRU_ABORT(TEXASRU) \
94 _TEXASRU_EXTRACT_BITS(TEXASRU, 31, 1)
97 #define _TEXASR_SUSPENDED(TEXASR) \
98 _TEXASR_EXTRACT_BITS(TEXASR, 32, 1)
100 #define _TEXASR_PRIVILEGE(TEXASR) \
101 _TEXASR_EXTRACT_BITS(TEXASR, 35, 2)
103 #define _TEXASR_FAILURE_SUMMARY(TEXASR) \
104 _TEXASR_EXTRACT_BITS(TEXASR, 36, 1)
106 #define _TEXASR_TFIAR_EXACT(TEXASR) \
107 _TEXASR_EXTRACT_BITS(TEXASR, 37, 1)
109 #define _TEXASR_ROT(TEXASR) \
110 _TEXASR_EXTRACT_BITS(TEXASR, 38, 1)
112 #define _TEXASR_TRANSACTION_LEVEL(TEXASR) \
113 _TEXASR_EXTRACT_BITS(TEXASR, 63, 12)
120 #define _HTM_TBEGIN_STARTED 0
121 #define _HTM_TBEGIN_INDETERMINATE 1
122 #define _HTM_TBEGIN_TRANSIENT 2
123 #define _HTM_TBEGIN_PERSISTENT 3
126 #define _HTM_FIRST_USER_ABORT_CODE 256
132 unsigned char format;
134 unsigned char reserved1[4];
135 unsigned short nesting_depth;
136 unsigned long long abort_code;
137 unsigned long long conflict_token;
138 unsigned long long atia;
141 unsigned char reserved2[2];
142 unsigned int program_int_id;
143 unsigned long long exception_id;
144 unsigned long long bea;
145 unsigned char reserved3[72];
146 unsigned long long gprs[16];
152 static __inline
int __attribute__((__always_inline__, __nodebug__))
153 __builtin_tbegin_retry_null (
int __retry)
157 while ((cc = __builtin_tbegin(0)) == _HTM_TBEGIN_TRANSIENT
159 __builtin_tx_assist(i);
164 static __inline
int __attribute__((__always_inline__, __nodebug__))
165 __builtin_tbegin_retry_tdb (
void *__tdb,
int __retry)
169 while ((cc = __builtin_tbegin(__tdb)) == _HTM_TBEGIN_TRANSIENT
171 __builtin_tx_assist(i);
176 #define __builtin_tbegin_retry(tdb, retry) \
177 (__builtin_constant_p(tdb == 0) && tdb == 0 ? \
178 __builtin_tbegin_retry_null(retry) : \
179 __builtin_tbegin_retry_tdb(tdb, retry))
181 static __inline
int __attribute__((__always_inline__, __nodebug__))
182 __builtin_tbegin_retry_nofloat_null (
int __retry)
186 while ((cc = __builtin_tbegin_nofloat(0)) == _HTM_TBEGIN_TRANSIENT
188 __builtin_tx_assist(i);
193 static __inline
int __attribute__((__always_inline__, __nodebug__))
194 __builtin_tbegin_retry_nofloat_tdb (
void *__tdb,
int __retry)
198 while ((cc = __builtin_tbegin_nofloat(__tdb)) == _HTM_TBEGIN_TRANSIENT
200 __builtin_tx_assist(i);
205 #define __builtin_tbegin_retry_nofloat(tdb, retry) \
206 (__builtin_constant_p(tdb == 0) && tdb == 0 ? \
207 __builtin_tbegin_retry_nofloat_null(retry) : \
208 __builtin_tbegin_retry_nofloat_tdb(tdb, retry))
_Float16 __2f16 __attribute__((ext_vector_type(2)))
Zeroes the upper 128 bits (bits 255:128) of all YMM registers.
static __inline__ uint32_t
static __inline__ uint64_t
__UINTPTR_TYPE__ uintptr_t
An unsigned integer type with the property that any valid pointer to void can be converted to this ty...