ETISS 0.8.0
Extendable Translating Instruction Set Simulator (version 0.8.0)
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prfchwintrin.h
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1/*===---- prfchwintrin.h - PREFETCHW intrinsic -----------------------------===
2 *
3 * Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 * See https://llvm.org/LICENSE.txt for license information.
5 * SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 *
7 *===-----------------------------------------------------------------------===
8 */
9
10#if !defined(__X86INTRIN_H) && !defined(_MM3DNOW_H_INCLUDED)
11#error "Never use <prfchwintrin.h> directly; include <x86intrin.h> or <mm3dnow.h> instead."
12#endif
13
14#ifndef __PRFCHWINTRIN_H
15#define __PRFCHWINTRIN_H
16
28static __inline__ void __attribute__((__always_inline__, __nodebug__))
29_m_prefetch(void *__P)
30{
31 __builtin_prefetch (__P, 0, 3 /* _MM_HINT_T0 */);
32}
33
49static __inline__ void __attribute__((__always_inline__, __nodebug__))
50_m_prefetchw(void *__P)
51{
52 __builtin_prefetch (__P, 1, 3 /* _MM_HINT_T0 */);
53}
54
55#endif /* __PRFCHWINTRIN_H */
_Float16 __2f16 __attribute__((ext_vector_type(2)))
Zeroes the upper 128 bits (bits 255:128) of all YMM registers.