ETISS 0.8.0
Extendable Translating Instruction Set Simulator (version 0.8.0)
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Go to the source code of this file.
Macros | |
#define | _bit_scan_forward(A) __bsfd((A)) |
#define | _bit_scan_reverse(A) __bsrd((A)) |
#define | _popcnt32(A) __popcntd((A)) |
#define | _rdtsc() __rdtsc() |
#define | _rdpmc(A) __rdpmc(A) |
#define | _lrotl(a, b) __rold((a), (b)) |
#define | _lrotr(a, b) __rord((a), (b)) |
#define | _rotl(a, b) __rold((a), (b)) |
#define | _rotr(a, b) __rord((a), (b)) |
#define | _rotwl(a, b) __rolw((a), (b)) |
#define | _rotwr(a, b) __rorw((a), (b)) |
Functions | |
static __inline__ int | __attribute__ ((__always_inline__, __nodebug__)) __bsfd(int __A) |
Find the first set bit starting from the lsb. More... | |
static __inline__ unsigned int | __attribute__ ((__always_inline__)) _castf32_u32(float __A) |
Cast a 32-bit float value to a 32-bit unsigned integer value. More... | |
static __inline__ unsigned int | __attribute__ ((__always_inline__, __nodebug__, __target__("sse4.2"))) __crc32b(unsigned int __C |
Adds the unsigned integer operand to the CRC-32C checksum of the unsigned char operand. More... | |
Variables | |
static __inline__ unsigned int unsigned char | __D |
static __inline__ unsigned char int | __C |
#define _bit_scan_forward | ( | A | ) | __bsfd((A)) |
Definition at line 72 of file ia32intrin.h.
#define _bit_scan_reverse | ( | A | ) | __bsrd((A)) |
Definition at line 73 of file ia32intrin.h.
Definition at line 421 of file ia32intrin.h.
Definition at line 422 of file ia32intrin.h.
#define _popcnt32 | ( | A | ) | __popcntd((A)) |
Definition at line 147 of file ia32intrin.h.
#define _rdpmc | ( | A | ) | __rdpmc(A) |
Definition at line 365 of file ia32intrin.h.
#define _rdtsc | ( | ) | __rdtsc() |
Definition at line 363 of file ia32intrin.h.
Definition at line 424 of file ia32intrin.h.
Definition at line 425 of file ia32intrin.h.
Definition at line 429 of file ia32intrin.h.
Definition at line 430 of file ia32intrin.h.
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static |
Cast a 32-bit float value to a 32-bit unsigned integer value.
Cast a 64-bit unsigned integer value to a 64-bit float value.
Cast a 32-bit unsigned integer value to a 32-bit float value.
Cast a 64-bit float value to a 64-bit unsigned integer value.
This intrinsic corresponds to the VMOVD / MOVD
instruction in x86_64, and corresponds to the VMOVL / MOVL
instruction in ia32.
__A | A 32-bit float value. |
This intrinsic corresponds to the VMOVQ / MOVQ
instruction in x86_64, and corresponds to the VMOVL / MOVL
instruction in ia32.
__A | A 64-bit float value. |
This intrinsic corresponds to the VMOVQ / MOVQ
instruction in x86_64, and corresponds to the FLDS
instruction in ia32.
__A | A 32-bit unsigned integer value. |
This intrinsic corresponds to the VMOVQ / MOVQ
instruction in x86_64, and corresponds to the FLDL
instruction in ia32.
__A | A 64-bit unsigned integer value. |
Definition at line 208 of file ia32intrin.h.
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static |
Find the first set bit starting from the lsb.
Counts the number of bits in the source operand having a value of 1.
Swaps the bytes in the input.
Find the first set bit starting from the msb.
Result is undefined if input is 0.
This intrinsic corresponds to the BSF
instruction or the TZCNT
instruction.
__A | A 32-bit integer operand. |
Result is undefined if input is 0.
This intrinsic corresponds to the BSR
instruction or the LZCNT
instruction and an XOR
.
__A | A 32-bit integer operand. |
Converting little endian to big endian or vice versa.
This intrinsic corresponds to the BSWAP
instruction.
__A | A 32-bit integer operand. |
This intrinsic corresponds to the POPCNT
instruction or a a sequence of arithmetic and logic ops to calculate it.
__A | An unsigned 32-bit integer operand. |
Definition at line 29 of file ia32intrin.h.
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static |
Adds the unsigned integer operand to the CRC-32C checksum of the unsigned char operand.
Adds the unsigned integer operand to the CRC-32C checksum of the second unsigned integer operand.
Adds the unsigned integer operand to the CRC-32C checksum of the unsigned short operand.
This intrinsic corresponds to the CRC32B
instruction.
__C | An unsigned integer operand to add to the CRC-32C checksum of operand __D. |
__D | An unsigned 8-bit integer operand used to compute the CRC-32C checksum. |
This intrinsic corresponds to the CRC32W
instruction.
__C | An unsigned integer operand to add to the CRC-32C checksum of operand __D. |
__D | An unsigned 16-bit integer operand used to compute the CRC-32C checksum. |
This intrinsic corresponds to the CRC32D
instruction.
__C | An unsigned integer operand to add to the CRC-32C checksum of operand __D. |
__D | An unsigned 32-bit integer operand used to compute the CRC-32C checksum. |
Definition at line 373 of file ia32intrin.h.
Referenced by _kortest_mask16_u8(), _kortest_mask32_u8(), _kortest_mask64_u8(), _kortest_mask8_u8(), _ktest_mask16_u8(), _ktest_mask32_u8(), _ktest_mask64_u8(), _ktest_mask8_u8(), _mm256_cmov_si256(), _mm256_fmadd_pd(), _mm256_fmadd_ps(), _mm256_fmaddsub_pd(), _mm256_fmaddsub_ps(), _mm256_fmsub_pd(), _mm256_fmsub_ps(), _mm256_fmsubadd_pd(), _mm256_fmsubadd_ps(), _mm256_fnmadd_pd(), _mm256_fnmadd_ps(), _mm256_fnmsub_pd(), _mm256_fnmsub_ps(), _mm256_macc_pd(), _mm256_macc_ps(), _mm256_maddsub_pd(), _mm256_maddsub_ps(), _mm256_mask3_fmadd_pd(), _mm256_mask3_fmadd_ps(), _mm256_mask3_fmaddsub_pd(), _mm256_mask3_fmaddsub_ps(), _mm256_mask3_fmsub_pd(), _mm256_mask3_fmsub_ps(), _mm256_mask3_fmsubadd_pd(), _mm256_mask3_fmsubadd_ps(), _mm256_mask3_fnmadd_pd(), _mm256_mask3_fnmadd_ps(), _mm256_mask3_fnmsub_pd(), _mm256_mask3_fnmsub_ps(), _mm256_mask_fmadd_pd(), _mm256_mask_fmadd_ps(), _mm256_mask_fmaddsub_pd(), _mm256_mask_fmaddsub_ps(), _mm256_mask_fmsub_pd(), _mm256_mask_fmsub_ps(), _mm256_mask_fmsubadd_pd(), _mm256_mask_fmsubadd_ps(), _mm256_mask_fnmadd_pd(), _mm256_mask_fnmadd_ps(), _mm256_mask_fnmsub_pd(), _mm256_mask_fnmsub_ps(), _mm256_mask_permutevar_pd(), _mm256_mask_permutevar_ps(), _mm256_mask_shldv_epi16(), _mm256_mask_shldv_epi32(), _mm256_mask_shldv_epi64(), _mm256_mask_shrdv_epi16(), _mm256_mask_shrdv_epi32(), _mm256_mask_shrdv_epi64(), _mm256_maskz_fmadd_pd(), _mm256_maskz_fmadd_ps(), _mm256_maskz_fmaddsub_pd(), _mm256_maskz_fmaddsub_ps(), _mm256_maskz_fmsub_pd(), _mm256_maskz_fmsub_ps(), _mm256_maskz_fmsubadd_pd(), _mm256_maskz_fmsubadd_ps(), _mm256_maskz_fnmadd_pd(), _mm256_maskz_fnmadd_ps(), _mm256_maskz_fnmsub_pd(), _mm256_maskz_fnmsub_ps(), _mm256_maskz_permutevar_pd(), _mm256_maskz_permutevar_ps(), _mm256_maskz_shldv_epi16(), _mm256_maskz_shldv_epi32(), _mm256_maskz_shldv_epi64(), _mm256_maskz_shrdv_epi16(), _mm256_maskz_shrdv_epi32(), _mm256_maskz_shrdv_epi64(), _mm256_msub_pd(), _mm256_msub_ps(), _mm256_msubadd_pd(), _mm256_msubadd_ps(), _mm256_nmacc_pd(), _mm256_nmacc_ps(), _mm256_nmsub_pd(), _mm256_nmsub_ps(), _mm256_shldv_epi16(), _mm256_shldv_epi32(), _mm256_shldv_epi64(), _mm256_shrdv_epi16(), _mm256_shrdv_epi32(), _mm256_shrdv_epi64(), _mm512_fmadd_pd(), _mm512_fmadd_ps(), _mm512_fmaddsub_pd(), _mm512_fmaddsub_ps(), _mm512_fmsub_pd(), _mm512_fmsub_ps(), _mm512_fmsubadd_pd(), _mm512_fmsubadd_ps(), _mm512_fnmadd_pd(), _mm512_fnmadd_ps(), _mm512_fnmsub_pd(), _mm512_fnmsub_ps(), _mm512_mask3_fmadd_pd(), _mm512_mask3_fmadd_ps(), _mm512_mask3_fmaddsub_pd(), _mm512_mask3_fmaddsub_ps(), _mm512_mask3_fmsub_pd(), _mm512_mask3_fmsub_ps(), _mm512_mask3_fmsubadd_pd(), _mm512_mask3_fmsubadd_ps(), _mm512_mask3_fnmadd_pd(), _mm512_mask3_fnmadd_ps(), _mm512_mask3_fnmsub_pd(), _mm512_mask3_fnmsub_ps(), _mm512_mask_fmadd_pd(), _mm512_mask_fmadd_ps(), _mm512_mask_fmaddsub_pd(), _mm512_mask_fmaddsub_ps(), _mm512_mask_fmsub_pd(), _mm512_mask_fmsub_ps(), _mm512_mask_fmsubadd_pd(), _mm512_mask_fmsubadd_ps(), _mm512_mask_fnmadd_pd(), _mm512_mask_fnmadd_ps(), _mm512_mask_fnmsub_pd(), _mm512_mask_fnmsub_ps(), _mm512_mask_permutevar_pd(), _mm512_mask_permutevar_ps(), _mm512_mask_shldv_epi16(), _mm512_mask_shldv_epi32(), _mm512_mask_shldv_epi64(), _mm512_mask_shrdv_epi16(), _mm512_mask_shrdv_epi32(), _mm512_mask_shrdv_epi64(), _mm512_maskz_fmadd_pd(), _mm512_maskz_fmadd_ps(), _mm512_maskz_fmaddsub_pd(), _mm512_maskz_fmaddsub_ps(), _mm512_maskz_fmsub_pd(), _mm512_maskz_fmsub_ps(), _mm512_maskz_fmsubadd_pd(), _mm512_maskz_fmsubadd_ps(), _mm512_maskz_fnmadd_pd(), _mm512_maskz_fnmadd_ps(), _mm512_maskz_fnmsub_pd(), _mm512_maskz_fnmsub_ps(), _mm512_maskz_permutevar_pd(), _mm512_maskz_permutevar_ps(), _mm512_maskz_shldv_epi16(), _mm512_maskz_shldv_epi32(), _mm512_maskz_shldv_epi64(), _mm512_maskz_shrdv_epi16(), _mm512_maskz_shrdv_epi32(), _mm512_maskz_shrdv_epi64(), _mm512_permutevar_pd(), _mm512_permutevar_ps(), _mm512_set4_epi32(), _mm512_set4_epi64(), _mm512_set4_pd(), _mm512_set4_ps(), _mm512_set_epi32(), _mm512_set_epi64(), _mm512_set_pd(), _mm512_set_ps(), _mm512_shldv_epi16(), _mm512_shldv_epi32(), _mm512_shldv_epi64(), _mm512_shrdv_epi16(), _mm512_shrdv_epi32(), _mm512_shrdv_epi64(), _mm_cmov_si128(), _mm_crc32_u16(), _mm_crc32_u32(), _mm_crc32_u8(), _mm_fmadd_pd(), _mm_fmadd_ps(), _mm_fmadd_sd(), _mm_fmadd_ss(), _mm_fmaddsub_pd(), _mm_fmaddsub_ps(), _mm_fmsub_pd(), _mm_fmsub_ps(), _mm_fmsub_sd(), _mm_fmsub_ss(), _mm_fmsubadd_pd(), _mm_fmsubadd_ps(), _mm_fnmadd_pd(), _mm_fnmadd_ps(), _mm_fnmadd_sd(), _mm_fnmadd_ss(), _mm_fnmsub_pd(), _mm_fnmsub_ps(), _mm_fnmsub_sd(), _mm_fnmsub_ss(), _mm_macc_epi16(), _mm_macc_epi32(), _mm_macc_pd(), _mm_macc_ps(), _mm_macc_sd(), _mm_macc_ss(), _mm_maccd_epi16(), _mm_macchi_epi32(), _mm_macclo_epi32(), _mm_maccs_epi16(), _mm_maccs_epi32(), _mm_maccsd_epi16(), _mm_maccshi_epi32(), _mm_maccslo_epi32(), _mm_maddd_epi16(), _mm_maddsd_epi16(), _mm_maddsub_pd(), _mm_maddsub_ps(), _mm_mask3_fmadd_pd(), _mm_mask3_fmadd_ps(), _mm_mask3_fmaddsub_pd(), _mm_mask3_fmaddsub_ps(), _mm_mask3_fmsub_pd(), _mm_mask3_fmsub_ps(), _mm_mask3_fmsubadd_pd(), _mm_mask3_fmsubadd_ps(), _mm_mask3_fnmadd_pd(), _mm_mask3_fnmadd_ps(), _mm_mask3_fnmsub_pd(), _mm_mask3_fnmsub_ps(), _mm_mask_fmadd_pd(), _mm_mask_fmadd_ps(), _mm_mask_fmaddsub_pd(), _mm_mask_fmaddsub_ps(), _mm_mask_fmsub_pd(), _mm_mask_fmsub_ps(), _mm_mask_fmsubadd_pd(), _mm_mask_fmsubadd_ps(), _mm_mask_fnmadd_pd(), _mm_mask_fnmadd_ps(), _mm_mask_fnmsub_pd(), _mm_mask_fnmsub_ps(), _mm_mask_permutevar_pd(), _mm_mask_permutevar_ps(), _mm_mask_shldv_epi16(), _mm_mask_shldv_epi32(), _mm_mask_shldv_epi64(), _mm_mask_shrdv_epi16(), _mm_mask_shrdv_epi32(), _mm_mask_shrdv_epi64(), _mm_maskz_fmadd_pd(), _mm_maskz_fmadd_ps(), _mm_maskz_fmadd_sd(), _mm_maskz_fmadd_ss(), _mm_maskz_fmaddsub_pd(), _mm_maskz_fmaddsub_ps(), _mm_maskz_fmsub_pd(), _mm_maskz_fmsub_ps(), _mm_maskz_fmsub_sd(), _mm_maskz_fmsub_ss(), _mm_maskz_fmsubadd_pd(), _mm_maskz_fmsubadd_ps(), _mm_maskz_fnmadd_pd(), _mm_maskz_fnmadd_ps(), _mm_maskz_fnmadd_sd(), _mm_maskz_fnmadd_ss(), _mm_maskz_fnmsub_pd(), _mm_maskz_fnmsub_ps(), _mm_maskz_fnmsub_sd(), _mm_maskz_fnmsub_ss(), _mm_maskz_permutevar_pd(), _mm_maskz_permutevar_ps(), _mm_maskz_shldv_epi16(), _mm_maskz_shldv_epi32(), _mm_maskz_shldv_epi64(), _mm_maskz_shrdv_epi16(), _mm_maskz_shrdv_epi32(), _mm_maskz_shrdv_epi64(), _mm_msub_pd(), _mm_msub_ps(), _mm_msub_sd(), _mm_msub_ss(), _mm_msubadd_pd(), _mm_msubadd_ps(), _mm_nmacc_pd(), _mm_nmacc_ps(), _mm_nmacc_sd(), _mm_nmacc_ss(), _mm_nmsub_pd(), _mm_nmsub_ps(), _mm_nmsub_sd(), _mm_nmsub_ss(), _mm_perm_epi8(), _mm_shldv_epi16(), _mm_shldv_epi32(), _mm_shldv_epi64(), _mm_shrdv_epi16(), _mm_shrdv_epi32(), and _mm_shrdv_epi64().
static __inline__ void int __D |
Definition at line 282 of file ia32intrin.h.
Referenced by _mm256_dpbf16_ps(), _mm256_mask_compress_epi16(), _mm256_mask_compress_epi8(), _mm256_mask_compressstoreu_epi16(), _mm256_mask_compressstoreu_epi8(), _mm256_mask_dpbf16_ps(), _mm256_mask_expand_epi16(), _mm256_mask_expand_epi8(), _mm256_maskz_compress_epi16(), _mm256_maskz_compress_epi8(), _mm256_maskz_dpbf16_ps(), _mm256_maskz_expand_epi16(), _mm256_maskz_expand_epi8(), _mm512_dpbf16_ps(), _mm512_mask_compress_epi16(), _mm512_mask_compress_epi8(), _mm512_mask_compressstoreu_epi16(), _mm512_mask_compressstoreu_epi8(), _mm512_mask_dpbf16_ps(), _mm512_mask_expand_epi16(), _mm512_mask_expand_epi8(), _mm512_maskz_compress_epi16(), _mm512_maskz_compress_epi8(), _mm512_maskz_dpbf16_ps(), _mm512_maskz_expand_epi16(), _mm512_maskz_expand_epi8(), _mm512_set4_epi32(), _mm512_set4_epi64(), _mm512_set4_pd(), _mm512_set4_ps(), _mm512_set_epi32(), _mm512_set_epi64(), _mm512_set_pd(), _mm512_set_ps(), _mm_crc32_u16(), _mm_crc32_u32(), _mm_crc32_u8(), _mm_dpbf16_ps(), _mm_mask_compress_epi16(), _mm_mask_compress_epi8(), _mm_mask_compressstoreu_epi16(), _mm_mask_compressstoreu_epi8(), _mm_mask_dpbf16_ps(), _mm_mask_expand_epi16(), _mm_mask_expand_epi8(), _mm_maskz_compress_epi16(), _mm_maskz_compress_epi8(), _mm_maskz_dpbf16_ps(), _mm_maskz_expand_epi16(), and _mm_maskz_expand_epi8().